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Patent # Description
2016/0343833 TRANSISTOR WITH CHARGE ENHANCED FIELD PLATE STRUCTURE AND METHOD
Transistors and methods of fabricating are described herein. These transistors include a field plate (108) and a charged dielectric layer (106) overlapping at...
2016/0343832 Self-Aligned Passivation of Active Regions
A method includes forming a semiconductor fin, performing a first passivation step on a top surface of the semiconductor fin using a first passivation species,...
2016/0343831 FORMATION OF HIGH QUALITY FIN IN 3D STRUCTURE BY WAY OF TWO-STEP IMPLANTATION
The present disclosure discloses a method of fabricating a semiconductor device. A fin structure is formed over a substrate. The fin structure contains a...
2016/0343830 LOW TEMPERATURE POLYSILICON THIN FILM TRANSISTOR AND METHOD FOR FABRICATING SAME
The present invention provides a low temperature polysilicon thin film transistor and a fabricating method thereof. According to the method, a laser annealing...
2016/0343829 MANUFACTURING METHOD OF LOW TEMPERATURE POLYSILICON THIN FILM TRANSISTOR
The invention provides a manufacturing method of a low temperature polysilicon thin film transistor, including: providing a substrate; forming a buffer layer...
2016/0343828 METHOD FOR MANUFACTURING AMOLED BACKPLANE
The present invention provides a method for manufacturing an AMOLED backplane, in which after a first metal layer is patternized to form a first gate terminal...
2016/0343827 STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a ...
2016/0343826 III-V MOSFET WITH STRAINED CHANNEL AND SEMI-INSULATING BOTTOM BARRIER
Embodiments include a method for fabricating a semiconductor device and the resulting structure comprising forming a semi-insulating bottom barrier on a...
2016/0343825 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE HAVING A SILICIDE LAYER
A method for fabricating a semiconductor device is provided. The method includes forming a gate electrode and a source or drain disposed at opposite sides of...
2016/0343824 MULTI-LAYER GATE DIELECTRIC
A transistor gate dielectric including a first dielectric material having a first dielectric constant and a second dielectric material having a second...
2016/0343823 HYBRID GATE DIELECTRICS FOR SEMICONDUCTOR POWER DEVICES
In a general aspect, a power semiconductor device can include a silicon carbide (SiC) substrate and a SiC epi-layer disposed on the SiC substrate. The device...
2016/0343822 Semiconductor Structures
A semiconductor structure comprising a substrate, a pre-metal-interconnect dielectric (PMID) layer and a composite layer is disclosed. The PMID layer is above...
2016/0343821 CONTACT STRUCTURE FOR THIN FILM SEMICONDUCTOR
A method is described for forming a circuit that comprises forming a layer of semiconductor material on the substrate and an interlayer conductor contacting...
2016/0343820 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
A silicon carbide substrate includes a first impurity region, a well region in contact with the first impurity region, and a second impurity region separated...
2016/0343819 SEMICONDUCTOR DEVICES INCLUDING FIELD EFFECT TRANSISTORS AND METHODS OF FABRICATING THE SAME
A semiconductor device includes a fin structure on a substrate, device isolation patterns on the substrate at opposite sides of the fin structure, a gate...
2016/0343818 NON-VOLATILE MEMORY DEVICE INCLUDING CHARGE TRAPPING LAYER AND METHOD FOR FABRICATING THE SAME
A non-volatile memory device includes a charge trapping layer for trapping charges. The charge trapping layer includes a linker layer formed over a substrate...
2016/0343817 Metal Nanodot Formation Method, Metal Nanodot Formation Apparatus and Semiconductor Device Manufacturing Method
A metal nanodot formation method includes: loading a target substrate inside a processing container of a processing apparatus; depositing a plurality of metal...
2016/0343816 NON-VOLATILE MEMORY DEVICE INCLUDING NANO FLOATING GATE WITH NANOPARTICLE AND METHOD FOR FABRICATING THE SAME
A non-volatile memory device includes a floating gate for charging and discharging of charges over a substrate. The floating gate comprises a linker layer...
2016/0343815 Wrap-Around Contact on FinFET
A fin structure is on a substrate. The fin structure includes an epitaxial region having an upper surface and an under-surface. A contact structure on the...
2016/0343814 TRANSISTOR WITH A LOW-K SIDEWALL SPACER AND METHOD OF MAKING SAME
A transistor is formed by defining a gate stack on top of a semiconductor layer. The gate stack includes a gate dielectric and a gate electrode. A layer of a...
2016/0343813 Semiconductor Device Having Reduced Drain-To-Source Capacitance
A semiconductor device includes a source finger electrode coupled to a source region in a semiconductor die, a drain finger electrode coupled to a drain region...
2016/0343812 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
According to one embodiment, a semiconductor device includes a semiconductor substrate in which a recess is provided on a back surface thereof, and a shape of...
2016/0343811 METHOD FOR FORMING GROUP III/V CONFORMAL LAYERS ON SILICON SUBSTRATES
A method for forming a conformal group III/V layer on a silicon substrate and the resulting substrate with the group III/V layers formed thereon. The method...
2016/0343810 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING HIGH SPEED EPITAXIAL LIFT-OFF AND TEMPLATE FOR III-V DIRECT...
Disclosed is a method for manufacturing a semiconductor device, which includes providing a template having a first substrate and a patterned first III-V group...
2016/0343809 DEVICE WITH A CONDUCTIVE FEATURE FORMED OVER A CAVITY AND METHOD THEREFOR
An embodiment of a device includes a semiconductor substrate, a transistor formed at the first substrate surface, a first conductive feature formed over the...
2016/0343808 SILICON CARBIDE SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHODS FOR MANUFACTURING THEM
A silicon carbide substrate has a first main surface, and a second main surface opposite to the first main surface. A region including at least one main...
2016/0343807 EMBEDDED CARBON-DOPED GERMANIUM AS STRESSOR FOR GERMANIUM nFET DEVICES
Carbon-doped germanium stressor regions are formed in an nFET device region of a germanium substrate and at a footprint of a functional gate structure. The...
2016/0343806 INTERFACE PASSIVATION LAYERS AND METHODS OF FABRICATING
Methods for fabricating interface passivation layers in a circuit structure are provided. The method includes forming a silicon-germanium layer over a...
2016/0343805 SEMICONDUCTOR DEVICE INCLUDING METAL-2 DIMENSIONAL MATERIAL-SEMICONDUCTOR CONTACT
A semiconductor device includes a semiconductor layer, a metal layer electrically contacting the semiconductor layer, and a two-dimensional material layer...
2016/0343804 SEMICONDUCTOR STRUCTURES AND METHODS OF FORMING THE SAME
Semiconductor structures and methods of forming the same are provided. A semiconductor structure includes a substrate and an annular nanowire disposed over the...
2016/0343803 SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor chip formed with an SiC-IGBT including an SiC semiconductor layer, a first conductive-type collector region...
2016/0343802 POWER DEVICE INTEGRATION ON A COMMON SUBSTRATE
A semiconductor structure for facilitating an integration of power devices on a common substrate includes a first insulating layer formed on the substrate and...
2016/0343801 VERTICAL GALLIUM NITRIDE POWER FIELD-EFFECT TRANSISTOR WITH A FIELD PLATE STRUCTURE
The present disclosure relates to a vertical gallium-nitride (GaN) power field-effect transistor (FET) with a field plate structure. The vertical GaN power FET...
2016/0343800 METHOD OF FORMING A SEMICONDUCTOR DIE
In one embodiment, semiconductor die having non-rectangular shapes and die having various different shapes are formed and singulated from a semiconductor wafer.
2016/0343799 OXIDE FILM, INTEGRATED CIRCUIT DEVICE, AND METHODS OF FORMING THE SAME
A doped mold film is formed with a dopant concentration gradient in the doped mold film that continuously varies in a thickness direction and a portion of the...
2016/0343798 SEMICONDUCTOR DEVICE WITH METAL EXTRUSION FORMATION
Embodiments disclose a method of fabrication and a semiconductor structure comprising a Metal-insulator-metal (MIM) capacitor. The method of fabrication...
2016/0343797 SEMICONDUCTOR DEVICE WITH METAL EXTRUSION FORMATION
Embodiments disclose a method of fabrication and a semiconductor structure comprising a Metal-insulator-metal (MIM) capacitor. The method of fabrication...
2016/0343796 CAPACITOR STRUCTURE AND METHOD FOR FORMING THE SAME
A capacitor structure includes first and second interdigitated conductive elements formed over different portions of a semiconductor substrate, and a...
2016/0343795 DOPING OF ZrO2 FOR DRAM APPLICATIONS
A method of forming a dielectric material, comprising doping a zirconium oxide material, using a dopant precursor selected from the group consisting of...
2016/0343794 Inductor System and Method
A system and method for providing and manufacturing an inductor is provided. In an embodiment similar masks are reutilized to form differently sized inductors....
2016/0343793 Light Emitting Device and Manufacturing Method of the Same
The present invention is directed to a light emitting device structured so as to increase the amount of light which is taken out in a certain direction after...
2016/0343792 ORGANIC LIGHT-EMITTING DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
An organic light-emitting display apparatus includes a lower substrate having a display area, and a sealing area outside of the display area, an upper...
2016/0343791 DOUBLE SIDE OLED DISPLAY DEVICE AND MANUFACTURE METHOD THEREOF
The present invention provides a double side OLED display device and a manufacture method thereof. The double side OLED display device comprises a first, a...
2016/0343790 DISPLAY DEVICE WITH TRANSISTOR SAMPLING FOR IMPROVED PERFORMANCE
A display device including a pixel array having a plurality of pixels arranged in a matrix form, each of the pixels including a sampling transistor configured...
2016/0343789 COA WOLED STRUCTURE AND MANUFACTURING METHOD THEREOF
The present invention provides a COA WOLED structure and a manufacturing method thereof. The structure includes red/green/blue sub pixel zones and each sub...
2016/0343788 COA WOLED STRUCTURE AND MANUFACTURING METHOD THEREOF
The present invention provides a COA WOLED structure and a manufacturing method thereof. The structure includes red/green/blue sub pixel zones and each sub...
2016/0343787 FLAT PANEL DISPLAY
The present invention provides a flat panel display. The flat panel display includes a non-transparent display zone (1), a transparent display zone (3)...
2016/0343786 OLED DISPLAY DEVICE AND MANUFACTURE METHOD THEREOF
The present invention provides an OLED display device and a manufacture method thereof. By locating a thickness of a part of the second insulative layer...
2016/0343785 OLED DISPLAY DEVICE AND MANUFACTURE METHOD THEREOF
The present invention provides an OLED display device and a manufacture method thereof, and the OLED display device comprises a first substrate (100), a second...
2016/0343784 OLED DISPLAY SUBSTRATE AND MANUFACTURE METHOD THEREOF
The present invention provides an OLED display substrate and a manufacture method thereof. The OLED display substrate comprises a substrate (10), a TFT (90)...
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