Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
2016/0343733 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
To provide a method for manufacturing a semiconductor device including an oxide semiconductor film having conductivity, or a method for manufacturing a...
2016/0343732 Polycrystalline Oxide Thin-Film Transistor Array Substrate and Method of Manufacturing Same
This invention provides a polycrystalline oxide thin-film transistor (TFT) array substrate and a method of manufacturing the same. As the polycrystalline oxide...
2016/0343731 METHOD OF MANUFACTURING COMPONENTS OF DISPLAY PANEL ASSEMBLY FROM SAME MOTHER SUBSTRATE
A method of manufacturing a display panel assembly includes: preparing a mother substrate on which are defined first regions and dummy regions respectively...
2016/0343730 Vertical Memory Devices
A vertical memory device includes a substrate, a channel on the substrate, extending in a vertical direction with respect to a top surface of the substrate,...
2016/0343729 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device, the method including forming a structure on a substrate, the structure including a metal pattern, at least a...
2016/0343728 THREE DIMENSIONAL FLASH MEMORY USING ELECTRODE LAYERS AND/OR INTERLAYER INSULATION LAYERS HAVING DIFFERENT...
Embodiments of the present invention enable threshold voltage distribution of a plurality of electrode layers to be improved by configuring each of the...
2016/0343727 VERTICAL NAND FLASH MEMORY DEVICE
Provided is a vertical NAND flash memory device. The vertical NAND flash memory device may include word lines formed on a substrate, a plurality of pads...
2016/0343726 ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating an electronic device including a semiconductor memory may include: forming a stack structure in which an interlayer dielectric layer...
2016/0343725 Memory Devices Including Blocking Layers
A memory device includes a cell region and a peripheral circuit region adjacent the cell region. A plurality of gate electrode layers and insulating layers are...
2016/0343724 FLASH MEMORY DEVICE
A method is provided for fabricating a flash memory device. The method includes providing a semiconductor substrate and thrilling a first polysilicon layer....
2016/0343723 STRUCTURE AND METHOD FOR BEOL NANOSCALE DAMASCENE SIDEWALL-DEFINED NON-VOLATILE MEMORY ELEMENT
An exposed edge of a conductive liner in a Damascene trench provides a high aspect ratio geometry of a non-volatile memory cell that can be scaled to...
2016/0343722 NONVOLATILE STORAGE WITH GAP IN INTER-GATE DIELECTRIC
A non-volatile memory device is provided that includes a gap in one of the layers of the inter-gate dielectric. One embodiment comprises a plurality of active...
2016/0343721 STRUCTURE AND METHOD FOR BEOL NANOSCALE DAMASCENE SIDEWALL-DEFINED NON-VOLATILE MEMORY ELEMENT
An exposed edge of a conductive liner in a Damascene trench provides a high aspect ratio geometry of a non-volatile memory cell that can be scaled to...
2016/0343720 Method for Producing One-Time-Programmable Memory Cells and Corresponding Integrated Circuit
An integrated circuit includes a silicon on insulator substrate having a semiconductor film located above a buried insulating layer. At least one memory cell...
2016/0343719 INTERPOSERS FOR INTEGRATED CIRCUITS WITH ONE-TIME PROGRAMMING AND METHODS FOR MANUFACTURING THE SAME
An interposer for an integrated circuit includes a first side and a second side. The interposer includes a substrate and a via disposed in the substrate. A...
2016/0343718 Memory Hole Last Boxim
Techniques for forming 3D memory arrays are disclosed. Memory openings are filled with a sacrificial material, such as silicon or nitride. Afterwards, a...
2016/0343717 Integrated Structure Comprising Neighboring Transistors
An integrated structure includes a first MOS transistor with a first controllable gate region overlying a first gate dielectric and a second MOS transistor...
2016/0343716 SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME
A semiconductor device includes a substrate and a plurality of storage nodes on the substrate and extending in a vertical direction relative to the substrate....
2016/0343715 MEMORY DEVICE
A memory device including a substrate, a gate structure, a first active region, a second active region, and a contact. The gate structure is disposed in the...
2016/0343714 SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE AND METHOD OF FABRICATING THE SAME
A semiconductor device includes a device isolation region defining an active region in a substrate, and gate structures buried in the active region of the...
2016/0343713 Semiconductor Device and Method
Vertical gate all around devices are formed by initially forming a first doped region and a second doped region that are planar with each other. A channel...
2016/0343712 ENHANCED INTEGRATION OF DMOS AND CMOS SEMICONDUCTOR DEVICES
A method of fabricating a power semiconductor device includes: forming at least one lateral diffused metal-oxide-semiconductor (LDMOS) structure having a first...
2016/0343711 SEMICONDUCTOR DEVICE USING THREE DIMENSIONAL CHANNEL
According to example embodiments, a semiconductor device includes a first fin, a second fin that is separated from the first fin, and a gate on the first fin...
2016/0343710 STRUCTURE AND METHOD FOR FINFET DEVICE
A semiconductor device includes a first fin structure extending from a semiconductor substrate. A second fin structure is disposed over the first fin...
2016/0343709 SEMICONDUCTOR DEVICE
A semiconductor device includes a first active region and a second active region, which are disposed in a semiconductor substrate and have side surfaces facing...
2016/0343708 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
A semiconductor device may include a substrate, a plurality of first contact plugs, a first via and a power rail. The substrate may include first and second...
2016/0343707 SEMICONDUCTOR DEVICES HAVING FINS
A semiconductor device includes a first fin on a substrate, a gate electrode on the substrate to intersect the first fin, an epitaxial layer on both sides of...
2016/0343706 FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE STRUCTURE WITH UNEVEN GATE STRUCTURE AND METHOD FOR FORMING THE SAME
A FinFET device structure is provided. The FinFET device structure includes an isolation structure formed over a substrate and a fin structure formed over the...
2016/0343705 CONTACT STRUCTURE AND EXTENSION FORMATION FOR III-V NFET
FinFET devices including III-V fin structures and silicon-based source/drain regions are formed on a semiconductor substrate. Silicon is diffused into the...
2016/0343704 SCALABLE VOLTAGE SOURCE
A scalable voltage source having a number N of mutually series-connected partial voltage sources designed as semiconductor diodes, wherein each of the partial...
2016/0343703 SEMICONDUCTOR DEVICES HAVING STUD PATTERNS THAT ARE ALIGNED AND MISALIGNED WITH CONTACT PATTERNS
A semiconductor device includes an active region, a gate pattern on the active region, the active region including a source region at a first side of the gate...
2016/0343702 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME
A semiconductor device is capable of accurately sensing a temperature of a semiconductor element incorporated in a semiconductor substrate. The semiconductor...
2016/0343701 ZENER TRIGGERED SILICON CONTROLLED RECTIFIER WITH SMALL SILICON AREA
A semiconductor device includes a P-type semiconductor substrate, an N-well and a P-well disposed adjacent to each other and extending along a first direction...
2016/0343700 SEMICONDUCTOR DEVICE
A capacitive component region is formed below a temperature detecting diode or below a protective diode. In addition, the capacitive component region is formed...
2016/0343699 STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH SUPPORT MEMBERS AND ASSOCIATED SYSTEMS AND METHODS
Stacked semiconductor die assemblies with support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die...
2016/0343698 Package-on-Package Structure Including a Thermal Isolation Material and Method of Forming the Same
A semiconductor device includes a first package component and a second package component. The first package component has a first die formed on a first...
2016/0343697 PACKAGE AND METHOD FOR INTEGRATION OF HETEROGENEOUS INTEGRATED CIRCUITS
A package for holding a plurality of heterogeneous integrated circuits includes a first chip having a first conductive pad and a first substrate including a...
2016/0343696 SOLAR CELL POWERED INTEGRATED CIRCUIT DEVICE AND METHOD THEREFOR
A semiconductor device includes a circuitry die and a solar cell die. The circuitry die includes a plurality of interconnect layers on a front side of the...
2016/0343695 SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR FORMING THE SAME
A semiconductor package assembly is provided. The semiconductor package assembly includes a first semiconductor package. The first semiconductor package...
2016/0343694 SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR FORMING THE SAME
A semiconductor package assembly is provided. The semiconductor package assembly includes a semiconductor package. The semiconductor package includes a...
2016/0343693 LIGHT-EMITTING APPARATUS
Provided is a light-emitting apparatus including a substrate, first and second pairs of terminals, each pair including two terminals disposed at two opposed...
2016/0343692 Semiconductor Packaging Structure and Method
A system and method for packaging semiconductor dies is provided. An embodiment comprises a first package with a first contact and a second contact. A...
2016/0343691 MECHANISMS OF FORMING CONNECTORS FOR PACKAGE ON PACKAGE
A method of forming a semiconductor device includes preparing a first semiconductor die package with conductive elements embedded in a molding compound,...
2016/0343690 PACKAGE-ON-PACKAGE SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING THE SAME
Package-on-package systems for packaging semiconductor devices. In one embodiment, a package-on-package system comprises a first semiconductor package device...
2016/0343689 INTERCONNECT STRUCTURE WITH IMPROVED CONDUCTIVE PROPERTIES AND ASSOCIATED SYSTEMS AND METHODS
Interconnect structures with improved conductive properties are disclosed herein. In one embodiment, an interconnect structure can include a first conductive...
2016/0343688 METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE HAVING A MULTI-LAYER MOLDED CONDUCTIVE SUBSTRATE AND STRUCTURE
In one embodiment, a method for fabricating a semiconductor package includes providing a multi-layer molded conductive structure. The multi-layer molded...
2016/0343687 SEMICONDUCTOR DEVICE ASSEMBLY WITH HEAT TRANSFER STRUCTURE FORMED FROM SEMICONDUCTOR MATERIAL
Semiconductor device assemblies with heat transfer structures formed from semiconductor materials are disclosed herein. In one embodiment, a semiconductor...
2016/0343686 INTEGRATED CIRCUIT PACKAGING TECHNIQUES AND CONFIGURATIONS FOR SMALL FORM-FACTOR OR WEARABLE DEVICES
Embodiments of the present disclosure are directed toward integrated circuit (IC) packaging techniques and configurations for small form-factor or wearable...
2016/0343685 SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR FORMING THE SAME
A semiconductor package assembly is provided. The semiconductor package assembly includes a first semiconductor package. The first semiconductor package...
2016/0343684 THERMOCOMPRESSION BONDING WITH RAISED FEATURE
A method for bonding two substrates is described, comprising providing a first and a second silicon substrate, providing a raised feature on at least one of...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.