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Patent # Description
2016/0350199 PREDICTIVE IN-FIELD MEMORY REPAIR SCHEME
Embodiments of the present disclosure provide method and apparatus for memory error correction. The method generally includes tracking information regarding...
2016/0350198 DETECTION OF ABNORMAL RESOURCE USAGE IN A DATA CENTER
A system for identifying abnormal resource usage in a data center is provided. In some embodiments, the system employs a prediction model for each of a...
2016/0350197 MEASURING USER INTERFACE RESPONSIVENESS
Example embodiments relate to measuring user interface (UI) responsiveness related to a UI of an application running on a computing device. An example method...
2016/0350196 ARITHMETIC PROCESSING DEVICE, INFORMATION PROCESSING APPARATUS AND CONTROL METHOD OF ARITHMETIC PROCESSING DEVICE
The arithmetic processing device includes a first memory control unit configured to control an access to a first memory, a second memory control unit...
2016/0350195 FREQUENCY-DOMAIN HIGH-SPEED BUS SIGNAL INTEGRITY COMPLIANCE MODEL
Embodiments of the present disclosure provide apparatus for testing channel compliance. The apparatus generally performs operations that includes identifying...
2016/0350194 ARTIFICIAL INTELLIGENCE BASED HEALTH MANAGEMENT OF HOST SYSTEM
This disclosure relates generally to health management, and more particularly to a method and system for artificial intelligence based diagnostic and...
2016/0350193 CONTROL SYSTEM AND PROCESSING METHOD THEREOF
A control system includes a first control device, a second control device, and a transfer storage unit. The first and second control devices execute processes....
2016/0350192 STORAGE SYSTEM TRANSACTIONS
A system that includes a storage volume comprising a plurality of regions. The system also includes a plurality of nodes to receive transactions related to the...
2016/0350191 MEMORY MANAGEMENT METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT
A memory management method, a memory storage device and a memory control circuit unit are provided. The memory management method includes: detecting a...
2016/0350190 METHOD AND SYSTEM FOR RECOVERY OF A FAILED REGISTRY
A method of recovering a registry includes accessing a plurality of registry zone files for the registry and archiving, on a first periodic basis, the...
2016/0350189 INCREASING DISASTER RESILIENCY BY HAVING A POD BACKED UP TO OTHER PEER PODS IN A SITE OR BEYOND
Increasing disaster resiliency in one aspect may comprise running an optimization algorithm that simultaneously solves for at least a first objective to...
2016/0350188 METHOD AND APPARATUS OF RECOVERING AND ENCODING FOR DATA RECOVERY IN STORAGE SYSTEM
Provided are a method and an apparatus of recovering and encoding for data recovery in a storage system and a distributed storage system of supporting, when a...
2016/0350187 Cloud-Based Solid State Device (SSD) With Dynamically Variable Error Correcting Code (ECC) System
Example apparatus and methods control an error correcting code (ECC) approach for data stored on a solid state device (SSD). The control may be based on a...
2016/0350186 FIRST RESPONDER PARITIES FOR STORAGE ARRAY
Embodiments relate to correcting erasures in a storage array. An aspect includes dividing data into a plurality of stripes for storage in a storage array...
2016/0350185 FLEXIBLE SUPER BLOCK SIZING FOR FAILED SECTOR RECOVERY
The disclosed technology provides for a method or system comprising determining size of a super block for a track zone in a storage medium based on at least...
2016/0350184 METHODS AND APPARATUSES FOR ERROR CORRECTION
Embodiments of the present invention disclose methods and apparatuses for correcting errors in data stored in a solid state device. The solid state device may...
2016/0350183 METHODS AND SYSTEMS FOR NONVOLATILE MEMORY DATA MANAGEMENT
A system includes a first nonvolatile memory array, a second nonvolatile memory array, and a memory controller. The memory controller is configured to write an...
2016/0350182 MEMORY SYSTEM AND INFORMATION PROCESSING SYSTEM
A memory system that includes an error check and correct (ECC) circuit is provided. The memory system includes a memory, a circuit, and a processor. The memory...
2016/0350181 SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME, AND METHOD OF ERROR CORRECTION OF THE SAME
A semiconductor memory device capable of detecting a miscorrected bit generated in the semiconductor memory device outside the semiconductor memory device and...
2016/0350180 ON-DIE ECC WITH ERROR COUNTER AND INTERNAL ADDRESS GENERATION
A memory subsystem enables managing error correction information. A memory device internally performs error detection for a range of memory locations, and...
2016/0350179 DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT
A decoding method, a memory storage device and a memory control circuit unit are provided. The method includes: reading a plurality of first memory cells...
2016/0350178 METHODS AND SYSTEMS FOR DETECTING AND CORRECTING ERRORS IN NONVOLATILE MEMORY
A memory system includes a resistive nonvolatile memory array configured to store data and error correction code (ECC) bits and a memory controller. The memory...
2016/0350177 CONTROLLER AND CONTROL METHOD
According to one embodiment, a controller controls a nonvolatile memory stores data page by page. The controller is configured to extract, from a first data...
2016/0350176 SEMICONDUCTOR COMMUNICATION DEVICE, COMMUNICATION SYSTEM, AND COMMUNICATION METHOD
A semiconductor communication device includes a CRC calculation portion retrieving data pieces and CRC data piece as a retrieved data piece from a data signal,...
2016/0350175 DUPLICATE DATA USING CYCLIC REDUNDANCY CHECK
In one example implementation according to aspects of the present disclosure, a method may include calculating, by a computing system, a cyclic redundancy...
2016/0350174 SALVAGING LOCK ELISION TRANSACTIONS WITH INSTRUCTIONS TO CHANGE EXECUTION TYPE
A transactional memory system salvages a hardware lock elision (HLE) transaction. A processor of the transactional memory system, based on a detection of a...
2016/0350173 AUTOMATIC ANOMALY DETECTION AND RESOLUTION SYSTEM
An anomaly detection and resolution system (ADRS) is disclosed for automatically detecting and resolving anomalies in computing environments. The ADRS may be...
2016/0350172 SYSTEMS AND METHODS FOR RESOURCE LEAKAGE RECOVERY IN PROCESSOR HARDWARE ENGINES
The embodiments described herein provide systems and methods for recovering resources in processing devices. Specifically, the embodiments described herein...
2016/0350171 RE-ENCODING DATA IN A DISPERSED STORAGE NETWORK
A method begins by a storage unit partially decoding a first encoded data slice of a set of encoded data slices in accordance with previous dispersed storage...
2016/0350170 System for Monitoring and Tracking Application Crashes Occurring on Different Mobile Devices
Some embodiments provide a system that allows application developers to track and monitor crashes that are occurring with their applications on various mobile...
2016/0350169 APPARATUSES, METHODS AND SYSTEMS FOR DETERMINING A VIRTUAL MACHINE STATE
APPARATUSES, METHODS AND SYSTEMS FOR DETERMINING A VIRTUAL MACHINE STATE ("CRV") (transforms register retrieval requests, via CRV components, into boot success...
2016/0350168 METHOD FOR MONITORING SOFTWARE CRASH AND MEDICAL EXTERNAL EQUIPMENT USING THE SAME
A method for monitoring software crash and a medical external equipment and a medical host equipment both using the same, includes selecting a medical host...
2016/0350167 CONDITIONAL PATTERN DETECTOR FOR DETECTING HANGS
A microprocessor comprises a cache including a tag array; a tag pipeline that arbitrates access to the tag array; and a pattern detector. The pattern detector...
2016/0350166 SYSTEMS AND METHODS FOR SMART DIAGNOSIS USING HOSTED RESOURCES WITH INTELLIGENT ALTERING OF BOOT ORDER
Systems and methods smart diagnosis using hosted resources with intelligent altering of boot order. In some embodiments, an Information Handling System (IHS)...
2016/0350165 DETECTING ANOMALOUS ACCOUNTS USING EVENT LOGS
The claimed subject matter includes techniques for detecting anomalous accounts. An example method includes receiving, via a processor, a list of monitored...
2016/0350164 DATA INTEGRITY CHECK WITHIN A DATA PROCESSING SYSTEM
A memory system includes a memory array, control circuitry, and comparator circuitry. The memory array includes a first section having a first plurality of...
2016/0350163 CONCURRENT VALIDATION OF HARDWARE UNITS
A method includes holding a definition of multiple software-implemented tests for testing one or more hardware units of an Integrated Circuit (IC), and of...
2016/0350162 Detector For High Frequency Interrupts
High frequency detection of interrupts includes incrementing a count by a first number in response to at least one interrupt. The count is decremented by a...
2016/0350161 MULTIPLE PROCESSOR MODES EXECUTION METHOD AND APPARATUS INCLUDING SIGNAL HANDLING
Apparatuses, methods and storage media associated with multiple processor modes execution are described herein. In embodiments, an apparatus may include a...
2016/0350160 Method and Apparatus for Managing Workflows for Communication Network Provisioning
According to the teachings herein, provisioning operations carried out via electronic processing in a communication network (60) benefit from the use of...
2016/0350159 EFFICIENT CRITICAL THREAD SCHEDULING FOR NON-PRIVILEGED THREAD REQUESTS
An operating system interface, responsive to detecting a non-privileged thread request with a scheduling attribute set to a critical setting to request access...
2016/0350158 EFFICIENT CRITICAL THREAD SCHEDULING FOR NON-PRIVILEGED THREAD REQUESTS
An operating system interface, responsive to detecting a non-privileged thread request with a scheduling attribute set to a critical setting to request access...
2016/0350157 DYNAMIC THREAD POOL MANAGEMENT
Aspects of the disclosure provide for mechanisms for dynamically managing thread pools in a computer system. A method of the disclosure includes receiving a...
2016/0350156 METHOD FOR PERFORMING PROCESSOR RESOURCE ALLOCATION IN AN ELECTRONIC DEVICE, AND ASSOCIATED APPARATUS
A method for performing processor resource allocation in an electronic device is provided, where the method may include the steps of: obtaining task-related...
2016/0350155 SYNTHESIZING INPUTS TO PRESERVE FUNCTIONALITY
A computer implemented method of preserving functionality in a computer program by generating customized mock inputs may include identifying a set of...
2016/0350154 MEMORY ALLOCATION IN DISTRIBUTED MEMORIES FOR MULTIPROCESSING
In some aspects, finer grained parallelism is achieved by segmenting programmatic workloads into smaller discretized portions, where a first element can be...
2016/0350153 Event-Driven Multi-Tenant Computer-Management Platform
Computer implemented techniques comprise instructions configured to cause a processor to obtain routines, receive a user defined set of obtained routines to...
2016/0350152 BANDWIDTH/RESOURCE MANAGEMENT FOR MULTITHREADED PROCESSORS
Systems and methods relate to managing shared resources in a multithreaded processor comprising two or more processing threads. Danger levels for the two or...
2016/0350151 SYSTEM AND METHOD FOR ROUTING NETWORK FRAMES BETWEEN VIRTUAL MACHINES
VM-to-VM switching is an enhancement to Ethernet card technology that enables virtual machines on the same hardware server platform to switch Ethernet Frames...
2016/0350150 HANDOFF OF VIRTUAL MACHINES BASED ON SECURITY REQUIREMENTS
A computer system transitions a virtual machine from a host computer to a target computer having a security key. The host computer transfers a security phrase...
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