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A display apparatus includes: a first substrate including a display area and a non-display area adjacent to the display area; a second substrate facing the...
DISPLAY DEVICE AND FABRICATION METHOD THEREOF
A display device having a display area and a non-display area includes a substrate, a pixel at the display area, a signal line on the substrate and...
Array Substrate and Manufacturing Method Thereof and Display Panel
An array substrate and manufacturing method thereof and a display panel are disclosed. The manufacturing method of an array substrate includes: forming...
NON-VOLATILE MEMORY DEVICE
A non-volatile memory device includes a conductive layer, a first electrode layer provided side by side with the conductive layer in a first direction, a...
SEMICONDUCTOR MEMORY DEVICE AND PRODUCTION METHOD THEREOF
A semiconductor memory device according to an embodiment comprises a memory cell array including a stacked body and a semiconductor film, the stacked body...
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
Provided is a fabricating method of a semiconductor device, including the following. Fin structures are formed on a substrate, and the adjacent fin structures...
METHOD OF MAKING A THREE-DIMENSIONAL MEMORY DEVICE HAVING A
HETEROSTRUCTURE QUANTUM WELL CHANNEL
A cylindrical confinement electron gas confined within a two-dimensional cylindrical region can be formed in a vertical semiconductor channel extending through...
GATE-ALL-AROUND VERTICAL GATE MEMORY STRUCTURES AND SEMICONDUCTOR DEVICES,
AND METHODS OF FABRICATING...
Present example embodiments relate generally to methods of fabricating a three-dimensional gate-all-around vertical gate semiconductor structure comprising...
METHODS OF FABRICATING EMBEDDED ELECTRONIC DEVICES INCLUDING CHARGE TRAP
A method of fabricating an embedded electronic device including charge trap memory cells that includes forming a tunnel insulation layer, a charge trap layer...
WING-TYPE PROJECTION BETWEEN NEIGHBORING ACCESS TRANSISTORS IN MEMORY
A flash memory device is disposed on a semiconductor substrate. The flash memory device includes flash memory cells arranged in rows and columns. Respective...
MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE
A manufacturing method of a semiconductor memory device is provided. The semiconductor memory device can suppress current leakage generated during a...
SELF-ALIGNED FLASH MEMORY DEVICE WITH WORD LINE HAVING REDUCED HEIGHT AT
OUTER EDGE OPPOSITE TO GATE STACK
The present disclosure relates to a flash memory device, and associated methods. In some embodiments, the flash memory device has a gate stack with a control...
MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
A memory device, including a first memory region including a first substrate, a plurality of first semiconductor devices on the first substrate, and a first...
FinFETs with Different Fin Heights
An integrated circuit structure includes a semiconductor substrate including a first portion in a first device region, and a second portion in a second device...
SEMICONDUCTOR DEVICE HAVING STRESSOR AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a substrate, a fin active region pattern on the substrate, the fin active region pattern including an upper region and a lower...
SEMICONDUCTOR MEMORY DEVICE HAVING AN ELECTRICALLY FLOATING BODY
An IC may include an array of memory cells formed in a semiconductor, including memory cells arranged in rows and columns, each memory cell may include a...
MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
A memory device that is as small in area as possible and has an extremely long data retention period. A transistor with extremely low leakage current is used...
METHOD AND STRUCTURE TO FORM TENSILE STRAINED SIGE FINS AND COMPRESSIVE
STRAINED SIGE FINS ON A SAME SUBSTRATE
A method of forming a semiconductor structure that includes compressive strained silicon germanium alloy fins having a first germanium content and tensile...
SEMICONDUCTOR DEVICE HAVING MULTIWORK FUNCTION GATE PATTERNS
A semiconductor device includes a semiconductor substrate having a first area and a second area, and a first gate pattern on the first area and a second gate...
SEMICONDUCTOR DEVICE INCLUDING TRANSISTORS HAVING DIFFERENT THRESHOLD
A semiconductor device includes first through fourth areas, first through fourth gate stacks, the first gate stack includes a first high-dielectric layer, a...
METHOD FOR FORMING HIGH VOLTAGE TRANSISTOR
A method for forming a high voltage transistor is provided. First, a substrate having a top surface is provided, following by forming a thermal oxide layer on...
Electronic Devices and Systems, and Methods for Making and Using the Same
Some structures and methods to reduce power consumption in devices can be implemented largely by reusing existing bulk CMOS process flows and manufacturing...
COMPACT GUARD RING STRUCTURE FOR CMOS INTEGRATED CIRCUITS
An integrated circuit includes an active device formed in a semiconductor layer of a first conductivity type, a first guard ring of the first conductivity type...
SELF-ALIGNED SOURCE/DRAIN CONTACTS
A semiconductor substrate includes lower source/drain (S/D) regions. A replacement metal gate (RMG) structure is arranged upon the semiconductor substrate...
A semiconductor device includes a semiconductor substrate and a fin positioned above the semiconductor substrate, wherein the fin includes a semiconductor...
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
A semiconductor device includes a first fin-shaped pattern and a second fin-shaped pattern arranged in a row in a direction, a trench between the first...
Semiconductor devices are provided. The semiconductor device includes a first fin portion and a second fin portion arranged on a substrate and extended in a...
HIGH-IMPLANT CHANNEL SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE
A method for manufacturing a semiconductor device including an upper-channel implant transistor is provided. The method includes forming one or more fins...
BURIED CHANNEL SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A method for manufacturing a semiconductor device includes forming one or more fins extending in a first direction over a substrate. The one or more fins...
Double-Sided Vertical Semiconductor Device With Thinned Substrate
A vertical semiconductor device is formed in a semiconductor layer having a first surface, a second surface and background doping. A first doped region, doped...
SYSTEMS AND METHODS FOR INCREASING PACKING DENSITY IN A SEMICONDUCTOR CELL
Systems and methods are provided for using and manufacturing a semiconductor device. A semiconductor device comprises an array of transistors, wherein each...
METHODS OF FORMING V0 STRUCTURES FOR SEMICONDUCTOR DEVICES BY FORMING A
PROTECTION LAYER WITH A NON-UNIFORM...
One illustrative method disclosed herein includes, among other things, forming a source/drain contact structure between two spaced-apart transistor gate...
DEVICES RELATED TO BARRIER FOR METALLIZATION OF GALLIUM BASED
Disclosed are structures and methods related to a barrier layer for metallization of a selected semiconductor such as indium gallium phosphide (InGaP). In some...
SEMICONDUCTOR DEVICE WITH SCHOTTKY DIODE AND MANUFACTURING METHOD THEREOF
A semiconductor device with an embedded schottky diode and a manufacturing method thereof are provided. A semiconductor device having a schottky diode include:...
COMPOUND SEMICONDUCTOR DEVICES HAVING BURIED RESISTORS FORMED IN BUFFER
Structures and methods are provided for fabricating a semiconductor device (e.g., III-V compound semiconductor device) having buried resistors formed within a...
ELECTROSTATIC DISCHARGE PROTECTION DEVICE
An electrostatic discharge (ESD) protection device includes a first trigger element and a first silicon control rectifier (SCR) element. The first trigger...
Oversized Contacts and Vias in Layout Defined by Linearly Constrained
A rectangular-shaped interlevel connection layout structure is defined to electrically connect a first layout structure in a first chip level with a second...
Integrated Circuit with Elongated Coupling
An integrated circuit comprises a first layer on a first level. The first layer comprises a set of first lines. The first lines each have a length and a width....
SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, METHOD FOR
GENERATING MASK DATA, MASK AND COMPUTER...
A semiconductor device has first wiring layers and a plurality of dummy wiring layers that are provided on the same level as the first wiring layers. The...
Semiconductor Device and Method of Manufacturing
A semiconductor device includes a first chip, a dielectric layer over the first chip, and a second chip over the dielectric layer. A conductive layer is...
INTERPOSER FOR A PACKAGE-ON-PACKAGE STRUCTURE
A package-on-package (PoP) structure includes a first die, a second die, and a memory device electrically coupled to the first die and the second die by an...
METHODS OF MANUFACTURING MULTI DIE SEMICONDUCTOR DEVICE PACKAGES AND
Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first...
THREE DIMENSIONAL STRUCTURES WITHIN MOLD COMPOUND
A method including forming at least one passive structure on a substrate by a build-up process; introducing one or more integrated circuit chips on the...
LIGHT EMITTING DEVICE PACKAGE AND LIGHT EMITTING DEVICE PACKAGE MODULE
Disclosed herein is a light emitting device package and a light emitting device package module. The light emitting device package includes: a base including a...
POWER SEMICONDUCTOR MODULE
A power semiconductor module includes: a positive arm and a negative arm that are formed by series connection of self-arc-extinguishing type semiconductor...
Semiconductor Package for Thermal Dissipation
A first package is bonded to a first substrate with first external connections and second external connections. The second external connections are formed...
STACKED SEMICONDUCTOR PACKAGES, METHODS FOR FABRICATING THE SAME, AND/OR
SYSTEMS EMPLOYING THE SAME
An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first...
SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
Provided is a method for manufacturing a semiconductor package, which includes providing a first substrate, providing, over the first substrate, a second...
OPOSSUM-DIE PACKAGE-ON-PACKAGE APPARATUS
An apparatus including a first package coupled to a second package, wherein each of the first package and the second package has a first side and an opposite...
DIFFUSION SOLDER BONDING USING SOLDER PREFORMS
A method includes providing a first and a second joining partner each having a first main surface, wherein at least a portion of the first main surfaces of the...