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Patent # Description
2016/0365459 THIN FILM TRANSISTOR, MANUFACTURING METHOD OF THE SAME, AND DISPLAY DEVICE WITH THE THIN FILM TRANSISTOR
A thin film transistor includes an insulating pattern disposed on a substrate, a gate electrode disposed on the insulating pattern, a gate insulating layer...
2016/0365458 ARRAY SUBSTRATE, METHOD FOR PRODUCING THE SAME AND DISPLAY DEVICE
Disclosed are an array substrate, a method for producing the same and a display device including the same. The array substrate includes a substrate; a first...
2016/0365457 FIELD EFFECT TRANSISTORS AND METHODS OF FORMING SAME
Semiconductor devices and methods of forming the same are provided. A first source/drain layer is formed over a substrate. A channel layer is formed over the...
2016/0365456 SEMI-FLOATING GATE FET
A semi-floating gate transistor is implemented as a vertical FET built on a silicon substrate, wherein the source, drain, and channel are vertically aligned,...
2016/0365455 Thin-Film Transistor and Method for Manufacturing Same
The present invention provides a thin-film transistor in which transistor characteristics such as drain current and threshold voltage are improved, and a...
2016/0365454 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
Electrical characteristics of a semiconductor device including the oxide semiconductor are improved. Furthermore, a highly reliable transistor with small...
2016/0365453 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A semiconductor device includes a first fin-type pattern on a substrate, having a first sidewall and a second sidewall opposed to each other; a first trench...
2016/0365452 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least a fin-shaped structure...
2016/0365451 DEVICES AND METHODS OF FORMING UNMERGED EPITAXY FOR FINFET DEVICE
Devices and methods of growing unmerged epitaxy for fin field-effect transistor (FinFet) devices are provided. One method includes, for instance: obtaining a...
2016/0365450 SPACER CHAMFERING GATE STACK SCHEME
A method of forming a gate structure for a semiconductor device that includes forming first spacers on the sidewalls of replacement gate structures that are...
2016/0365449 STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a ...
2016/0365448 SEMICONDUCTOR STRUCTURE HAVING ENLARGED REGROWTH REGIONS AND MANUFACTURING METHOD OF THE SAME
The present disclosure provides a semiconductor structure, including: an insulation region including a top surface; a semiconductor fin protruding from the top...
2016/0365447 Channel Strain Inducing Architecture and Doping Technique at Replacement Poly Gate (RPG) Stage
The demand for increased performance and shrinking geometry from ICs has brought the introduction of multi-gate devices including finFET devices. Inducing a...
2016/0365446 FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE STRUCTURE WITH STOP LAYER AND METHOD FOR FORMING THE SAME
A FinFET device structure and method for forming the same are provided. The FinFET device structure includes a stop layer formed over a substrate and a fin...
2016/0365445 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
According to one embodiment, a semiconductor device includes a semiconductor substrate, a first film, a conductive member and a second film. The first film is...
2016/0365444 Semiconductor Device Having Electrically Floating Body Transistor, Semiconductor Device Having Both Volatile...
A semiconductor memory cell includes a floating body region configured to be charged to a level indicative of a state of the memory cell; a first region in...
2016/0365443 Transistor with Improved Avalanche Breakdown Behavior
A transistor cell includes a drift region, a source region, a body region, and a drain region that is laterally spaced apart from the source region. A gate...
2016/0365442 SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD FOR SAME
A semiconductor device that has a source region, a channel region, and a drain region disposed in order from a surface of the semiconductor device in a...
2016/0365441 Transistor with Field Electrodes and Improved Avalanche Breakdown Behavior
A transistor cell includes, in a semiconductor body, a drift region of a first doping type, a source region of the first doping type, a body region of a second...
2016/0365440 SEMICONDUCTOR DEVICES
Semiconductor devices are provided. A semiconductor device includes a channel. The semiconductor device includes a gate structure having first and second...
2016/0365439 Vertical Semiconductor Device Structure and Method of Forming
Vertical gate all-around (VGAA) structures are described. In an embodiment, a structure including a first doped region in a substrate, a first vertical channel...
2016/0365438 METHOD OF MANUFACTURING NITRIDE SEMICONDUCTOR DEVICE AND NITRIDE SEMICONDUCTOR DEVICE
The region having the surface roughness has nitrogen vacancies, which serve as compensating donors for acceptors and therefore cannot achieve a sufficiently...
2016/0365437 ELECTRIC FIELD MANAGEMENT FOR A GROUP III-NITRIDE SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate, a first active layer, a second active layer, at least first and second electrodes, an E-field management layer,...
2016/0365436 High-voltage Nitride Device and Manufacturing Method Thereof
A high-voltage nitride device which can avoid vertical breakdown and has a high breakdown voltage includes: a silicon substrate; a nitride epitaxial layer,...
2016/0365435 III-N TRANSISTORS WITH EPITAXIAL LAYERS PROVIDING STEEP SUBTHRESHOLD SWING
III-N transistors with epitaxial semiconductor heterostructures having steep subthreshold slope are described. In embodiments, a III-N HFET employs a gate...
2016/0365434 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
In mesa regions between adjacent trenches disposed in an n.sup.--type drift layer and in which a first gate electrode is disposed via a first gate insulating...
2016/0365433 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes trench gate electrodes, an emitter coupling section that couples them with each other, an interlayer insulating film arranged...
2016/0365432 PUNCH THROUGH STOPPER IN BULK FINFET DEVICE
A method of forming a semiconductor device that includes forming a fin structure from a bulk semiconductor substrate and forming an isolation region contacting...
2016/0365431 METHOD FOR FORMING SEMICONDUCTOR STRUCTURE
The present invention provides a semiconductor structure, including a substrate, having a fin structure disposed thereon, a gate structure, crossing over parts...
2016/0365430 THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
Embodiments of the present invention provide a thin film transistor and a manufacturing method thereof, an array substrate including the thin film transistor,...
2016/0365429 PATTERNING OF VERTICAL NANOWIRE TRANSISOR CHANNEL AND GATE WITH DIRECTED SELF ASSEMBLY
Directed self-assembly (DSA) material, or di-block co-polymer, to pattern features that ultimately define a channel region a gate electrode of a vertical...
2016/0365428 DUMMY GATE STRUCTURE AND METHODS THEREOF
A structure and method for implementation of dummy gate structures within multi-gate device structures includes a semiconductor device including an isolation...
2016/0365427 COMPOUND VARACTOR
The present disclosure provides a method for fabricating a compound varactor. The method includes steps of depositing a collector layer, depositing a first...
2016/0365426 DEVICES INCLUDING GATE SPACER WITH GAP OR VOID AND METHODS OF FORMING THE SAME
Devices and structures that include a gate spacer having a gap or void are described along with methods of forming such devices and structures. In accordance...
2016/0365425 FREESTANDING SPACER HAVING SUB-LITHOGRAPHIC LATERAL DIMENSION AND METHOD OF FORMING SAME
An aspect of the invention includes a freestanding spacer having a sub-lithographic dimension for a sidewall image transfer process. The freestanding spacer...
2016/0365424 SELF-ALIGNED TRENCH SILICIDE PROCESS FOR PREVENTING GATE CONTACT TO SILICIDE SHORTS
A method of forming a finFET device includes forming a plurality of fins on a substrate; forming a plurality of dummy gate structures over the plurality of...
2016/0365423 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
The present invention discloses a manufacturing method for a semiconductor device. The manufacturing method includes: providing a substrate; forming a...
2016/0365422 INTEGRATED CIRCUIT DEVICES WITH COUNTER-DOPED CONDUCTIVE GATES
Integrated circuit devices with counter-doped conductive gates. The devices have a semiconductor substrate that has a substrate surface. The devices also have...
2016/0365421 Semiconductor Device And Manufacturing Method Thereof
A technique of improving the barrier height between an electrode layer and a semiconductor layer is provided. A semiconductor device comprises a semiconductor...
2016/0365420 SELF-ALIGNED CHANNEL-ONLY SEMICONDUCTOR-ON-INSULATOR FIELD EFFECT TRANSISTOR
In one example, a field effect transistor includes a fin. The fin includes a conducting channel formed from semiconductor-on-insulator and source/drain regions...
2016/0365419 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes first, a second, and third semiconductor layers respectively made of a nitride semiconductor and stacked on a substrate, a...
2016/0365418 Ga2O3 SEMICONDUCTOR ELEMENT
A Ga.sub.2O.sub.3-based semiconductor element includes a .beta.-Ga.sub.2O.sub.3 substrate including a first conductivity type, a first .beta.-Ga.sub.2O.sub.3...
2016/0365417 SEMICONDUCTOR DEVICE
A semiconductor device includes a first nitride semiconductor layer including carbon and having a first side and an opposing second side. The semiconductor...
2016/0365416 SELECTIVE EPITAXIALLY GROWN III-V MATERIALS BASED DEVICES
An embodiment includes a III-V material based device, comprising: a first III-V material based buffer layer on a silicon substrate; a second III-V material...
2016/0365415 MANUFACTURING METHOD OF GRAPHENE DEVICE
A graphene device is manufactured by forming on a substrate a pattern with a material that contains carbon, and growing graphene on the substrate where the...
2016/0365414 FINFET Structures and Methods of Forming the Same
FinFETs and methods of forming finFETs are described. According to some embodiments, a structure includes a channel region, first and second source/drain...
2016/0365413 Semiconductor Device with Reduced Emitter Efficiency
A method of producing a semiconductor device includes providing a semiconductor body having a front side 10-1 and a back side, wherein the semiconductor body...
2016/0365412 LDMOS TRANSISTOR AND METHOD OF FORMING THE LDMOS TRANSISTOR WITH IMPROVED RDS*CGD
The Rds*Cgd figure of merit (FOM) of a laterally diffused metal oxide semiconductor (LDMOS) transistor is improved by forming the drain drift region with a...
2016/0365411 SERIES RESISTANCE REDUCTION IN VERTICALLY STACKED SILICON NANOWIRE TRANSISTORS
Embodiments are directed to a method of fabricating a portion of a nanowire field effect transistor (FET). The method includes forming a sacrificial layer and...
2016/0365410 SEMICONDUCTOR DEVICE HAVING BURIED LAYER
A semiconductor device includes a substrate having a first conductivity type, a high-voltage well having a second conductivity type and disposed in the...
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