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Patent # Description
2016/0364358 UNIVERSAL INPUT DEVICE DRIVER
Methods, systems, means and machine-readable media embodying program instructions for using a virtual input device to create compatible control signals for a...
2016/0364357 PORTABLE, COMPUTER-PERIPHERAL APPARATUS INCLUDING A UNIVERSAL SERIAL BUS (USB) CONNECTOR
A portable computer-peripheral apparatus comprises a Universal Serial Bus (USB) connector. The apparatus is operable to communicate with a computer terminal...
2016/0364356 MICRO SERVER AND SWITCH DEVICE THEREOF
A micro server is provided. The micro server includes a plurality of computer boards, at least one switch device, and a baseboard. The plurality of computer...
2016/0364355 CONTROL SYSTEM FOR SERVER
A control system includes a switch circuit, a buffering circuit, and a motherboard. The switch circuit is configured to output a switch signal having a trigger...
2016/0364354 SYSTEM AND METHOD FOR COMMUNICATING WITH SERIALLY CONNECTED DEVICES
A system for communicating with a plurality of serially connected devices includes: a link master connected with one of the devices; a plurality of devices...
2016/0364353 I3C HIGH DATA RATE (HDR) ALWAYS-ON IMAGE SENSOR 8-BIT OPERATION INDICATOR AND BUFFER OVER THRESHOLD INDICATOR
A method for enabling 8-bit data word access over a protocol limited to 16-bit data word access is provided. Data may be encapsulated within the lowest 19 bits...
2016/0364352 LOW LATENCY DATA EXCHANGE BETWEEN PROCESSING ELEMENTS
Direct communication of data between processing elements is provided. An aspect includes sending, by a first processing element, data over an inter-processing...
2016/0364351 SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM INCLUDING THE SAME, CONTROL METHOD OF SEMICONDUCTOR DEVICE, AND...
A semiconductor device is provided which can quickly detect a malfunction of high priority modules by frequently checking a coupling state between the high...
2016/0364350 METHODS AND APPARATUS FOR SYNCHRONIZING UPLINK AND DOWNLINK TRANSACTIONS ON AN INTER-DEVICE COMMUNICATION LINK
Methods and apparatus for a synchronized multi-directional transfer on an inter-processor communication (IPC) link. In one embodiment, the synchronized...
2016/0364349 COMPUTER
A computer, on which operating systems run, the computer comprising a virtualization function module configured to manage virtual computers. A operating system...
2016/0364348 Systems and Methods Involving Data Bus Inversion Memory Circuitry, Configuration(s) and/or Operation
Systems, methods and fabrication processes relating to memory devices involving data bus inversion are disclosed. According to one illustrative implementation,...
2016/0364347 MEMORY SYSTEM DESIGN USING BUFFER(S) ON A MOTHER BOARD
A mother board topology including a processor operable to be coupled to one or more communication channels for communicating commands. The topology includes a...
2016/0364346 DATA ACCESSING METHOD AND PCIe STORAGE DEVICE
The present disclosure provides a data accessing method applied to a PCIe storage device. The method comprises: receiving a data reading/writing request sent...
2016/0364345 MEMORY INTERFACE SYSTEM
In some embodiments, a memory interface system includes a memory interface circuit and a memory controller. The memory interface circuit is configured to...
2016/0364344 CACHE STRUCTURE FOR A COMPUTER SYSTEM PROVIDING SUPPORT FOR SECURE OBJECTS
A method (and structure) protects confidentiality and integrity of information in a secure object from other software on the system. An object-id value that...
2016/0364343 SYSTEMS AND METHODS FOR DATA ENCRYPTION
A method of encrypting data on a memory device includes receiving a memory transaction request at an inline encryption engine coupled between a processing core...
2016/0364342 MEMORY PROTECTION UNIT, MEMORY MANAGEMENT UNIT, AND MICROCONTROLLER
A memory protection unit including hardware registers for entering address tables, a configuration memory for storing the address tables, a preconfigured...
2016/0364341 VIRTUALIZATION-BASED PLATFORM PROTECTION TECHNOLOGY
A data processing system (DPS) uses platform protection technology (PPT) to protect some or all of the code and data belonging to certain software modules. The...
2016/0364340 UPDATING PERSISTENT DATA IN PERSISTENT MEMORY-BASED STORAGE
A processor includes a processing core to execute an application comprising instructions encoding a transaction with a persistent memory via a near memory...
2016/0364339 RESERVING A STORAGE AREA AND BUILDING PAGE FRAME TABLE ENTRIES
In one embodiment, a computer-implemented method includes receiving a large frame area (LFAREA) request, including a request for a plurality of page frame...
2016/0364338 SUPPORTING SECURE MEMORY INTENT
A processor for supporting secure memory intent is disclosed. The processor of the disclosure includes a memory execution unit to access memory and a processor...
2016/0364337 MEMORY HAVING A STATIC CACHE AND A DYNAMIC CACHE
The present disclosure includes memory having a static cache and a dynamic cache. A number of embodiments include a memory, wherein the memory includes a first...
2016/0364336 SIZING A WRITE CACHE BUFFER BASED ON EMERGENCY DATA SAVE PARAMETERS
Embodiments relate to saving data upon loss of power. An aspect includes sizing a write cache buffer based on parameters related to carrying out this emergency...
2016/0364335 CLEAR ROUTE CACHE COMMANDS FOR NETWORK COMMUNICATIONS PLATFORMS
Route table cache clear commands may be performed using a communications platform that communicates with a web service and/or terminal emulator. The...
2016/0364334 MANAGING COHERENT MEMORY BETWEEN AN ACCELERATED PROCESSING DEVICE AND A CENTRAL PROCESSING UNIT
Existing multiprocessor computing systems often have insufficient memory coherency and, consequently, are unable to efficiently utilize separate memory...
2016/0364333 HARDWARE BASED COHERENCY BETWEEN A DATA PROCESSING DEVICE AND INTERCONNECT
There is provided a data processing device including an output port to transmit a request value to an interconnect arranged to implement a coherency protocol,...
2016/0364332 DYNAMIC DETECTION AND SOFTWARE CORRECTION OF INCORRECT LOCK AND ATOMIC UPDATE HINT BITS
A hint bit detection and correction method uses two additional bits as part of every cache directory. These bits represent the lwarx and stwcx instructions...
2016/0364331 Memory Circuit and Cache Circuit Configuration
A method of operating a memory circuit is disclosed. The memory circuit comprises a primary memory and a cache memory. The primary memory has P access channels...
2016/0364330 TECHNIQUES FOR AVOIDING CACHE VICTIM BASED DEADLOCKS IN COHERENT INTERCONNECTS
A system and a method are disclosed to control flow of victim transactions received at a coherent interconnect from a coherent device of a processing system. A...
2016/0364329 PROVIDING SERVICE ADDRESS SPACE FOR DIAGNOSTICS COLLECTION
A method and technique are provided for providing a service address space. The method includes providing a service co-processor with a service address space...
2016/0364328 GARBAGE COLLECTION AND OTHER MANAGEMENT OF MEMORY HEAPS
A memory heap management facility is provided that is able to perform various management tasks, including, but not limited to, garbage collection, compaction,...
2016/0364327 SPARSITY-DRIVEN MATRIX REPRESENTATION TO OPTIMIZE OPERATIONAL AND STORAGE EFFICIENCY
Embodiments of the invention relate to sparsity-driven matrix representation. In one embodiment, a sparsity of a matrix is determined and the sparsity is...
2016/0364326 UNIVERSAL PROTOCOL FOR POWER TOOLS
A system and method for communicating with power tools using a universal protocol. The universal protocol may be implemented using a universal core module that...
2016/0364325 SYSTEM AND METHOD FOR CHECKING DATA FOR ERRORS
A system for checking data for errors, the system comprising a checking module operable to check tuples of data stored in a target database for errors, the...
2016/0364324 Dynamic Test Topology Visualization
An approach for dynamic test topology visualization is provided. The approach retrieves test data from one or more databases. The approach retrieves test data...
2016/0364323 AUTOMATIC REMOTE EXECUTION OF AN APPLICATION
Disclosed is a method of preparing and launching a test application on a first machine that is automatically executed on a second machine. A developer can...
2016/0364322 System, Method, and Computer Readable Medium for Universal Software Testing
An automated software resting and validation system allows testing of a software application under test (SAUT) regardless of the dynamic nature of the SAUT. An...
2016/0364321 EMULATING A USER PERFORMING SPATIAL GESTURES
Examples disclosed herein provide tools for capturing spatial gestures performed by a user and scripting the gestures for testing an application under test....
2016/0364320 Dynamic Test Topology Visualization
An approach for dynamic test topology visualization is provided. The approach retrieves test data from one or more databases. The approach retrieves test data...
2016/0364319 ENHANCED BUG RESOLUTION
As disclosed herein a method, executed by a computer, includes launching a session corresponding to a test environment, saving a session context to provide a...
2016/0364318 ENHANCED BUG RESOLUTION
As disclosed herein a method, executed by a computer, includes launching a session corresponding to a test environment, saving a session context to provide a...
2016/0364317 METHOD FOR DEBUGGING A COMPUTER PROGRAM
A debugging method is proposed in the disclosure. A computer running a program generates a master core dump file and one or more slave core dump files in...
2016/0364316 DYNAMIC TRACING FRAMEWORK FOR DEBUGGING IN VIRTUALIZED ENVIRONMENTS
Embodiments of the present invention provide a system and method for a dynamic tracing framework for debugging in a virtualized environment. Embodiment of the...
2016/0364315 FAST DATA RACE DETECTION FOR MULTICORE SYSTEMS
A system and method to parallelize data race detection in multicore machines are disclosed. The system and method does not generally require any change in the...
2016/0364314 RECOGNITION OF OPERATIONAL ELEMENTS BY FINGERPRINT IN AN APPLICATION PERFORMANCE MANAGEMENT SYSTEM
An application performance management system is disclosed. Operational elements are dynamically discovered and extended when changes occur. Programmatic...
2016/0364313 POWER CONSUMPTION ASSESMENT OF AN HVAC SYSTEM
Method, system and product for assessments of an operation of an Heating Ventilation or Air-Conditioning (HVAC) unit. In module for receiving, directly or...
2016/0364312 ELIMINATE CORRUPTED PORTIONS OF CACHE DURING RUNTIME
In an approach for taking corrupt portions of cache offline during runtime, a notification of a section of a cache to be taken offline is received, wherein the...
2016/0364311 SIGNAL DETECTION CARD AND SIGNAL DETECTION SYSTEM
A signal detection system includes a motherboard and a signal detection card. The signal detection card includes a connecting plate, a first interface, and a...
2016/0364310 MANAGING A SET OF TESTS BASED ON OTHER TEST FAILURES
In an approach for managing a set of tests to run on a set of platforms, a processor identifies a set of tests to run on a set of platforms and one or more...
2016/0364309 INPUT/OUTPUT (I/O) LINE TEST DEVICE AND METHOD FOR CONTROLLING THE SAME
An input/output (I/O) line test device and a method for controlling the same are disclosed, which may relate to a technology for testing a base die having no...
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