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Patent # Description
2016/0372204 SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF
Disclosed are a semiconductor device and an operating method thereof. The semiconductor device includes a plurality of memory blocks including cell strings...
2016/0372203 INTELLIGENT FLASH REPROGRAMMING
Apparatus, methods, and computer-readable media for programming, reading, and servicing non-volatile storage device to improve data retention time and data...
2016/0372202 NON-VOLATILE MEMORY DEVICE HAVING MULTIPLE STRING SELECT LINES
Methods and apparatuses are contemplated herein for enhancing the program performance of nonvolatile memory devices. In an example embodiment, a nonvolatile...
2016/0372201 BOOSTING CHANNELS OF MEMORY CELLS
A method for programming a non-volatile memory device includes concurrently boosting channels of memory cells in a selected memory string and an unselected...
2016/0372200 FAST SCAN TO DETECT BIT LINE DISCHARGE TIME
Systems and methods for reducing sensing time for sensing data states stored within a plurality of memory cells are described. In some cases, the ramping of a...
2016/0372199 NON-VOLATILE MEMORY DEVICE, OPERATING METHOD THEREOF, MEMORY SYSTEM INCLUDING THE NON-VOLATILE MEMORY DEVICE,...
An operating method of a non-volatile memory device having a string including a plurality of memory cells and a plurality of auxiliary cells, the plurality of...
2016/0372198 MEMORY DEVICE HAVING ONLY THE TOP POLY CUT
Methods and apparatuses are contemplated herein for enhancing the efficiency of nonvolatile memory devices. In an example embodiment, a nonvolatile memory...
2016/0372197 TERNARY CONTENT ADDRESSABLE MEMORY (TCAM) WITH MAGNETIC TUNNEL JUNCTION (MTJ) DEVICES
A ternary content addressable memory (TCAM) cell is coupled to a first word line and a first match line and includes a first data storage portion coupled to a...
2016/0372196 WRITING METHOD FOR RESISTIVE MEMORY APPARATUS
A writing method for a resistive memory apparatus is provided. In the method, logic data is received, and a corresponding selection memory cell is selected. A...
2016/0372195 RESISTANCE RANDOM ACCESS MEMORY, OPERATING METHOD THEREOF AND OPERATING SYSTEM THEREOF
An operating method, an operating system and a resistance random access memory (ReRAM) are provided. The operating method includes the following steps. A write...
2016/0372194 PROVISION OF HOLDING CURRENT IN NON-VOLATILE RANDOM ACCESS MEMORY
Embodiments of the present disclosure describe techniques and configurations for controlling current in a non-volatile random access memory (NVRAM) device. In...
2016/0372193 INTEGRATED SETBACK READ WITH REDUCED SNAPBACK DISTURB
Embodiments of the present disclosure describe read and write operations in phase change memory to reduce snapback disturb. In an embodiment, an apparatus...
2016/0372192 METHOD AND APPARATUS FOR FASTER DETERIMATION OF CELL STATE OF A RESISTIVE MEMORY CELL USING A PARALLEL RESISTOR
A device for determining an actual cell state of a resistive memory cell having a plurality M of programmable cell states comprising a sensing circuit, a...
2016/0372191 NONVOLATILE SEMICONDUCTOR STORAGE APPARATUS
A nonvolatile semiconductor storage apparatus is provided. To a data node and a reference node, a first transistor and a second transistor are respectively...
2016/0372190 METHOD OF READING AN ELECTRONIC MEMORY DEVICE
A method for reading an electronic memory device including N memory cells Ci with 1.gtoreq.i.gtoreq.N and N.gtoreq.2, each cell Ci having a resistance Ri, the...
2016/0372189 LOW READ CURRENT ARCHITECTURE FOR MEMORY
A low read current architecture for memory. Bit lines of a cross point memory array are allowed to be charged by a selected word line until a minimum voltage...
2016/0372188 PHASE CHANGE MEMORY WITH INTER-GRANULAR SWITCHING
A memory device comprising a conglomerate material interposed between a first electrode and a second electrode is provided. The conglomerate material includes...
2016/0372187 DETERMINING A CELL STATE OF A RESISTIVE MEMORY CELL
A sensing circuit senses a sensing voltage of a resistive memory cell and outputs a resultant value in response to the sensing voltage which is indicative for...
2016/0372186 NONVOLATILE MEMORY SYSTEM AND OPERATING METHOD THEREOF
A nonvolatile memory system includes a nonvolatile memory device including a nonvolatile memory device including a multi-level cell which stores M-bit data, M...
2016/0372185 Methods of Operating Non-Volatile Memory Devices
A method of operating a non-volatile memory device includes receiving program data and a program address. Memory cells that correspond to the program address...
2016/0372184 Programming Schemes for Multi-Level Analog Memory Cells
A method for data storage includes storing first data bits in a set of multi-bit analog memory cells at a first time by programming the memory cells to assume...
2016/0372183 OPTOELECTRONIC DEVICE, IN PARTICULAR MEMORY DEVICE
A memory device may include an access transistor, and a memory cell configured to store an item of information. The memory cell may include first and second...
2016/0372182 Two-Port SRAM Connection Structure
A static random access memory (SRAM) device is provided in accordance with some embodiments. The SRAM device comprises a plurality of two-port SRAM arrays,...
2016/0372181 MEMORY CIRCUIT HAVING SHARED WORD LINE
A memory circuit includes first and second memory cells. The first memory cell has an access port having a pass gate. The second memory cell also has an access...
2016/0372180 STATIC RANDOM ACCESS MEMORY
The invention concerns a static random access memory (SRAM) comprising: a plurality of memory cells each having a pair of cross-coupled inverters (102, 104), a...
2016/0372179 HARDWARE-BASED COMPRESSION RATIO IMPROVEMENT
A plurality of stored data sequences that match one or more search data sequences are determined. Each of the stored data sequences of the plurality of stored...
2016/0372178 SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS INCLUDING THE SAME
A semiconductor system includes a controller and a semiconductor device. The controller outputs pre-order address signals, post-order address signals, and an...
2016/0372177 APPARATUSES AND METHODS FOR PERFORMING AN EXCLUSIVE OR OPERATION USING SENSING CIRCUITRY
The present disclosure includes apparatuses and methods related to determining an XOR value in memory. An example method can include performing a NAND...
2016/0372176 SENSE AMPLIFIER DRIVING DEVICE
A sense amplifier driving device, and more particularly, a technology for improving the post overdriving operation characteristic of a semiconductor device. A...
2016/0372175 MULTI-CHIP PACKAGE AND OPERATING METHOD THEREOF
A multi-chip package includes a plurality of semiconductor devices each having an address which is designated based on unique values corresponding to the...
2016/0372174 SEMICONDUCTOR STORAGE DEVICE USING STT-MRAM
A memory circuit (100) includes a plurality of memory cells (50), an N-type MOSFET (30a) and an N-type MOSFET (30b). The drain of the N-type MOSFET (30a) is...
2016/0372173 SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS INCLUDING THE SAME
A semiconductor device may include a buffer control signal generation circuit, an input control signal generation circuit and an internal data generation...
2016/0372172 SEMICONDUCTOR MEMORY APPARATUS
A semiconductor memory apparatus may include a driving voltage-applying unit and a sub-word line-driving unit. The driving voltage-applying unit may be...
2016/0372171 SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND METHOD FOR USE IN OPERATING THE SAME BASED ON OPERATION MODE...
A semiconductor device includes a flag signal generating circuit, a reference voltage generating circuit, and a first buffer. The flag signal generating...
2016/0372170 APPARATUSES AND METHODS FOR CHIP IDENTIFICATION IN A MEMORY PACKAGE
Apparatuses, methods, memory packages, and semiconductor chips are disclosed. An example apparatus includes a semiconductor chip including a layer...
2016/0372169 MEMORY DEVICES WITH IMPROVED REFRESHING OPERATION
A method and a system for memory cell programming and erasing with refreshing operation are disclosed. The system includes a selecting module, a processing...
2016/0372168 MEMORY ARRAY
An electronic memory array includes a plurality of memory domains, a current controller, and a selector device. Each memory domain includes a plurality of bit...
2016/0372167 HIGH-SPEED PSEUDO-DUAL-PORT MEMORY WITH SEPARATE PRECHARGE CONTROLS
A pseudo-dual-port (PDP) memory such as a PDP SRAM is provided that independently controls the bit line precharging and the sense amplifier precharging to...
2016/0372166 INPUT/OUTPUT CIRCUIT AND INPUT/OUTPUT DEVICE INCLUDING THE SAME
An input/output circuit according to an embodiment includes a plurality of memory cell units configured to independently perform output operations, each of the...
2016/0372165 DATA SHIFTING
The present disclosure includes apparatuses and methods related to data shifting. An example apparatus comprises a first memory cell coupled to a first sense...
2016/0372164 LATCHING CURRENT SENSING AMPLIFIER FOR MEMORY ARRAY
A latching current sensing amplifier circuit for memory arrays and a current sensing technique using the latching current sensing amplifier circuit are...
2016/0372163 MEMORY CIRCUIT
The present invention relates to a memory circuit comprising: at least one bit cell for storing data and having a first terminal and a second terminal, wherein one...
2016/0372162 SENSE AMPLIFIER DRIVING DEVICE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
An embodiment relates to a sense amplifier driving device for stabilizing bit line precharge power when a post-overdriving operation is performed. The sense...
2016/0372161 DATA STORAGE DEVICE AND OPERATING METHOD THEREOF
A data storage device includes a nonvolatile memory apparatus including a target region; and a controller suitable for performing a read voltage adjustment...
2016/0372160 Memory System and method for power management
A memory system and method for power management are disclosed. In one embodiment, a memory system maintains a variable credit value indicating an amount of...
2016/0372159 SEMICONDUCTOR MEMORY SYSTEM
According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a...
2016/0372158 Methods, systems, and computer program products for managing video information
Recorded video information is managed by annotation markers. The recorded video information is annotated with at least one marker and the annotated video...
2016/0372157 DISPLAY CONTROL APPARATUS, DISPLAY CONTROL METHOD, AND STORAGE MEDIUM
A display control apparatus includes an acquisition unit that acquires recording period information about recording periods of images captured by a plurality...
2016/0372156 IMAGE FETCHING FOR TIMELINE SCRUBBING OF DIGITAL MEDIA
The present disclosure describes systems and techniques relating to generating three dimensional (3D) models from range sensor data. According to an aspect,...
2016/0372155 VIDEO BIT PROCESSING
A video bit processing system accesses video content. The video bit processing system has components that operate on a server and on a personal computing...
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