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Patent # Description
2016/0380107 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device capable of high speed operation is provided. Further, a highly reliable semiconductor device is provided. An oxide semiconductor having...
2016/0380106 SEMICONDUCTOR DEVICE
In a transistor having a top-gate structure in which a gate electrode layer overlaps with an oxide semiconductor layer which faints a channel region with a...
2016/0380105 OXIDE THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME, ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING...
The present invention provides an oxide thin film transistor and a method for manufacturing the same, an array substrate and a method for manufacturing the...
2016/0380104 III-V GATE-ALL-AROUND FIELD EFFECT TRANSISTOR USING ASPECT RATIO TRAPPING
Embodiments of the invention provide methods for forming III-V gate-all-around field effect transistors on silicon substrates that utilize Aspect-Ratio...
2016/0380103 Novel Fin Structure of FinFet
A fin structure disposed over a substrate and a method of forming a fin structure are disclosed. The fin structure includes a mesa, a channel disposed over the...
2016/0380102 DIFFUSED TIP EXTENSION TRANSISTOR
A method including forming an opening in a junction region of a fin on and extending from a substrate; introducing a doped semiconductor material in the...
2016/0380101 SUPPRESSION OF BACK-GATE TRANSISTORS IN RF CMOS SWITCHES BUILT ON AN SOI SUBSTRATE
The present disclosure relates to a silicon-on-insulator (SOI) substrate structure with a buried dielectric layer for radio frequency (RF) complementary...
2016/0380100 FDSOI VOLTAGE REFERENCE
An integrated circuit having a reference device and method of forming the same. A reference device is disclosed having: a fully depleted n-type MOSFET...
2016/0380099 METHOD FOR PRODUCING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
A method for producing a semiconductor device includes a first step of forming a fin-shaped semiconductor layer on a semiconductor substrate and forming a...
2016/0380098 DOUBLE EXPONENTIAL MECHANISM CONTROLLED TRANSISTOR
The present disclosure relates to a tunnel FET device with a steep sub-threshold slope, and a corresponding method of formation. In some embodiments, the...
2016/0380097 LATERAL SUPER-JUNCTION MOSFET DEVICE AND TERMINATION STRUCTURE
A lateral superjunction MOSFET device includes a gate structure and a first column connected to the lateral superjunction structure. The lateral superjunction...
2016/0380096 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor layer. A first conductivity type region is formed on a base layer portion of the semiconductor layer. A body...
2016/0380095 HIGH VOLTAGE FINFET STRUCTURE WITH SHAPED DRIFT REGION
Devices and methods for a high voltage FinFET with a shaped drift region include a lateral diffusion metal oxide semiconductor (LDMOS) FinFET having a...
2016/0380094 FIELD EFFECT TRANSISTORS WITH STRAINED CHANNEL FEATURES
A method is provided for forming an integrated circuit. A doped silicon layer is formed on a silicon substrate. A silicon-germanium layer is subsequently...
2016/0380093 VERTICAL SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
The present invention discloses a vertical semiconductor device and a manufacturing method thereof. The vertical semiconductor device includes: a substrate...
2016/0380092 III-Nitride Power Semiconductor Device
A power semiconductor device includes a III-nitride heterojunction body including a first III-nitride body and a second III-nitride body having a different...
2016/0380091 NITRIDE SEMICONDUCTOR DEVICE
A nitride semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer located on the first nitride semiconductor...
2016/0380090 GaN SEMICONDUCTOR DEVICE STRUCTURE AND METHOD OF FABRICATION BY SUBSTRATE REPLACEMENT
Devices and systems comprising high current/high voltage GaN semiconductor devices are disclosed. A GaN die, comprising a lateral GaN transistor, is sandwiched...
2016/0380089 HIGH VOLTAGE DEVICE WITH MULTI-ELECTRODE CONTROL
A high-voltage transistor (HVT) structure adapts a low-voltage transistor (LVT) to high-voltage environments. The HVT structure includes a drain node, a source...
2016/0380088 BIPOLAR JUNCTION TRANSISTORS WITH A BURIED DIELECTRIC REGION IN THE ACTIVE DEVICE REGION
Device structure and fabrication methods for a bipolar junction transistor. A trench isolation region is formed that bounds an active device region along a...
2016/0380087 LATERAL BIPOLAR JUNCTION TRANSISTOR (BJT) ON A SILICON-ON-INSULATOR (SOI) SUBSTRATE
A bipolar transistor is supported by a substrate including a semiconductor layer overlying an insulating layer. A transistor base is formed by a base region in...
2016/0380086 DEVICE PARAMETER NORMALIZATION ABOUT A PERIPHERY OF A NON-CIRCULAR EMITTER OF A LATERAL BIPOLAR TRANSISTOR
Apparatus and associated methods relate to varying the base width around a non-circular emitter of a lateral bipolar transistor to vary a device parameter so...
2016/0380085 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE STRUCTURE
A method of manufacturing a semiconductor device includes receiving a FinFET precursor including a fin structure formed between some isolation regions, and a...
2016/0380084 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
A method of fabricating a semiconductor device is provided. A plurality of target patterns is formed on a substrate. The plurality of target patterns is...
2016/0380083 NANOWIRE SEMICONDUCTOR DEVICE INCLUDING LATERAL-ETCH BARRIER REGION
A semiconductor device includes a semiconductor-on-insulator wafer having a buried oxide layer. The buried oxide layer includes therein opposing etch barrier...
2016/0380082 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device includes forming an active fin extending longitudinally in a first direction along a surface of a substrate,...
2016/0380081 FINFET AND METHOD OF FABRICATING THE SAME
A FinFET includes a substrate. Numerous fin structures are defined on the substrate. A gate structure crosses each fin structure. Two epitaxial layers are...
2016/0380080 SEMICONDUCTOR DEVICE PRODUCTION METHOD AND SEMICONDUCTOR DEVICE
A semiconductor device production method includes a first step of forming a planar silicon layer on a silicon substrate and forming first and second...
2016/0380079 METHOD OF FORMING A TRANSISTOR AND STRUCTURE THEREFOR
In one embodiment, a semiconductor device is formed to include a gate structure extending into a semiconductor material that is underlying a first region of...
2016/0380078 HDP FILL WITH REDUCED VOID FORMATION AND SPACER DAMAGE
A method for filling gaps between structures includes forming a plurality of high aspect ratio structures adjacent to one another with gaps, forming a first...
2016/0380077 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE HAVING METAL GATE
A method for manufacturing a semiconductor device having metal gates includes following steps. A substrate including a first transistor and a second transistor...
2016/0380076 METHOD TO IMPROVE RELIABILITY OF REPLACEMENT GATE DEVICE
A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k...
2016/0380075 SEMICONDUCTOR DEVICE
A semiconductor device includes a fin-type pattern including a first short side and a second short side opposed to each other, a first trench in contact with...
2016/0380074 METHOD OF FORMING FIELD EFFECT TRANSISTORS (FETS) WITH ABRUPT JUNCTIONS AND INTEGRATED CIRCUIT CHIPS WITH THE FETS
A method of forming field effect transistors (FETs) and on Integrated Circuit (IC) chips with the FETs. Channel placeholders at FET locations are undercut at...
2016/0380073 NORMALLY OFF GALLIUM NITRIDE FIELD EFFECT TRANSISTORS (FET)
A heterostructure field effect transistor (HFET) gallium nitride (GaN) semiconductor power device comprises a hetero junction structure comprises a first...
2016/0380072 INSULATED GATE BIPOLAR TRANSISTOR AND MANUFACTURING METHOD THEREFOR
An insulated gate bipolar transistor and a manufacturing method therefor. The insulated gate bipolar transistor comprises a semiconductor substrate (1) of a...
2016/0380071 IGBT MANUFACTURING METHOD
An insulated gate bipolar transistor (IGBT) manufacturing method comprises the following steps: providing a semiconductor substrate of a first conducting type,...
2016/0380070 REPLACEMENT METAL GATE STRUCTURES
Replacement metal gate structures with improved chamfered workfunction metal and self-aligned contact and methods of manufacture are provided. The method...
2016/0380069 SEMICONDUCTOR STRUCTURE WITH INTERFACIAL LAYER AND METHOD FOR MANUFACTURING THE SAME
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and an interfacial layer formed over...
2016/0380068 SEMICONDUCTOR DEVICE
An emitter electrode includes a first electrode layer, a second electrode layer, and a third electrode layer. The first to third electrode layers are laid in...
2016/0380067 SHAPED TERMINALS FOR A BIPOLAR JUNCTION TRANSISTOR
Device structure and fabrication methods for a bipolar junction transistor. An emitter layer is formed on a base layer and etched to form an emitter of the...
2016/0380066 SEMICONDUCTOR DEVICE AND MANUFACUTRING METHOD THEREOF
A semiconductor device includes a substrate, at least one layer, a metal adhesive, and a metal structure. The layer is disposed on the substrate. The layer has...
2016/0380065 SEMICONDUCTOR STRUCTURES WITH FIELD EFFECT TRANSISTOR(S) HAVING LOW-RESISTANCE SOURCE/DRAIN CONTACT(S)
Disclosed are semiconductor structures comprising a field effect transistor (FET) having a low-resistance source/drain contact and, optionally, low...
2016/0380064 THIN FILM TRANSISTOR AND THIN FILM TRANSISTOR SUBSTRATE INCLUDING THE SAME
A thin film transistor substrate includes: a substrate; and a thin film transistor including a gate electrode on the substrate, an active layer on the gate...
2016/0380063 Method for Producing a Semiconductor Component with Insulated Semiconductor Mesas in a Semiconductor Body
A method for producing a semiconductor component is provided. The method includes providing a semiconductor body with a first surface and a second surface...
2016/0380062 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device comprises: a substrate; a semiconductor layer formed on the substrate; a source electrode, a drain electrode and a gate electrode...
2016/0380061 METHOD FOR MANUFACTURING TERMINATION STRUCTURE OF SEMICONDUCTOR DEVICE
A termination structure of a semiconductor device is provided. The semiconductor device includes an active area and a termination area adjacent to the active...
2016/0380060 SEMICONDUCTOR DEVICE HAVING AIR GAP AND METHOD FOR MANUFACTURING THE SAME, MEMORY CELL HAVING THE SAME AND...
A method for fabricating a semiconductor device may include: forming a plurality of first isolation trenches and a plurality of line-shaped active regions by...
2016/0380059 ACTIVE AREA DESIGNS FOR SILICON CARBIDE SUPER-JUNCTION POWER DEVICES
The subject matter disclosed herein relates to silicon carbide (SiC) power devices and, more specifically, to active area designs for SiC super-junction (SJ)...
2016/0380058 FINFET DEVICES HAVING SILICON GERMANIUM CHANNEL FIN STRUCTURES WITH UNIFORM THICKNESS
Methods are provided to fabricate semiconductor devices, e.g., FinFET devices, having fin channel structures formed of silicon-germanium alloy layers with...
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