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SUBSTRATE FOR MOUNTING A CHIP AND CHIP PACKAGE USING THE SUBSTRATE
Disclosed is a chip-mounting substrate. The chip-mounting substrate includes a plurality of conductive portions configured to apply voltages to at least two or...
SEMICONDUCTOR DEVICE HAVING RECESSED EDGES AND METHOD OF MANUFACTURE
A device and method of manufacture is provided that utilize recessed regions along a package edge. For example, in an integrated fan-out package, the...
Flip Chip Packaging
An integrated circuit (IC) package includes a first substrate; a second substrate disposed over the first substrate; a plurality of connectors disposed between...
DIE PACKAGE WITH LOW ELECTROMAGNETIC INTERFERENCE INTERCONNECTION
A die package having lead structures connecting to a die that provide for electromagnetic interference reductions. Mixed impedance leads connected to the die...
SEMICONDUCTOR WIRE BONDING AND METHOD
Circuitry is disclosed that includes a first conductive portion of a first die and a first conductive pillar electrically and physically connected to the first...
DIE PACKAGING WITH FULLY OR PARTIALLY FUSED DIELECTRIC LEADS
A die interconnect system having a first die with a plurality of connection pads, and a ribbon lead extending from the first die, the ribbon lead having a...
MAGNETIC INTERMETALLIC COMPOUND INTERCONNECT
The present disclosure relates to the field of fabricating microelectronic packages, wherein magnetic particles distributed within a solder paste may be used...
DOUBLE PLATED CONDUCTIVE PILLAR PACKAGE SUBSATRATE
The present disclosure relates to a package substrate. The package substrate includes a patterned conductive layer and conductive pillars. Each of the...
Electronic Element and Manufacturing Method
An electronic element for an electronic apparatus includes a substrate; a bump, disposed on the substrate for electrically connecting the electronic apparatus;...
CORROSION RESISTANT ALUMINUM BOND PAD STRUCTURE
A method of manufacturing a bond pad structure may include depositing an aluminum-copper (Al--Cu) layer over a dielectric layer; and depositing an ...
Semiconductor Device with Metal Structure Electrically Connected to a
A semiconductor device includes a semiconductor die that having a conductive structure. A metal structure is electrically connected to the conductive structure...
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes: a pad electrode 9a formed in an uppermost layer of a plurality of wiring layers; a base insulating film 11 having an opening...
Semiconductor Device and Method of Manufacture Thereof
A semiconductor device and a method of making a semiconductor device are disclosed. The semiconductor device comprises a redistribution layer arranged over a...
POWER AMPLIFIER MODULES WITH POWER AMPLIFIER AND TRANSMISSION LINE AND
RELATED SYSTEMS, DEVICES, AND METHODS
One aspect of this disclosure is a power amplifier module that includes a power amplifier configured to amplify a radio frequency (RF) signal and an RF...
METHOD AND APPARATUS FOR HIGH PERFORMANCE PASSIVE-ACTIVE CIRCUIT
An electronic device comprises an active radio frequency (RF) circuit element, and a passive RF circuit element integrated into the same silicon-on-insulation...
Self-Destructive Circuits Under Radiation
Circuits which self-destruct under radiation are provided. In one aspect, a method for creating a radiation-sensitive circuit is provided. The method includes...
Array Of Non-volatile Memory Cells With ROM Cells
A memory device that includes a plurality of ROM cells each having spaced apart source and drain regions formed in a substrate with a channel region...
SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
This application relates to a semiconductor device comprising a semiconductor chip, a molded body covering the semiconductor chip, wherein the molded body...
REMOVABLE SUBSTRATE FOR CONTROLLING WARPAGE OF AN INTEGRATED CIRCUIT
One embodiment of the present invention sets forth a technique for packaging an integrated circuit die. The technique includes bonding a first surface of the...
WIRING SUBSTRATE AND SEMICONDUCTOR DEVICE
A wiring substrate includes a first reinforcement pattern stacked on a lower surface of a first insulation layer at a peripheral region located at an outer...
A substrate strip is provided. The substrate strip includes a core layer including first and second substrate regions spaced apart from each other and a dummy...
METHOD OF FABRICATING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PRODUCT
A method of fabricating a semiconductor product includes processing of a semiconductor wafer from a front surface including structures disposed in the...
WAFER LEVEL PACKAGE AND FABRICATION METHOD THEREOF
A semiconductor device includes a redistribution layer (RDL) is disclosed. A chip is mounted on the RDL within a chip mounting area. The RDL is electrically...
WAFER RIGIDITY WITH REINFORCEMENT STRUCTURE
Reinforcement structures used with a thinned wafer and methods of manufacture are provided. The method includes forming trenches or vias at least partially...
SEMICONDUCTOR PACKAGE IN PACKAGE
A semiconductor package having a second semiconductor package or module integrated therein. The semiconductor package of the present invention typically...
INTERCONNECT STRUCTURE INCLUDING MIDDLE OF LINE (MOL) METAL LAYER LOCAL
INTERCONNECT ON ETCH STOP LAYER
An interconnect structure includes an insulator stack on an upper surface of a semiconductor substrate. The insulator stack includes a first insulator layer...
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE HAVING A PATTERNED METAL LAYER
EMBEDDED IN AN INTERLAYER DIELECTRIC...
A method for fabricating semiconductor device is disclosed. First, a substrate is provided, in which the substrate includes a first metal gate and a second...
ELECTRICAL FUSE WITH HIGH OFF RESISTANCE
Electrical fuses and methods for forming an electrical fuse. A semiconductor substrate is implanted to define a modified region in the semiconductor substrate....
SELF ALIGNED VIA IN INTEGRATED CIRCUIT
A method for forming a via in an integrated circuit comprises patterning a first opening in a first hardmask, the first hardmask disposed on a first organic...
FINFET POWER SUPPLY DECOUPLING
Embodiments herein describe dummy gates disposed over a portion of a fin in finFETs. That is, instead of separating the dummy gates from the finFET structure,...
OPTIMIZED WIRES FOR RESISTANCE OR ELECTROMIGRATION
Optimized metal wires for resistance or electromigration, methods of manufacturing thereof and design methodologies are disclosed. The method includes...
Semiconductor Wafer Backside Metallization With Improved Backside Metal
A method of fabricating a semiconductor structure includes: grinding a backside surface of a semiconductor substrate such that the backside surface has a...
STABLE CONTACT ON ONE-SIDED GATE TIE-DOWN STRUCTURE
After forming a first contact opening to expose a portion of a first source/drain contact located at one side of a functional gate structure followed by...
EFFICIENT LAYOUT PLACEMENT OF A DIODE
A semiconductor device includes a plurality of first wires and a plurality of second wires. Each of the first wires forms a closed polygon and surrounds a...
INTEGRATED CIRCUIT PACKAGE SUBSTRATE
Embodiments of the present disclosure are directed towards techniques and configurations for dual surface finish package substrate assemblies. In one...
A fabricating process for a spacer connector is disclosed. A core substrate with a plurality of through holes is prepared. A conductive carrier with a...
CIRCUIT BOARDS AND SEMICONDUCTOR PACKAGES INCLUDING THE SAME
A circuit board and a semiconductor packages therewith are disclosed. The circuit board may include a top surface, on which at least one semiconductor chip is...
APPARATUS, SYSTEM, AND METHOD FOR WIRELESS CONNECTION IN INTEGRATED
Some embodiments of the invention include a connecting structure between a support and at least one die attached to the support. The die includes a number of...
Electronic device and method of manufacturing the same
Various embodiments provide an electronic device, wherein the electronic device comprises a carrier body; a plurality of pins, a die comprising a switched...
SEMICONDUCTOR PACKAGE WITH SMALL GATE CLIP AND ASSEMBLY METHOD
A method of manufacturing a semiconductor package having a small gate clip is disclosed. A first and second semiconductor chips, each of which includes a...
POWER SEMICONDUCTOR PACKAGE DEVICE HAVING LOCKING MECHANISM, AND
PREPARATION METHOD THEREOF
A power semiconductor package device and a method of preparation the device are disclosed. The package device includes a die paddle, a first pin, a second pin,...
METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH SIDEWALL RECESS AND RELATED
A method is for making a semiconductor device. The method may include providing a lead frame having a recess, forming a sacrificial material in the recess of...
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a...
COOLER AND SEMICONDUCTOR MODULE USING SAME
A cooler includes: a jacket having an internal coolant conduction space surrounded by a main cooling surface top plate, an opposite bottom plate, and a side...
APPARATUS AND METHOD WITH SELF-ASSEMBLING METAL MICROCHANNELS
An apparatus comprising a top substrate having a first surface and a bottom substrate having a second surface facing the first surface. The apparatus comprises...
There is provided a semiconductor device provided with a metal base, a frame-shaped resin case adhered to the metal base, a semiconductor chip having a main...
HEAT ISOLATION STRUCTURES FOR HIGH BANDWIDTH INTERCONNECTS
A die interconnect system having a plurality of connection pads, a heat generating element thermally isolated from the die, one or more leads extending from...
SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
The present disclosure relates to a semiconductor package and a method for manufacturing the same. The semiconductor package includes a substrate, a package...
EPOXY RESIN COMPOSITION FOR ENCAPSULATING SEMICONDUCTOR DEVICE AND
SEMICONDUCTOR DEVICE PREPARED USING THE SAME
An epoxy resin composition for encapsulation of a semiconductor device and a semiconductor device encapsulated with the epoxy resin composition, the...
The crystal device has a rectangular substrate, a frame which is provided along the outer circumferential edge of the upper surface of the substrate, an...