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Patent # Description
2017/0005005 FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME
A FinFET device structure and method for forming the same are provided. The FinFET device structure includes a fin structure formed over a substrate and a gate...
2017/0005004 Method of Forming Fin Structure of Semiconductor Device
A method of forming a fin structure of a semiconductor device, such as a fin field effect transistor (FinFET) is provided. In an embodiment, trenches are...
2017/0005003 GATE STACK FORMED WITH INTERRUPTED DEPOSITION PROCESSES AND LASER ANNEALING
Semiconductor structures and methods of fabricating the same using interrupted deposition processes and multiple laser anneals are provided. The structure...
2017/0005002 FINFET CHANNEL ON OXIDE STRUCTURES AND RELATED METHODS
A method for fabricating a semiconductor device having a substantially undoped channel region includes forming a plurality of fins extending from a substrate....
2017/0005001 SEMICONDUCTOR WAFER, SEMICONDUCTOR DEVICE DICED FROM SEMICONDUCTOR WAFER, AND METHOD FOR MANUFACTURING...
A semiconductor wafer is provided with a substrate, a GaN type semiconductor film which is laminated on the substrate, a plurality of element regions which are...
2017/0005000 METHOD FOR BONDING AND INTERCONNECTING INTEGRATED CIRCUIT DEVICES
A method for bonding and interconnecting two or more IC devices arranged on substrates such as silicon wafers is disclosed. In one aspect, the wafers are...
2017/0004999 SELF-ALIGNED VIA PROCESS FLOW
A device includes a first dielectric layer having at least one conductive feature embedded therein. A first plurality of conductive lines are embedded in a...
2017/0004998 GATE CONTACT STRUCTURE OVER ACTIVE GATE AND METHOD TO FABRICATE SAME
Gate contact structures disposed over active portions of gates and methods of forming such gate contact structures are described. For example, a semiconductor...
2017/0004997 METHOD OF FABRICATING A SEMICONDUCTOR STRUCTURE WITH A SELF-ALIGNED CONTACT
A method of fabricating a semiconductor structure includes the following steps: forming a first interlayer dielectric on a substrate; forming a gate electrode...
2017/0004996 SELF ALIGNED VIA AND PILLAR CUT FOR AT LEAST A SELF ALIGNED DOUBLE PITCH
A method of forming via openings that includes forming sidewall spacers on a plurality of mandrels that are overlying a hardmask layer that is present on an...
2017/0004995 Film Forming Apparatus and Film Forming Method
Provided is a film forming apparatus in which a thin film can be formed with a good coverage on the inner surface of a hole with high aspect ratio by...
2017/0004994 Metal-Semiconductor Contact Structure with Doped Interlayer
Disclosed herein is a method of forming a metal-to-semiconductor contact with a doped metal oxide interlayer. An insulating layer is formed on a top surface of...
2017/0004993 SUBSTRATE PROCESSING METHOD AND RECORDING MEDIUM
Electric charging of a substrate caused by a friction between a fluid and a surface of the substrate being rotated can be suppressed. At least a part of a...
2017/0004992 TRANSFER DEVICE AND CONTROL METHOD THEREOF
A transfer device can have a high durability and no limit in an operation of an arm member. An electrostatic pick 44 of a first transfer device 17 is advanced...
2017/0004991 PROTECTIVE FILM-FORMING FILM, SHEET FOR FORMING PROTECTIVE FILM, COMPLEX SHEET FOR FORMING PROTECTIVE FILM, AND...
Provided is protective film-forming sheet (2) including: a protective film-forming film (1) having a light transmittance at a wavelength of 1064 nm of 55% or...
2017/0004990 METHOD OF FABRICATING A SEMICONDUCTOR DEVICE
Provided are methods of fabricating a semiconductor device. According to the method, a first glue layer, a first release layer, a second glue layer, and a...
2017/0004989 WAFER PROCESSING TEMPORARY BONDING ARRANGEMENT, WAFER PROCESSING LAMINATE, AND THIN WAFER MANUFACTURING METHOD
A temporary bonding arrangement for wafer processing is provided comprising a first temporary bond layer (A) of thermoplastic resin, a second temporary bond...
2017/0004988 PIXELATED CAPACITANCE CONTROLLED ESC
Implementations described herein provide a chucking circuit for a pixilated electrostatic chuck which enables both lateral and azimuthal tuning of the RF...
2017/0004987 System and Method for Real Time Positioning of a Substrate in a Vacuum Processing System
An improved position control means for robotic handling systems; particularly, a sensing system and method for precisely determining the center point of a...
2017/0004986 Robot Having Predetermined Orientation
An apparatus including a stator configured to be stationarily connected to a housing; and a rotor configured to have a robot arm connected thereto. The rotor...
2017/0004985 PRODUCTION SYSTEM FOR PRINTING ELECTRONIC DEVICES
An object of the present invention is to provide a printing production line system for an electronic device, the printing production line system that can...
2017/0004984 SUBSTRATE TRANSFER APPARATUS AND SUBSTRATE TRANSFER METHOD
A substrate transfer apparatus includes a transfer chamber in which a substrate is transferred, and a process chamber configured to process a substrate...
2017/0004983 Apparatus and Techniques for Thermal Treatment of Electronic Devices
Apparatus and techniques are described herein for use in manufacturing electronic devices. such as can include organic light emitting diode (OLED) devices....
2017/0004982 BATCH PROCESSING APPARATUS
Embodiments of batch processing apparatus and collapsible substrate support are provided herein. In some embodiments, a collapsible substrate support includes...
2017/0004981 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
It is an object to provide a method for manufacturing a semiconductor device which can reduce degradation in package strength and a manufacturing cost, and...
2017/0004980 APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE MODULE
An apparatus for manufacturing a semiconductor package module and a method of manufacturing a semiconductor package are provided. The apparatus for...
2017/0004979 CHIP ARRANGEMENT AND A METHOD FOR MANUFACTURING A CHIP ARRANGEMENT
A chip arrangement is provided, the chip arrangement, including a carrier; a first chip electrically connected to the carrier; a ceramic layer disposed over...
2017/0004978 METHODS OF FORMING HIGH DENSITY METAL WIRING FOR FINE LINE AND SPACE PACKAGING APPLICATIONS AND STRUCTURES...
Methods of forming microelectronic device structures are described. Those methods may include forming at least one opening through a build up structure and a...
2017/0004977 PACKAGE STRUCTURES AND METHOD OF FORMING THE SAME
Some embodiments contemplate methods for forming a package structure and a package structure formed thereby. An embodiment method includes depositing a...
2017/0004976 Manufacturing Method of Semiconductor Device
In order to provide a semiconductor device with high reliability while manufacturing cost is being suppressed, dry etching for an insulating film is performed...
2017/0004975 TECHNOLOGIES FOR SELECTIVELY ETCHING OXIDE AND NITRIDE MATERIALS AND PRODUCTS FORMED USING THE SAME
Technologies for selectively etching oxide and nitride materials on a work piece are described. Such technologies include methods for etching a work piece with...
2017/0004974 SELECTIVE DEPOSITION OF SILICON OXIDE FILMS
Embodiments described herein generally provide a method for filling features formed on a substrate. In one embodiment, a method for selectively forming a...
2017/0004973 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
A method for fabricating a semiconductor device is provided, which includes forming a first mask pattern and a second mask pattern on a first layer, forming a...
2017/0004972 Systems and Methods for Chemical Mechanical Polish and Clean
A chemical mechanical polishing (CMP) system includes an O.sub.3/DIW generator, a polishing unit, and a cleaning unit. The O.sub.3/DIW generator is configured...
2017/0004971 METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES INCLUDING IMPURITY REGIONS
In a method of manufacturing a semiconductor device, a semiconductor substrate is prepared. Boron-containing ions are generated by reacting a borane-based...
2017/0004970 METHOD OF MANUFACTURING LOW TEMPERATURE POLYCRYSTALLINE SILICON THIN FILM AND THIN FILM TRANSISTOR, THIN FILM...
A method of manufacturing a low temperature polycrystalline silicon thin film and a thin film transistor, a thin film transistor, a display panel and a display...
2017/0004969 Reducing Autodoping of III-V Semiconductors By Atomic Layer Epitaxy (ALE)
In one aspect, a method for forming a doped III-V semiconductor material on a substrate includes the steps of: (a) forming a first monolayer on the substrate,...
2017/0004968 SEMICONDUCTOR DEVICE
A semiconductor device is disclosed that has a semiconductor substrate having a crystal structure with a <1,0,0> plane and a <1,1,0> plane and a...
2017/0004967 METHOD OF FABRICATING HAFNIUM OXIDE LAYER AND SEMICONDUCTOR DEVICE HAVING THE SAME
Provided are a method of fabricating a hafnium oxide layer and a method of fabricating a semiconductor device using the same. The method of fabricating a...
2017/0004966 Substrate Processing Apparatus and Method of Manufacturing Semiconductor Device
A substrate processing apparatus includes: a plasma generating unit to excite a process gas into plasma state; a process chamber where a substrate is processed...
2017/0004965 SEMICONDUCTOR DIE SINGULATION METHOD
In one embodiment, semiconductor die are singulated from a semiconductor wafer having a layer of material by placing the semiconductor wafer onto a carrier...
2017/0004964 Integrate Rinse Module in Hybrid Bonding Platform
A method includes performing a plasma activation on a surface of a first package component, removing oxide regions from surfaces of metal pads of the first...
2017/0004963 Liquid Chemical for Forming Protecting Film
Disclosed is a liquid chemical for forming a water-repellent protecting film on a wafer. The liquid chemical is a liquid chemical containing a ...
2017/0004962 DOUBLE SIDED SI(GE)/SAPPHIRE/III-NITRIDE HYBRID STRUCTURE
One aspect of the present invention is a double sided hybrid crystal structure including a trigonal Sapphire wafer containing a (0001) C-plane and having front...
2017/0004961 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM
An oxide film is formed on a substrate by performing a cycle a predetermined number of times. The cycle includes: continuously performing supplying in advance...
2017/0004960 LAMP HAVING SYNTHETIC CERAMIC GLASS ELECTRODES
The present invention relates to a lamp having synthetic ceramic glass electrodes, which comprises a glass tube, a plurality of synthetic ceramic glass...
2017/0004959 Ambient Infrared Laser Ablation Mass Spectrometry (AIRLAB-MS) with Plume Capture by Continuous Flow Solvent Probe
A new experimental setup for spatially resolved ambient infrared laser ablation mass spectrometry (AIRLAB-MS) that uses an infrared microscope with an...
2017/0004958 SENSOR APPARATUS AND METHOD FOR USE WITH GAS IONIZATION SYSTEMS
An ion mobility gas detector apparatus including a detector core, an inlet gas path, an exhaust gas path, a source of diluent gas, and at least one or more...
2017/0004957 MOLECULAR DIAGNOSTICS IN PERSONALIZED DERMATOLOGY, DERMATOPATHOLOGY AND COSMETICS
The present disclosure relates generally to methods and apparatus for determining components and associated conditions in a dermatological sample, and...
2017/0004956 PLASMA PROCESSING METHOD AND PLASMA PROCESSING APPARATUS
A plasma processing method according to an aspect includes: preparing a plasma processing apparatus including: a chamber; a lower electrode; an upper...
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