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Patent # Description
2017/0004005 EXCEPTION HANDLING IN MICROPROCESSOR SYSTEMS
A microprocessor system (1) includes a host processor (2),a graphics processing unit (GPU) (3) that includes a number of processing cores (4), and an exception...
2017/0004004 TRANSACTIONAL STORAGE ACCESSES SUPPORTING DIFFERING PRIORITY LEVELS
In at least some embodiments, a cache memory of a data processing system receives a transactional memory access request including a target address and a...
2017/0004003 MIGRATING VIRTUAL MACHINES TO PERFORM BOOT PROCESSES
In some examples, an indication that a virtual machine is to begin a boot process is received. In response to the received indication and prior to beginning...
2017/0004002 COMPUTER AND LOAD MEASUREMENT METHOD
A computer includes: a host VM monitor configured to operate on a physical processor and generate a logical processor that operates a first-level VM; and a...
2017/0004001 PROTECTED GUESTS IN A HYPERVISOR CONTROLLED SYSTEM
A computer-implemented method includes receiving a definition of a source guest memory area for utilization by a virtual machine on a source system, wherein...
2017/0004000 VIRTUAL MACHINE MIGRATION VIA A MOBILE DEVICE
Embodiments relate to virtual machine (VM) migration via a mobile device. A method includes requesting, by a mobile device, a source computer to capture a...
2017/0003999 DATA ACCESS ACCELERATOR
Various systems, methods, and processes for accelerating data access in application and testing environments are disclosed. A production dataset is received...
2017/0003998 Compute Cluster Load Balancing Based on Disk I/O Cache Contents
Load balancing reduces memory consumption in a virtual computing environment. Disk blocks in a cluster of hosts are monitored for redundancy. Execution of...
2017/0003997 Compute Cluster Load Balancing Based on Memory Page Contents
Memory page sharing reduces memory consumption in a virtual computing environment. Memory pages in a cluster of hosts are monitored for redundancy. Execution...
2017/0003996 PROTECTED GUESTS IN A HYPERVISOR CONTROLLED SYSTEM
A computer-implemented method includes receiving a definition of a source guest memory area for utilization by a virtual machine on a source system, wherein...
2017/0003995 METHOD AND SYSTEM FOR PROVIDING VIRTUAL DESKTOP AND VIRTUAL APPLICATION INTERACTIVITY
Techniques are disclosed for allowing a virtual application and a virtual desktop to interact. In one embodiment, the virtual application is moved inside the...
2017/0003994 CLOUD VIRTUAL MACHINE CUSTOMIZATION USING EXTENSION FRAMEWORK
In various embodiments, methods and systems for remotely customizing a virtual machine in a cloud computing infrastructure are provided. A VM agent component...
2017/0003993 File Based License Management System in Virtualization Environment
A system for managing software application licenses includes a physical machine (10) including computer system hardware. A hypervisor operates on the physical...
2017/0003992 PROTECTING VIRTUAL COMPUTING INSTANCES
The present disclosure is related to systems and methods for protecting virtual computing instances. An example system can include a first virtual computing...
2017/0003991 HOST-GATEWAY-FACILITATED AGGREGATION OF HOST-COMPUTER CLUSTERS
The current document is directed to methods for aggregating host computers into distributed computing systems and to distributed computing systems created by...
2017/0003990 VIRTUAL MACHINE MIGRATION VIA A MOBILE DEVICE
Embodiments relate to virtual machine (VM) migration via a mobile device. A method includes requesting, by a mobile device, a source computer to capture a...
2017/0003989 AUTOMATIC DISCOVERY OF A JAVASCRIPT API
An approach to creating a canonical representation of a JavaScript API. Objects associated with the JavaScript API are instantiated, creating entry points for...
2017/0003988 TECHNIQUES FOR HANDLING MEMORY ACCESSES BY PROCESSOR-INDEPENDENT EXECUTABLE CODE IN A MULTI-PROCESSOR ENVIRONMENT
A method and apparatus for virtual address mapping are provided. The method includes determining an offset value respective of at least a first portion of code...
2017/0003987 ACCESS OPERATION WITH DYNAMIC LINKING AND ACCESS OF DATA WITHIN PLURAL DATA SOURCES
A present invention embodiment includes a system with at least one processor for accessing data. The system creates a rule including one or more conditional...
2017/0003986 LOW-POWER RECONFIGURABLE ARCHITECTURE FOR SIMULTANEOUS IMPLEMENTATION OF DISTINCT COMMUNICATION STANDARDS
A chip architecture for use in processing signals encoded in accordance with any one of a plurality of communication protocols each defined by a series of...
2017/0003985 PROCEDE DE CONFIGURATION ET PROCEDE DE COMMANDE D'UN SYSTEME DE MODULES D'EXECUTION INTERCONNECTES
A method for configuring and controlling a system of interconnected execution modules as well as a system of interconnected execution modules including a...
2017/0003984 Information Handling System Configuration Parameter History Management
A method and information handling system configured to obtain legacy client information handling system performance data of a legacy client information...
2017/0003983 METHOD AND DEVICE FOR PROVIDING HELP GUIDE
A method and apparatus for providing a help guide are provided. The method and apparatus for providing a help guide by an electronic device includes acquiring...
2017/0003982 METHOD FOR OPERATING ON WEB PAGE OF TERMINAL AND TERMINAL
Embodiments of the present disclosure provide a method for operating on web page of a terminal and a terminal. The method can include recording a web page of a...
2017/0003981 RUNTIME DATA STORAGE AND/OR RETRIEVAL
A data storage device includes a memory and a controller. The controller is configured to, in response to a transition from a low power state to an active...
2017/0003980 Web-Based Interface to Access a Function of a Basic Input/Output System
In some examples, an electronic device receives, while an operating system is running in the electronic device, a request to access a function of a Basic...
2017/0003979 METHOD FOR THE CONFIGURATION OF ELECTRONIC DEVICES, IN PARTICULAR FOR THE CONFIGURATION OF COMPONENTS OF AN...
As part of the method for the configuration of electronic devices and, in particular for the configuration of components of an access control system for...
2017/0003978 MEMORY SYSTEM FOR PORTABLE TELEPHONE
A memory system is constituted of a file storage flash memory storing a control program required for a control portion and a large amount of data, and a random...
2017/0003977 BOOT CONTROL PROGRAM, BOOT CONTROL METHOD, AND BOOT CONTROL DEVICE
A non-transitory computer-readable storage medium storing therein a boot control program that causes a computer to execute a process includes storing booting...
2017/0003976 CONTROLLED CUSTOMIZATION OF SILICON INITIALIZATION
The present disclosure is directed to controlled customization of silicon initialization. A device may comprise, for example, a boot module including a memory...
2017/0003975 VEHICLE MOUNT COMPUTER WITH CONFIGURABLE IGNITION SWITCH BEHAVIOR
A vehicle mount computer having a configurable behavior controlled by a vehicle's ignition switch. A user can configure the computer to perform an action,...
2017/0003974 BOOTING SYSTEM FOR MOTHERBOARD
A booting system for a crashed motherboard includes a BIOS (Basic Input/Output System) chip, and a south bridge chip. The BIOS chip stores a plurality of boot...
2017/0003973 Processor with Instruction Concatenation
A processor includes a plurality of execution units. At least one of the execution units is configured to determine, based on a field of a first instruction, a...
2017/0003972 DATA PROCESSING SYSTEMS
A data processing system has an execution pipeline with programmable execution stages which execute instructions to perform data processing operations provided...
2017/0003971 VARIABLE LATENCY PIPE FOR INTERLEAVING INSTRUCTION TAGS IN A MICROPROCESSOR
Techniques disclosed herein describe a variable latency pipe for interleaving instruction tags in a processor. According to one embodiment presented herein, an...
2017/0003970 PATTERN BASED BRANCH PREDICTION
A method comprises identifying a number of branches (N.sub.b) and a number of iterations (N.sub.i) in a loop in an instruction stream, generating a number of...
2017/0003969 VARIABLE LATENCY PIPE FOR INTERLEAVING INSTRUCTION TAGS IN A MICROPROCESSOR
Techniques disclosed herein describe a variable latency pipe for interleaving instruction tags in a processor. According to one embodiment presented herein, an...
2017/0003968 PATTERN BASED BRANCH PREDICTION
A method comprises identifying a number of branches (N.sub.b) and a number of iterations (N.sub.i) in a loop in an instruction stream, generating a number of...
2017/0003967 SYSTEM AND METHOD FOR INSTRUCTION SET CONVERSION
An instruction set conversion system and method is provided, which can convert guest instructions to host instructions for processor core execution. Through...
2017/0003966 PROCESSOR WITH INSTRUCTION FOR INTERPOLATING TABLE LOOKUP VALUES
Apparatus and methods are disclosed for performing mathematical operations that can be applied in a number of processor architectures. In one example of the...
2017/0003965 EFFICIENT INSTRUCTION FUSION BY FUSING INSTRUCTIONS THAT FALL WITHIN A COUNTER-TRACKED AMOUNT OF CYCLES APART
A technique to enable efficient instruction fusion within a computer system. In one embodiment, a processor logic delays the processing of a second instruction...
2017/0003964 CLEARED MEMORY INDICATOR
Aspects include a computer-implemented method for receiving an instruction at a processor, the instruction associated with a memory block having an address. A...
2017/0003963 CLEARED MEMORY INDICATOR
Aspects include a computer-implemented method for receiving an instruction at a processor, the instruction associated with a memory block having an address. A...
2017/0003962 INSTRUCTION AND LOGIC TO PROVIDE VECTOR HORIZONTAL MAJORITY VOTING FUNCTIONALITY
Instructions and logic provide vector horizontal majority voting functionality. Some embodiments, responsive to an instruction specifying: a destination...
2017/0003961 NON-FAULTING COMPUTE INSTRUCTIONS
A compute instruction to be executed is to use a memory operand in a computation. An address associated with the memory operand is to be used to locate a...
2017/0003960 SYSTEM AND METHOD FOR AUTOMATIC PORTING OF SOFTWARE APPLICATIONS INTO A CLOUD COMPUTING ENVIRONMENT
In accordance with an embodiment, described herein is a system and method for automatic porting of software applications into a cloud computing environment...
2017/0003959 DETECTION OF APPLICATION TOPOLOGY CHANGES
Changes in application topology can be determined, stored, analyzed and presented for evaluation as event journals. The information about inter-component calls...
2017/0003958 NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM, INFORMATION PROCESSING DEVICE, AND INFORMATION PROCESSING METHOD
A non-transitory computer-readable recording medium storing an information processing program causing a computer to execute a process including obtaining a...
2017/0003957 INSTRUMENTING A WEBSITE WITH DYNAMICALLY GENERATED CODE
A method, system, and medium are provided that relate to dynamically instrumenting a website. In general, an exemplary aspect of the invention includes storing...
2017/0003956 UPDATING COMPUTER FIRMWARE
Systems, methods, and computer-readable storage media for updating a computer firmware. The system generates a user firmware volume within a computer firmware...
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