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Patent # Description
2017/0018573 SOI-BASED SEMICONDUCTOR DEVICE WITH DYNAMIC THRESHOLD VOLTAGE
A semiconductor device includes a semiconductor substrate, an insulating layer on a top surface of the substrate, and a first semiconductor transistor on the...
2017/0018572 STANDARD CELL CIRCUITRIES
A standard cell circuit includes a standard cell unit and a first resistive device. The standard cell unit is coupled to at least one resistor. The first...
2017/0018571 ULTRAHIGH DENSITY VERTICAL NAND MEMORY DEVICE AND METHOD OF MAKING THEREOF
Monolithic, three dimensional NAND strings include a semiconductor channel, at least one end portion of the semiconductor channel extending substantially...
2017/0018570 Capacitor With 3D NAND Memory
An integrated circuit includes a 3D NAND memory array with a stack of conductive strips and a capacitor with a stack of capacitor terminal strips. Multiple...
2017/0018569 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
According to an embodiment, a semiconductor memory device includes a plurality of control gate electrodes, a semiconductor layer, and a charge accumulation...
2017/0018568 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
According to an embodiment, a semiconductor memory device includes a plurality of control gate electrodes, a semiconductor layer, and a charge accumulation...
2017/0018567 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
Manufactured in a method of manufacturing according to an embodiment is a semiconductor memory device including: control gate electrodes; a semiconductor...
2017/0018565 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
According to an embodiment, a semiconductor memory device comprises a plurality of control gate electrodes, a semiconductor layer, and a first insulating...
2017/0018564 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
According to one embodiment, a semiconductor memory device includes a substrate, a stacked body provided on the substrate and including multiple electrode...
2017/0018563 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
According to one embodiment, a semiconductor memory device includes a stacked body including a plurality of electrode films and a plurality of insulating...
2017/0018562 DUAL CONTROL GATE SPACER STRUCTURE FOR EMBEDDED FLASH MEMORY
The present disclosure relates to a flash memory cell. In some embodiments, the flash memory cell has a control gate arranged over a substrate, and a select...
2017/0018561 FIELD EFFECT TRANSISTOR MEMORY DEVICE
A method for generating a non-volatile memory device may comprise: applying plasma for a preset time period to an exposed surface of a channel of a field...
2017/0018560 SEMICONDUCTOR DEVICE
An object is to provide a semiconductor device having a novel structure with a high degree of integration. A semiconductor device includes a semiconductor...
2017/0018559 METHOD FOR MANUFACTURING A NONVOLATILE MEMORY DEVICE
A method for manufacturing a nonvolatile memory device in accordance with an embodiment of the present invention may include providing a substrate comprising a...
2017/0018558 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
A nonvolatile semiconductor memory device comprises: a substrate; a memory cell that is disposed on the substrate and accumulates a charge as data; and a cover...
2017/0018557 METHOD FOR PROCESSING A CARRIER, A CARRIER, AND A SPLIT GATE FIELD EFFECT TRANSISTOR STRUCTURE
According to various embodiments, a method for processing a carrier may include: doping a carrier with fluorine such that a first surface region of the carrier...
2017/0018556 SEMICONDUCTOR DEVICE
Provided is a semiconductor device having improved performance. Over a semiconductor substrate, a dummy control gate electrode is formed via a first insulating...
2017/0018555 NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND PROCESS FOR FOR FORMING SAME
A memory string is disclosed including a plurality of core cells serially connected between a source select gate and a drain select gate along a channel. Each...
2017/0018554 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device having a high degree of freedom of layout has a first part AR1, in which a plurality of p-type wells PW and n-type wells NW are...
2017/0018553 SEMICONDUCTOR DEVICE INCLUDING CAPACITOR AND METHOD OF MANUFACTURING THE SAME
A method for manufacturing a semiconductor device may include forming contact pads spaced apart from each other in a first direction on a substrate and between...
2017/0018552 SEMICONDUCTOR DEVICES INCLUDING DEVICE ISOLATION STRUCTURES AND METHODS OF MANUFACTURING THE SAME
A method of manufacturing a semiconductor device includes forming a plurality of recess regions on an upper surface of a substrate, forming a first oxide layer...
2017/0018551 Reduced Footprint LDMOS Structure for FINFET Technologies
A field effect transistor (FET) having one or more fins provides an extended current path as compared to conventional finFETs. A source terminal is disposed on...
2017/0018550 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device and a method for manufacturing the same is described. The semiconductor device includes a substrate, a first capacitor and a second...
2017/0018549 TRANSISTOR
A transistor includes: a semiconductor substrate; a plurality of gate electrodes, a plurality of source electrodes, and a plurality of drain electrodes on the...
2017/0018548 Semiconductor Device with a Switchable and a Non-Switchable Diode Region
A semiconductor device includes at least one IGBT cell region, at least one switchable free-wheeling diode region, and at least one non-switchable...
2017/0018547 SEMICONDUCTOR DEVICE
In order to reduce electric field concentration in a semiconductor device including a main transistor section and a sense transistor section, the semiconductor...
2017/0018546 DUAL-SIDED SILICON INTEGRATED PASSIVE DEVICES
In some embodiments, a system may include an integrated circuit. The integrated circuit may include a substrate including a first surface, a second surface...
2017/0018545 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided are a silicon carbide semiconductor device that is capable of preventing breakdown voltage degradation in the edge termination structure and a method...
2017/0018544 Semiconductor Device Comprising a Clamping Structure
Semiconductor device with a semiconductor body that includes a clamping structure including a pn junction diode and a Schottky junction diode serially...
2017/0018543 TECHNIQUES FOR FORMING A COMPACTED ARRAY OF FUNCTIONAL CELLS
Techniques are disclosed for forming a compacted array of functional cells using next-generation lithography (NGL) processes, such as electron-beam direct...
2017/0018542 DIE BONDING TO A BOARD
A method of bonding a plurality of die having first and second metal layers on a die surface to a board, comprising placing a first die onto a board comprising...
2017/0018541 WIRING BOARD AND MEMORY SYSTEM INCLUDING THE SAME
A memory system includes a package having a memory device, and a wiring board to which the package is attached. The wiring board includes a first region and a...
2017/0018540 ELECTRONIC DEVICE MODULE AND METHOD OF MANUFACTURING THE SAME
In one general aspect, an electronic device module includes a first board, a first device mounted on a first surface of the first board, a second board...
2017/0018539 Jetting a Highly Reflective Layer Onto an LED Assembly
A layer of Highly Reflective (HR) material is deposited by jetting microdots of the HR material in liquid form onto a substrate and then allowing the HR...
2017/0018538 SOLID STATE LIGHT EMITTER DEVICES AND METHODS
Solid state light emitter devices and methods are provided. A solid state light emitter device can include a submount having an upper surface and a bottom...
2017/0018537 LIGHT EMITTING DIODE (LED) PACKAGE HAVING SHORT CIRCUIT (VLED) DIE, LENS SUPPORT DAM AND SAME SIDE ELECTRODES...
A light emitting diode (LED) package includes a main VLED die; a short circuit VLED die; a lens support dam; a transparent lens attached to the lens support...
2017/0018536 ELECTRONIC CIRCUIT
A semiconductor device includes a MOSFET including a PN junction diode. A unipolar device is connected in parallel to the MOSFET and has two terminals. A first...
2017/0018535 CIRCUIT BOARD HAVING BYPASS PAD
An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be...
2017/0018534 ELECTRONIC COMPONENT DEVICE AND MANUFACTURING METHOD THEREOF
An electronic component device includes a first electronic component, a second electronic component disposed on and connected to the first electronic...
2017/0018533 ELECTRONIC COMPONENT DEVICE
An electronic component device includes a first electronic component, a second electronic component disposed on and connected to the first electronic...
2017/0018532 INTERCONNECTION STRUCTURES AND METHODS FOR MAKING THE SAME
The present disclosure provides a method for interconnecting components. First and second substrates are provided. First and second components are respectively...
2017/0018531 Semiconductor Device and Method of Manufacture
An integrated fan out package on package architecture is utilized along with a reference via in order to provide a reference voltage that extends through the...
2017/0018530 MULTI-DIE SEMICONDUCTOR STRUCTURE WITH INTERMEDIATE VERTICAL SIDE CHIP AND SEMICONDUCTOR PACKAGE FOR SAME
Semiconductor multi-die structures having intermediate vertical side chips, and packages housing such semiconductor multi-die structures, are described. In an...
2017/0018529 FLIPPED DIE STACK
A microelectronic assembly includes a stack of semiconductor chips each having a front surface defining a respective plane of a plurality of planes. A chip...
2017/0018528 SEMICONDUCTOR DEVICE
A semiconductor device includes a first circuit board having a first chip and a second chip mounted on a first base, the second chip having a greater height...
2017/0018527 SEMICONDUCTOR PACKAGE HAVING A PLURALITY OF SEMICONDUCTOR CHIPS STACKED THEREIN
A semiconductor package may include a first semiconductor chip having a plurality of first bonding pads arranged at a first pitch on a first active surface....
2017/0018526 SEMICONDUCTOR DEVICE AND METHOD
Disclosed herein is a semiconductor device that includes a semiconductor die and a substrate including a first surface and a second surface. The substrate...
2017/0018525 METHOD AND PROCESS FOR EMIB CHIP INTERCONNECTIONS
A method for attaching an integrated circuit (IC) to an IC package substrate includes forming a solder bump on a bond pad of an IC die, forming a...
2017/0018524 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE FABRICATION METHOD
A semiconductor device includes a plurality of semiconductor units each including a laminated substrate formed by laminating an insulating board and a circuit...
2017/0018523 Bump Structures for Multi-Chip Packaging
A multi-chip package includes a substrate having a plurality of first bump structures. A pitch between first bump structures of the plurality of first bump...
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