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Patent # Description
2017/0040384 ELECTRONIC DEVICE, IMAGE DISPLAY DEVICE AND SENSOR, AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE
An electronic device includes a control electrode 11 formed on a substrate 10, an insulating layer 12 covering the control electrode 11, an active layer 13...
2017/0040382 SEMICONDUCTOR APPARATUS WITH VARIABLE RESISTOR HAVING TAPERED DOUBLE-LAYERED SIDEWALL SPACERS
A method for fabricating a semiconductor apparatus includes forming a variable resistor region, and forming a spacer having a top linewidth and a bottom...
2017/0040375 SEMICONDUCTOR DEVICES INCLUDING BACK-SIDE INTEGRATED CIRCUITRY
Semiconductor devices may include a semiconductor substrate comprising at least one of transistors and capacitors may be located at an active surface of the...
2017/0040372 SENSING CHIP PACKAGE AND A MANUFACTURING METHOD THEREOF
This present invention provides a method of manufacturing a chip scale sensing chip package, comprising the steps of: providing a sensing device wafer having a...
2017/0040362 GERMANIUM-SILICON LIGHT SENSING APPARATUS
An image sensor array including a carrier substrate; a first group of photodiodes coupled to the carrier substrate, where the first group of photodiodes...
2017/0040351 ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE
The embodiments of the present disclosure provide an array substrate and manufacturing method thereof, and a display device, which relates to the display...
2017/0040347 FLEXIBLE DISPLAY AND METHOD OF MANUFACTURING THE SAME
A flexible display and a method of manufacturing the same are disclosed. In one aspect, the display includes a flexible substrate including a display area and...
2017/0040343 THIN FILM TRANSISTOR AND FABRICATION METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY PANEL
A thin film transistor and a fabrication method thereof, an array substrate and a display panel are provided. The thin film transistor includes: a gate...
2017/0040336 SEMICONDUCTOR MEMORY DEVICES HAVING VERTICAL PILLARS THAT ARE ELECTRICALLY CONNECTED TO LOWER CONTACTS
A semiconductor memory device may include an electrode structure including a selection line on a substrate and word lines between the substrate and the...
2017/0040335 SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate, a plurality of memory cell arrays, and an air gap structure. The substrate includes a cell region, a peripheral...
2017/0040334 NON-VOLATILE MEMORY AND MANUFACTURING METHOD THEREOF
A non-volatile memory having memory cells is provided. A stacked gate structure has gate dielectric layer, assist gate, insulation layer, and erase gate...
2017/0040327 Method Of Forming Conductive Material Of A Buried Transistor Gate Line And Method Of Forming A Buried...
A method of forming conductive material of a buried transistor gate line includes adhering a precursor comprising tungsten and chlorine to material within a...
2017/0040325 FIELD EFFECT TRANSISTOR DEVICE SPACERS
A method for forming field effect transistors comprises forming a first dummy gate stack over a first fin, forming a second dummy gate stack over a second fin,...
2017/0040323 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
A semiconductor device may include a strain relaxed buffer layer provided on a substrate to contain silicon germanium, a semiconductor pattern provided on the...
2017/0040313 SEMICONDUCTOR STRUCTURE WITH RESISTOR LAYER AND METHOD FOR FORMING THE SAME
A semiconductor device structure including a resistor layer is provided. The semiconductor device structure includes a gate structure formed over the first...
2017/0040312 Avalanche-Rugged Quasi-Vertical HEMT
A semiconductor device includes a semiconductor body including first and second lateral surfaces. A first device region includes a drift region of a first...
2017/0040307 LIGHT EMITTING DEVICE PACKAGE AND LIGHT UNIT INCLUDING THE SAME
Disclosed are a light emitting device package. The light emitting device package includes a body having recess; a first lead frame including a first and second...
2017/0040306 Electronic Devices With Soft Input-Output Components
An electronic device may have control circuitry coupled to input-output devices such as a display. A flexible input-output device may be formed from an...
2017/0040302 METHOD FOR PRODUCING A LIGHT EMITTING DEVICE
A method for producing a light emitting device includes a first bonding step including disposing a first bonding member a mounting substrate, placing a light...
2017/0040300 LIGHTING DEVICE AND METHOD FOR PRODUCING A LIGHTING DEVICE
A method for producing a lighting device is disclosed. The method comprises: providing two or more light sources (1, 9) sandwiched between and electrically...
2017/0040297 SEMICONDUCTOR DEVICE HAVING THROUGH SILICON VIAS AND MANUFACTURING METHOD THEREOF
In The semiconductor device, a semiconductor substrate has first and second surfaces. A circuitry layer is formed over the first surface and a first insulating...
2017/0040296 Multi-Layer Semiconductor Devices Fabricated Using a Combination of Substrate and Via Structures and...
A multi-layer semiconductor device includes two or more semiconductor sections, each of the semiconductor sections including at least at least one device layer...
2017/0040293 PRINTED CIRCUIT BOARD (PCB), METHOD OF MANUFACTURING THE PCB, AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE...
Provided are a printed circuit board (PCB) capable of blocking introduction of impurities during a molding process so as to reduce damage on a semiconductor...
2017/0040291 SEMICONDUCTOR PACKAGE INCLUDING PLANAR STACKED SEMICONDUCTOR CHIPS
A semiconductor package may be provided. A semiconductor package may include a substrate. The semiconductor package may include a first semiconductor chip and...
2017/0040285 WAFER PLANARIZATION METHOD
A planar layer of a selected material is formed on a surface of a wafer exhibiting recesses. The formation process including the steps of: a) depositing a...
2017/0040280 METHODS OF FORMING WIRE INTERCONNECT STRUCTURES
A method of forming a wire interconnect structure includes the steps of: (a) forming a wire bond at a bonding location on a substrate using a wire bonding...
2017/0040277 SEMICONDUCTOR DEVICE HAVING CONDUCTIVE VIAS
A semiconductor device is provided, including: a substrate having opposing first and second surfaces and a plurality of conductive vias passing through the...
2017/0040274 BOND PAD STRUCTURE FOR LOW TEMPERATURE FLIP CHIP BONDING
Methods for preparing 3D integrated semiconductor devices and the resulting devices are disclosed. Embodiments include forming a first and a second bond pad on...
2017/0040269 Methods and Apparatus of Packaging Semiconductor Devices
Methods and apparatus are disclosed which reduce the stress concentration at the redistribution layers (RDLs) of a package device. A package device may...
2017/0040260 INTEGRATED CIRCUIT HAVING SLOT VIA AND METHOD OF FORMING THE SAME
An integrated circuit includes a first conductive line on a first metal level of the integrated circuit. The integrated circuit further includes a second...
2017/0040252 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
According to one embodiment, a semiconductor device comprises a first semiconductor region of a first conductivity type, a second semiconductor region of a...
2017/0040250 METHOD OF MANUFACTURING A FLEXIBLE SUBSTRATE WITH CARBON NANOTUBE VIAS AND CORRESPONDING FLEXIBLE SUBSTRATE
There is provided a method for manufacturing a flexible film comprising carbon nanotube interconnects, the method comprising: providing a first substrate;...
2017/0040249 WIRING BOARD AND ELECTRONIC COMPONENT DEVICE
A wiring board includes: an insulating layer; and a wiring layer including: an upper surface; a lower surface opposite to the upper surface; and a side surface...
2017/0040248 ELECTRONIC PACKAGE AND METHOD OF FABRICATING THE SAME
A met of fabricating an electronic package is provided, g: providing a carrier body haying a first surface formed with a plurality of recessed portions, and a...
2017/0040242 THERMAL MANAGEMENT SYSTEM AND METHOD
A thermal management system is provided. The thermal management system includes at least one heat sink including one or more respective fins, wherein the one...
2017/0040241 POWER CONVERTER AND METHOD FOR MANUFACTURING POWER CONVERTER
A power converter includes a plurality of power cards, a plurality of coolers and a pressure member. Each of the power cards houses a semiconductor element....
2017/0040237 INTEGRATED CIRCUITS PROTECTED BY SUBSTRATES WITH CAVITIES, AND METHODS OF MANUFACTURE
Dies (110) with integrated circuits are attached to a wiring substrate (120), possibly an interposer, and are protected by a protective substrate (410)...
2017/0040236 ARRAY SUBSTRATE, METHOD FOR MANUFACTURE THE SAME, AND DISPLAY DEVICE
The present disclosure provides an array substrate, its manufacturing method and a display device. The array substrate includes operating circuit interfaces,...
2017/0040232 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A technique is provided in which a deviation of a characteristic of a semiconductor device is suppressed from occurring. The technique includes a method of a...
2017/0040226 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
To enhance reliability and performance of a semiconductor device that has a fully-depleted SOI transistor, while a width of an offset spacer formed on side...
2017/0040217 MAGNETIC TRAP FOR CYLINDRICAL DIAMAGNETIC MATERIALS
A magnetic trap is configured to arrange at least one diamagnetic rod. The magnetic trap includes first and second magnets on a substrate that forms the...
2017/0040215 SEMICONDUCTOR DEVICE WITH AN INTERCONNECT STRUCTURE AND METHOD FOR FORMING THE SAME
A method for forming a semiconductor device structure includes providing a substrate and forming a gate electrode on the substrate. A first contact structure...
2017/0040212 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Performance of a semiconductor device is improved. In one embodiment, for example, deposition time is increased from 4.6 sec to 6.9 sec. In other words, in one...
2017/0040200 CYCLIC OLEFIN POLYMER COMPOSITIONS AND POLYSILOXANE RELEASE LAYERS FOR USE IN TEMPORARY WAFER BONDING PROCESSES
The invention broadly relates to cyclic olefin polymer bonding compositions and release compositions, to be used independently or together, that enable thin...
2017/0040196 TEMPLATE, IMPRINT APPARATUS, IMPRINT METHOD AND IMPRINT APPARATUS MANAGEMENT METHOD
According to the embodiments, a template in which a main pattern is placed on a pattern-formed surface of a template substrate, the main pattern being formed...
2017/0040195 TOOLING FOR A PACKAGE ENCLOSING ELECTRONICS AND METHODS OF USE THEREOF
The disclosure relates to a precise cut, reusable tooling assembly used to precisely hold and align a package base during manufacture into an electronic...
2017/0040177 SUBSTRATE PROCESSING APPARATUS, SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING PROGRAM
A substrate processing apparatus is provided that includes a control part configured to control a substrate process in accordance with a processing procedure...
2017/0040175 OXIDE ETCH SELECTIVITY SYSTEMS AND METHODS
Embodiments of the present technology may include a method of etching a substrate. The method may include striking a plasma discharge in a plasma region. The...
2017/0040174 Systems And Methods For Reverse Pulsing
Systems and methods for reverse pulsing are described. One of the methods includes receiving a digital signal having a first state and a second state. The...
2017/0040172 METHODS OF FORMING MATERIAL LAYER
A method of forming a material layer includes providing a substrate into a reaction chamber, providing a source material onto a substrate, the source material...
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