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Patent # Description
2017/0077953 Low-Power Low Density Parity Check Decoding
In an example implementation of this disclosure, a message passing low density parity check (LDPC) decoder may, during decoding of a first group of bits, lock...
2017/0077952 SENSOR INTERFACE THAT PROVIDES A LONG PACKAGE CRC TO IMPROVE FUNCTIONAL SAFETY
A data transmission system comprising an Automotive Sensor Network System (ASNS) connected to a plurality of source locations via a common bus, wherein the...
2017/0077951 COMPUTATION CIRCUIT, ENCODING CIRCUIT, AND DECODING CIRCUIT
Memories retain data blocks on which exclusive logical OR computation is performed, and selection circuits receive a selection signal and select two or more...
2017/0077950 Matrix-Based Error Correction and Erasure Code Methods and System and Applications Thereof
A distributed data storage system breaks data into n slices and k checksums using at least one matrix-based erasure code based on matrices with invertible...
2017/0077949 LOSSLESS DATA COMPRESSION
An analytical instrument includes a data acquisition system that produces data. The analytical instrument includes a data compression system/process that...
2017/0077948 PATH ENCODING AND DECODING
This invention relates to a system, method and computer program product for encoding an input string of binary characters including: a cellular data structure...
2017/0077947 SIGNAL PROCESSING SYSTEM AND ASSOCIATED METHOD
The present invention provides a signal processing system and associated method. The signal processing system includes converter(s) for conversion between...
2017/0077946 DELTA-SIGMA MODULATOR AND METHOD FOR SIGNAL CONVERSION
A delta-sigma modulator (10) comprises a modulator loop (11) and a code generator (12). The modulator loop (11) comprises a loop filter (18). The code...
2017/0077945 Conversion of a Discrete-Time Quantized Signal into a Continuous-Time, Continuously Variable Signal
Provided are, among other things, systems, apparatuses, methods and techniques for converting a discrete-time quantized signal into a continuous-time,...
2017/0077944 Conversion of a Discrete-Time Quantized Signal into a Continuous-Time, Continuously Variable Signal
Provided are, among other things, systems, apparatuses, methods and techniques for converting a discrete-time quantized signal into a continuous-time,...
2017/0077943 CONVERTISSEUR ANALOGIQUE-NUMERIQUE A RAMPE APTE A FOURNIR DIRECTEMENT UNE MOYENNE DE DEUX SIGNAUX
Ramp analog-digital converters used in matrix image sensors to provide a digital value representative of a level of illumination of a pixel are provided. Two...
2017/0077942 METHOD AND APPARATUS FOR INDIRECT CONVERSION OF VOLTAGE VALUE TO DIGITAL WORD
A method for indirect conversion of a voltage value to a digital word consisting in sampling an input voltage through a parallel connection of a sampling...
2017/0077941 METHOD AND APPARATUS FOR CONVERSION OF VALUE OF ANALOG SIGNAL TO COMPRESSED DIGITAL WORD
Method for conversion of a value of an analog signal to a compressed digital word uses conversion of the analog signal to a linear digital word according to a...
2017/0077940 A/D CONVERTER CIRCUIT, PIPELINE A/D CONVERTER, AND WIRELESS COMMUNICATION DEVICE
An A/D converter circuit has an amplifier circuit to amplify an input signal and output a first amplification signal and a second amplification signal, the...
2017/0077939 TEST AND MEASUREMENT INSTRUMENT INCLUDING ASYNCHRONOUS TIME-INTERLEAVED DIGITIZER USING HARMONIC MIXING AND A...
A test and measurement instrument, including a splitter configured to split an input signal having a particular bandwidth into a plurality of split signals,...
2017/0077938 LOW-POWER CONVERSION BETWEEN ANALOG AND DIGITAL SIGNALS USING ADJUSTABLE FEEDBACK FILTER
A system to convert between analog and digital signals, in some embodiments, comprises: a differentiator to produce a differentiated signal based on an input...
2017/0077937 SYSTEM FOR CONVERSION BETWEEN ANALOG DOMAIN AND DIGITAL DOMAIN WITH MISMATCH ERROR SHAPING
The invention provides a system for conversion between analog domain and digital domain with mismatch error shaping, including a DAC, a first injection circuit...
2017/0077936 ERROR CANCELLATION IN A CURRENT DIGITAL-TO-ANALOG CONVERTER OF A CONTINUOUS-TIME SIGMA-DELTA MODULATOR
Apparatus and methods for reducing noise and distortion in current digital-to-analog converters (IDACs) are described. Compensating capacitors may be connected...
2017/0077934 REFERENCE-FREQUENCY-INSENSITIVE PHASE LOCKED LOOP
A phase locked loop may be operable to generate, utilizing a frequency doubler, a reference clock signal whose frequency is twice a frequency of a crystal...
2017/0077933 Phase-Locked Loop Circuit, Data Recovery Circuit, and Control Method for Phase-Locked Loop Circuit
A phase-locked loop circuit, which includes a phase frequency detector, a charge pump, a loop low-pass filter, a first voltage-current converter, a second...
2017/0077932 AUTO FREQUENCY CALIBRATION METHOD
A method of generating an output signal includes determining a sampling period N according to a number of most significant bits (MSBs) of a divider number...
2017/0077931 OSCILLATOR WITH DYNAMIC GAIN CONTROL
In one form, an oscillator includes an oscillator core circuit and a dynamic gain control circuit. The oscillator core circuit is for connection to a frequency...
2017/0077930 BOOLEAN LOGIC IN A STATE MACHINE LATTICE
Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic...
2017/0077929 RECONFIGURABLE CIRCUIT, STORAGE DEVICE, AND ELECTRONIC DEVICE INCLUDING STORAGE DEVICE
A reconfigurable circuit suitable for a redundant circuit of a storage device is provided. A programmable logic element (PLE) includes k logic circuits (e.g.,...
2017/0077928 ON-DIE TERMINATION CONTROL WITHOUT A DEDICATED PIN IN A MULTI-RANK SYSTEM
A memory subsystem includes a multi-device package including multiple memory devices organized as multiple ranks of memory. A control unit for the memory...
2017/0077927 Resistance calibration method and related calibration system
A resistance calibration method for a first resistor of a first module includes performing resistance calibration on a calibration unit of a second module,...
2017/0077926 OPTOELECTRONIC SAFETY DEVICE
An optoelectronic safety device for monitoring a machine movement includes an emitter/receiver device, control electronics, an electric line which includes at...
2017/0077925 SEMICONDUCTOR DEVICE
According to embodiments, a semiconductor device includes a field-effect transistor; a switch; and a controller. The field-effect transistor includes a...
2017/0077924 SEMICONDUCTOR DEVICE AND DRIVING METHOD FOR THE SAME
The semiconductor device includes a switching arm unit in which first and second wide bandgap semiconductor elements, each having a body diode, are connected...
2017/0077923 HIGH SPEED TRACKING CURRENT SENSE SYSTEM
A tracking current sensing system is described. The system may include a first electrical sensing element configured to receive a first electrical signal and a...
2017/0077922 DEVICE
A one-chip igniter is formed by a convenient manufacturing process and at a low cost. A device to switch a power semiconductor switch is provided, the device...
2017/0077921 POWER ON RESET CIRCUIT, POWER ON RESET METHOD AND ELECTRIC DEVICE USING THE SAME
Disclosed are a power on reset circuit, a power on reset method and an electric device using the same. In the power on reset circuit and method, a first...
2017/0077920 POWER SUPPLY VOLTAGE SWITCHING CIRCUIT CAPABLE OF PREVENTING CURRENT LEAKAGE
A power supply voltage switching circuit includes a power selecting module, a level shifting module, and a supply switching module. The power selecting module...
2017/0077919 SEMICONDUCTOR DEVICE AND METHOD OF OUTPUTTING TEMPERATURE ALARM
A semiconductor device including a semiconductor switch circuit and a drive circuit. The semiconductor switch circuit includes a semiconductor switch and a...
2017/0077918 HIGH-SPEED PROGRAMMABLE CLOCK DIVIDER
Systems and methods for dividing input clock signals by programmable divide ratios can produce output clock signals with the delay from the input clock signal...
2017/0077917 SELF RESETTING LATCH
An apparatus includes first and second input transistors receiving respective first and second input signals, and a feedback circuit coupled to the first and...
2017/0077916 DEVICE INCLUDING MULTI-MODE INPUT PAD
A circuit component has a network address. The network address is determined from a voltage level applied to a single electrical contact of the circuit...
2017/0077915 SEMICONDUCTOR DEVICE
According to one embodiment, there is provided a semiconductor device including an input terminal, an output terminal, an oscillation circuit, an adjuster...
2017/0077914 Method and Apparatus to Clip Incoming Signals in Opposing Directions When in an Off State
A MOSFET active-disable switch is configured to clip an incoming signal in opposing directions when in an off state. By one approach the clipping is...
2017/0077913 PULSE WIDTH MODULATION CIRCUIT
The present invention discloses a pulse width modulation circuit, comprising: an input circuit, inputting a voltage through an input end; a voltage difference...
2017/0077912 ULTRA-LOW POWER COMPARATOR WITH SAMPLING CONTROL LOOP ADJUSTING FREQUENCY AND/OR SAMPLE APERTURE WINDOW
Methods and apparatus for minimizing average quiescent current for a desire voltage error in a comparator are disclosed. An example method includes receiving a...
2017/0077911 Method and Apparatus to Cancel an Offset Voltage
These teachings provide for detecting an offset voltage corresponding to a circuit element having an input and an output. (The approaches taught herein will...
2017/0077910 SEMICONDUCTOR INTEGRATED CIRCUITS
A semiconductor integrated circuit includes a scan enable (SE) inverter and a clock (CK) inverter on a substrate, a first multiplex part, and a second...
2017/0077909 SEMICONDUCTOR INTEGRATED CIRCUIT
According to one embodiment, a semiconductor integrated circuit comprises: a first flip-flop including a first input circuit, a first latch, a second latch,...
2017/0077908 HIGH SPEED DOMINO-BASED FLIP FLOP
Apparatuses for a flip-flop are provided. One apparatus for a flip-flop includes a domino logic flip-flop, including a single footer transistor for all nodes...
2017/0077907 FEED-FORWARD BIAS CIRCUIT
A feed-forward bias circuit biases body bias terminals of transistors of another circuit to compensate for PVT variations in the other circuit. In some...
2017/0077906 ESTIMATING SECONDARY PATH PHASE IN ACTIVE NOISE CONTROL
The technology described in this document can be embodied in a computer-implemented method that includes receiving, by one or more processing devices, a first...
2017/0077905 Method of Operating a Finite Impulse Response Filter
According to one aspect of the invention, there is provided a method of operating a finite impulse response filter comprising an input; an output; and a...
2017/0077904 APPARATUS FOR AND METHOD OF PROGRAMMABLE MATCHING NETWORK FOR MULTIPLE SIGNAL TYPES
An apparatus and method are provided. The apparatus includes a multiplexer, including a first input, a second input, a third input, and an output; a first...
2017/0077903 COMPLEX BAND PASS FILTER AND RECEIVER
According to one embodiment, in a complex band pass filter, a second input signal to be supplied to a second active filter circuit has a substantially 90...
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