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Patent # Description
2017/0104012 INTEGRATED CIRCUIT WITH HETEROGENEOUS CMOS INTEGRATION OF STRAINED SILICON GERMANIUM AND GROUP III-V...
A structure includes an off-axis Si substrate with an overlying s-Si.sub.1-xGe.sub.x layer and a BOX between the off-axis Si substrate and the...
2017/0104011 CO-FABRICATED BULK DEVICES AND SEMICONDUCTOR-ON-INSULATOR DEVICES
Bulk semiconductor devices are co-fabricated on a bulk semiconductor substrate with SOI devices. The SOI initially covers the entire substrate and is then...
2017/0104009 ARRAY SUBSTRATE APPARATUS APPLYING THE SAME AND ASSEMBLY METHOD THEREOF
An array substrate, a display apparatus applying the same and the assembly method thereof are provided, wherein the array substrate includes a substrate having...
2017/0104008 DISPLAY DEVICE
A display device comprises: a display panel; a metallic wiring formed in the display panel; and a semiconductor integrated circuit element connected to the...
2017/0104007 DISPLAY PANEL
A display panel is disclosed, which comprises: a substrate comprising a display region and a border region adjacent to the display region; a first transistor...
2017/0104006 ARRAY SUBSTRATE, DISPLAY DEVICE HAVING THE SAME, AND MANUFACTURING METHOD THEREOF
The present application discloses an array substrate comprising a first layer comprising a data line; at least one second layer comprising at least one data...
2017/0104005 CONTACTING SOI SUBSTRATES
An integrated circuit is provided including a semiconductor bulk substrate, a buried oxide layer formed on the semiconductor bulk substrate, a plurality of...
2017/0104004 Methods for Cell Boundary Encroachment and Semiconductor Devices Implementing the Same
A semiconductor device is disclosed to include a plurality of cells. Each of the cells has a respective outer cell boundary defined to circumscribe the cell in...
2017/0104003 Semiconductor device and method for manufacturing the same
According to one embodiment, a semiconductor device includes a stacked body and a pillar. The stacked body includes insulating films, electrode films, and...
2017/0104002 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device comprises: a semiconductor substrate; a plurality of memory units provided on the semiconductor substrate and each including a...
2017/0104001 NON-VOLATILE MEMORY DEVICE
According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first...
2017/0104000 VERTICAL MEMORY DEVICES
A vertical memory device includes a substrate, a plurality of channels on the substrate and extending in a first direction that vertical to a top surface of...
2017/0103999 THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE
A semiconductor device includes lower and upper selection lines, a cell gate structure, a lower dummy structure and an upper dummy structure. The cell gate...
2017/0103998 Vertical Semiconductor Devices and Methods of Manufacturing the Same
In a method of manufacturing a vertical semiconductor device, an insulation layer and a sacrificial layer are alternatively and repeatedly formed on a...
2017/0103997 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
A method of fabricating a semiconductor device can include forming a channel hole in a vertical stack of alternating insulating and sacrificial layers to form...
2017/0103996 NONVOLATILE MEMORY DEVICES AND METHODS OF FORMING SAME
A vertical NAND-type memory device includes a vertical stack of inter-gate insulating layers and gate electrodes arranged in an alternating sequence on an...
2017/0103995 SEMICONDUCTOR DEVICE
A semiconductor device according to embodiments described below includes an element region and a peripheral region. The element region is disposed on a...
2017/0103994 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
According to one embodiment, the array chip includes a three-dimensionally disposed plurality of memory cells and a memory-side interconnection layer connected...
2017/0103993 VERTICAL MEMORY DEVICES
A vertical memory device includes a substrate, a plurality of channels on the substrate and extending in a first direction that is vertical to a top surface of...
2017/0103992 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
An embodiment comprises: a memory cell array that includes a plurality of memory cells arranged in a stacking direction on a semiconductor substrate, and a...
2017/0103991 METHOD OF FORMING MEMORY ARRAY AND LOGIC DEVICES
A method of forming a memory device on a substrate having memory, core and HV device areas. The method includes forming a pair of conductive layers in all...
2017/0103990 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
In an embodiment of the present disclosure, a method of manufacturing a semiconductor device may include forming a pattern group on a substrate, the substrate...
2017/0103989 Method Of Making Embedded Memory Device With Silicon-On-Insulator Substrate
A method of forming a semiconductor device with memory cells and logic devices on the same silicon-on-insulator substrate. The method includes providing a...
2017/0103988 DOPED FERROELECTRIC HAFNIUM OXIDE FILM DEVICES
Techniques for forming an electronic device having a ferroelectric film are described. The electronic device comprises a ferroelectric material having one or...
2017/0103987 SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING THE SAME
A method for manufacturing a semiconductor device includes forming first and second lower structures including selection elements on first and second chip...
2017/0103986 SEMICONDUCTOR DEVICES AND INVERTER HAVING THE SAME
Disclosed are CMOS device and CMOS inverter. The CMOS device includes a substrate having active lines extending in a first direction and defined by a device...
2017/0103985 INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME
An integrated circuit device includes a double-humped protrusion protruding from a surface of an inter-device isolation region. To manufacture the integrated...
2017/0103984 SPACER FOR TRENCH EPITAXIAL STRUCTURES
The disclosure relates to a structure and methods of forming spacers for trench epitaxial structures. The method includes: forming a spacer material between...
2017/0103983 SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF
Provided are a semiconductor device and a fabricating method thereof. The fabricating method includes forming first to fourth fins, each extending in a first...
2017/0103982 DEVICES WITH MULTIPLE THRESHOLD VOLTAGES FORMED ON A SINGLE WAFER USING STRAIN IN THE HIGH-K LAYER
A method for adjusting a threshold voltage includes depositing a strained liner on a gate structure to strain a gate dielectric. A threshold voltage of a...
2017/0103981 METHOD FOR FABRICATING CONTACTS TO NON-PLANAR MOS TRANSISTORS IN SEMICONDUCTOR DEVICE
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first fin-shaped structure on a...
2017/0103980 Method of Operating an Integrated Switchable Capacitive Device
A variable capacitor includes a fixed main capacitor electrode disposed in a first metal layer overlying a substrate, a second main capacitor electrode spaced...
2017/0103979 SYSTEMS AND METHODS FOR FILTERING AND COMPUTATION USING TUNNELLING TRANSISTORS
An electrical circuit is disclosed that comprises plurality of tunneling field-effect transistors (TFETs) arranged in a diffusion network matrix having a...
2017/0103978 Switch Circuit, Semiconductor Device and Method
In an embodiment, a switch circuit includes a bidirectional switch including a first input/output node, a second input/output node, a first diode and a second...
2017/0103977 ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHOD FOR FORMING THE SAME
The present disclosure provides a method for forming an electrostatic discharge (ESD) protection device, including: providing a substrate including an input...
2017/0103976 ESD PROTECTION OF CAPACITORS USING LATERAL SURFACE SCHOTTKY DIODES
Electrostatic Discharge (ESD) protection using lateral surface Schottky diodes is disclosed. In one embodiment, a Metal-Insulator-Metal (MIM) capacitor with...
2017/0103975 DISPLAY PANEL
A display panel including a substrate, a first and second driving chips, a circuit board and multiple second signal traces are provided. The first and second...
2017/0103974 METHOD FOR DESIGNING VEHICLE CONTROLLER-ONLY SEMICONDUCTOR BASED ON DIE AND VEHICLE CONTROLLER-ONLY...
The present invention relates to a method for designing a die-based vehicle controller-only semiconductor and a vehicle controller-only semiconductor...
2017/0103973 Method and Structure of Three-Dimensional Chip Stacking
A method includes placing a first plurality of device dies over a first carrier, with the first plurality of device dies and the first carrier in combination...
2017/0103972 LIGHT-EMITTING DEVICE, INTEGRATED LIGHT-EMITTING DEVICE, AND LIGHT-EMITTING MODULE
A light-emitting device includes a base including a conductive wiring; a light-emitting element mounted on the base and configured to emit light; a light...
2017/0103971 LIGHT EMITTING DEVICE
A light emitting device includes a package including a recess which includes a bottom surface having a substantially circular shape with a circular center, and...
2017/0103970 3D INTEGRATED CIRCUIT PACKAGE WITH THROUGH-MOLD FIRST LEVEL INTERCONNECTS
3D integrated circuit packages with through-mold first level interconnects and methods to form such packages are described. For example, a semiconductor...
2017/0103969 Bonded Dies with Isolation
An electronic circuit structure is formed with first and second dies bonded together. A first active layer is formed in the first die, and a second active...
2017/0103968 Embedded wire bond wires
Apparatuses relating generally to a vertically integrated microelectronic package are disclosed. In an apparatus thereof, a substrate has an upper surface and...
2017/0103967 BONDING PAD ARRANGMENT DESIGN FOR MULTI-DIE SEMICONDUCTOR PACKAGE STRUCTURE
A semiconductor package structure includes a base. A first die is mounted on the base. The first die includes a plurality of first pads arranged in a first...
2017/0103966 LIGHT EMITTING DEVICE PACKAGE AND LIGHTING APPARATUS INCLUDING THE SAME
Alight emitting device package may include a printed circuit board and a plurality of light emitting devices mounted on the printed circuit board, wherein a...
2017/0103965 DATA STORAGE DEVICE AND AN ELECTRONIC DEVICE INCLUDING THE SAME
A data storage device may include a package substrate, and an upper semiconductor chip disposed above a top surface of the package substrate. At least one...
2017/0103964 APPARATUS AND METHODS FOR MICRO-TRANSFER-PRINTING
In an aspect, a system and method for assembling a semiconductor device on a receiving surface of a destination substrate is disclosed. In another aspect, a...
2017/0103963 MICRO-SCRUB PROCESS FOR FLUXLESS MICRO-BUMP BONDING
A fluxless bonding process is provided. An array of micro solder bumps of a first semiconductor structure is aligned to an array of bonding pads of a second...
2017/0103962 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
A lead frame has a first sink, an island, and a control terminal The lead frame is bent, and at a rear surface, the island is positioned closer to one surface...
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