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Patent # Description
2017/0133524 INTEGRATED PHOTODETECTOR WAVEGUIDE STRUCTURE WITH ALIGNMENT TOLERANCE
An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a...
2017/0133523 CRACK-TOLERANT PHOTOVOLTAIC CELL STRUCTURE AND FABRICATION METHOD
After forming an absorber layer containing cracks over a back contact layer, a passivation layer is formed over a top surface of the absorber layer and...
2017/0133522 Process For Making Powder Alloys Containing Cadmium And Selenium
A process for preparing alloy products powders is described using a self-sustaining or self-propagating SHS-type combustion process. Binary, ternary and...
2017/0133521 A METHOD FOR FORMING A PHOTOVOLTAIC CELL AND A PHOTOVOLTAIC CELL FORMED ACCORDING TO THE METHOD
The present disclosure provides a method for forming a contact for a photovoltaic device and a photovoltaic device manufactured according to the method. The...
2017/0133520 METHOD FOR FABRICATING AN ELECTRONIC DEVICE AND A STACKED ELECTRONIC DEVICE
A method for fabricating an electronic device includes fixing a rear face of an integrated-circuit chip to a front face of a support wafer. An infused adhesive...
2017/0133519 BUS BAR FOR SOLAR CELL COMPONENT
A bus bar for solar cell component is provided. The bus bar includes a first copper ribbon, a second copper ribbon, a third copper ribbon and a fourth copper...
2017/0133518 Trench Vertical JFET With Ladder Termination
A vertical JFET with a ladder termination may be made by a method using a limited number of masks. A first mask is used to form mesas and trenches in active...
2017/0133517 THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THIN FILM TRANSISTOR
A thin film transistor 100 according to the invention includes a gate electrode 20, a channel 44, and a gate insulating layer 34 provided between the gate...
2017/0133516 ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE ARRAY SUBSTRATE AND DISPLAY PANEL
The present disclosure relates to an array substrate, a method for manufacturing the array substrate and a display panel. The array substrate includes: a...
2017/0133515 THIN FILM TRANSISTOR, ARRAY SUBSTRATE AND LIQUID CRYSTAL DISPLAY PANEL
A thin film transistor, an array substrate and a liquid crystal display panel are provided. The thin film transistor has an active layer which is formed from...
2017/0133514 THIN FILM TRANSISTOR AND OPERATING METHOD THEREOF
A thin film includes a substrate, a bottom gate, a channel layer, a source and a drain, and a top gate. The bottom gate is disposed on the substrate. The...
2017/0133513 METHOD TO MAKE SELF-ALIGNED VERTICAL FIELD EFFECT TRANSISTOR
A method for making a self-aligned vertical nanosheet field effect transistor. A vertical trench is etched in a layered structure including a plurality of...
2017/0133512 POLYCRYSTALLINE SILICON THIN-FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME AND DISPLAY DEVICE
The disclosure provides a polycrystalline silicon thin-film transistor and a method for manufacturing the same as well as a display device. The polycrystalline...
2017/0133511 LIQUID CRYSTAL DISPLAY DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME
A liquid crystal display device is provided in which the aperture ratio can be increased in a pixel including a thin film transistor in which an oxide...
2017/0133510 HIGH VOLTAGE JUNCTIONLESS FIELD EFFECT DEVICE AND ITS METHOD OF FABRICATION
A structure and a method of fabrication are disclosed of a high voltage junctionless field effect device. A channel layer and a barrier layer are formed...
2017/0133509 FINFET
A FinFET includes a fin structure, a gate, a source-drain region and an inter layer dielectric (ILD). The gate crosses over the fin structure. The source-drain...
2017/0133508 SOURCE/DRAIN REGIONS FOR FIN FIELD EFFECT TRANSISTORS AND METHODS OF FORMING SAME
A method for forming a semiconductor device includes forming a fin extending upwards from a semiconductor substrate and forming a sacrificial layer on...
2017/0133507 METHOD AND STRUCTURE OF STACKED FINFET
A semiconductor structure is provided that includes a fin stack structure of, from bottom to top, a first semiconductor material fin portion, an insulator fin...
2017/0133506 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a Fin FET device. The Fin FET device includes a first fin structure extending in a first direction and protruding from an...
2017/0133505 JUNCTION FIELD EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREFOR
The present invention relates to a junction field effect transistor. The junction field effect transistor comprises a substrate (10), a buried layer in the...
2017/0133504 SILICON CARBIDE SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SAME
A step of forming a silicon carbide substrate includes steps of: forming a first impurity region having a first conductivity type by epitaxial growth; forming...
2017/0133503 HIGH VOLTAGE SEMICONDUCTOR DEVICES AND METHODS OF MAKING THE DEVICES
A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type...
2017/0133502 DMOS TRANSISTOR WITH TRENCH SCHOTTKY DIODE
A DMOS transistor integrates a trench Schottky diode into the body contact of the transistor where the body region surrounding the Schottky metal layer forms a...
2017/0133501 FINFET ISOLATION STRUCTURE AND METHOD FOR FABRICATING THE SAME
A semiconductor device includes a semiconductor device and a semiconductor fin on the semiconductor substrate, in which the semiconductor fin has a fin...
2017/0133500 NITRIDE SEMICONDUCTOR DEVICE
A nitride semiconductor device according to the present disclosure includes a substrate, a p-type GaN layer formed on a main surface of the substrate and made...
2017/0133499 HIGH ELECTRON-MOBILITY TRANSISTOR PRIMARILY MADE OF NITRIDE SEMICONDUCTOR MATERIALS
A high electron-mobility transistor (HEMT) is disclosed. The HEMT includes a channel, a barrier, and a cap layers each made of nitride semiconductor materials....
2017/0133498 SWITCHING DEVICE
The switching device includes an electron transport layer; an electron supply layer provided on the electron transport layer and being in contact with the...
2017/0133497 SELF-ALIGNED STRUCTURES AND METHODS FOR ASYMMETRIC GAN TRANSISTORS & ENHANCEMENT MODE OPERATION
Embodiments include high electron mobility transistors (HEMT). In embodiments, a gate electrode is spaced apart by different distances from a source and drain...
2017/0133496 HIGH-ELECTRON-MOBILITY TRANSISTOR AND MANUFACTURING METHOD THEREOF
Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer...
2017/0133495 TRANSISTOR HAVING GERMANIUM CHANNEL ON SILICON NANOWIRE AND FABRICATION METHOD THEREOF
The present invention provides a transistor and a fabrication method thereof. By a silicon nanowire as a core region being serially wrapped by a germanium...
2017/0133494 SEMICONDUCTOR DEVICE WITH LOW BAND-TO-BAND TUNNELING
The invention includes a semiconductor device comprising an interlevel dielectric layer over a buried insulator layer over a semiconductor substrate; a source...
2017/0133493 TUNNELING FIELD EFFECT TRANSISTORS (TFETS) FOR CMOS ARCHITECTURES AND APPROACHES TO FABRICATING N-TYPE AND...
Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs are described. For example, a tunneling...
2017/0133492 METHOD OF IGZO AND ZNO TFT FABRICATION WITH PECVD SIO2 PASSIVATION
The present invention generally relates to a method of manufacturing a TFT. The TFT has an active channel that comprises IGZO or zinc oxide. After the source...
2017/0133491 FINFET SPACER ETCH WITH NO FIN RECESS AND NO GATE-SPACER PULL-DOWN
A method may include providing a patterned feature extending from a substrate plane of a substrate, the patterned feature including a semiconductor portion and...
2017/0133490 Structure and Formation Method of Semiconductor Device Structure
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a...
2017/0133489 SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS THEREOF
A method for fabricating a semiconductor structure includes forming a plurality of first fin structures in a peripheral region of a substrate and a plurality...
2017/0133488 HIGH-VOLTAGE JUNCTIONLESS DEVICE WITH DRIFT REGION AND THE METHOD FOR MAKING THE SAME
The present invention discloses a method of forming a high voltage junctionless device with drift region. The drift region formed between the semiconductor...
2017/0133487 Replacement Gate Process for FinFET
A method of forming a semiconductor device includes etching a substrate to form two first trenches separated by a fin; filling the two first trenches with an...
2017/0133486 SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS THEREOF
A method for fabricating a semiconductor structure includes forming a plurality of first fin structures in a core region of a substrate and a plurality of...
2017/0133485 III-V GATE-ALL-AROUND FIELD EFFECT TRANSISTOR USING ASPECT RATIO TRAPPING
Embodiments of the invention provide methods for forming III-V gate-all-around field effect transistors on silicon substrates that utilize Aspect-Ratio...
2017/0133484 CIRCUIT STRUCTURE, TRANSISTOR AND SEMICONDUCTOR DEVICE
A circuit structure includes a substrate, a III-V semiconductor compound over the substrate, a Al.sub.xGa.sub.(1-x)N (AlGaN) layer over the III-V semiconductor...
2017/0133483 Semiconductor Device and Manufacturing Method Thereof
An improvement is achieved in the performance of a semiconductor device. The semiconductor device includes a first trench gate electrode and second and third...
2017/0133482 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A method of manufacturing a semiconductor device includes: forming a lattice defect layer in a substrate having a front surface region where a bipolar element...
2017/0133481 HIGH POWER GALLIUM NITRIDE ELECTRONICS USING MISCUT SUBSTRATES
A method of fabricating an electronic device includes providing a III-V substrate having a hexagonal crystal structure and a normal to a growth surface...
2017/0133480 MOS P-N JUNCTION DIODE WITH ENHANCED RESPONSE SPEED AND MANUFACTURING METHOD THEREOF
A MOS P-N junction diode includes a semiconductor substrate, a mask layer, a guard ring, a gate oxide layer, a polysilicon structure, a central conductive...
2017/0133479 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a gate structure thereon, a first...
2017/0133478 Transistors, Memory Cells and Semiconductor Constructions
Some embodiments include a semiconductor construction having a gate extending into a semiconductor base. Conductively-doped source and drain regions are within...
2017/0133477 GATE STACK FORMED WITH INTERRUPTED DEPOSITION PROCESSES AND LASER ANNEALING
Semiconductor structures and methods of fabricating the same using interrupted deposition processes and multiple laser anneals are provided. The structure...
2017/0133476 INSULATED GATE FIELD EFFECT TRANSISTOR HAVING PASSIVATED SCHOTTKY BARRIERS TO THE CHANNEL
A transistor having at least one passivated Schottky barrier to a channel includes an insulated gate structure on a p-type substrate in which the channel is...
2017/0133475 LOW TEMPERATURE POLY-SILICON THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF
A low temperature poly-silicon thin film transistor and a manufacturing method thereof are disclosed. The method includes forming an active layer on a base...
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