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Patent # Description
2017/0140994 GATE STRUCTURE CUT AFTER FORMATION OF EPITAXIAL ACTIVE REGIONS
A gate structure straddling a plurality of semiconductor material portions is formed. Source regions and drain regions are formed in the plurality of...
2017/0140993 GATE STACK INTEGRATED METAL RESISTORS
Described herein are semiconductor devices and methods of forming the same. In some aspects, methods of forming a semiconductor device includes forming a gate...
2017/0140992 FIN FIELD EFFECT TRANSISTOR AND METHOD FOR FABRICATING THE SAME
A FinFET including a substrate, a plurality of insulators disposed on the substrate, a gate stack and a strained material is provided. The substrate includes a...
2017/0140991 METHOD OF FORMING A BICMOS SEMICONDUCTOR CHIP THAT INCREASES THE BETAS OF THE BIPOLAR TRANSISTORS
The betas of the bipolar transistors in a BiCMOS semiconductor structure are increased by forming the emitters of the bipolar transistors with two implants: a...
2017/0140990 PACKAGING METHODS FOR FABRICATION OF ANALYTICAL DEVICE PACKAGES AND ANALYTICAL DEVICE PACKAGES MADE THEREOF
Disclosed are packaging methods for the fabrication of analytical device packages and fabricated analytical device packages. The methods include providing a...
2017/0140989 WAFER DIVIDING METHOD
A method for dividing a wafer having a wiring layer including Cu on the front side, the front side of the wafer being partitioned by a plurality of crossing...
2017/0140988 Encapsulated Semiconductor Package and Method of Manufacturing Thereof
Encapsulated semiconductor packages and methods of production thereof. As a non-limiting example, a semiconductor package may be produced by partially dicing a...
2017/0140987 MOSFET WITH ASYMMETRIC SELF-ALIGNED CONTACT
A semiconductor device includes a source and drain on a substrate; a first and second gate on the source, and the second gate and a third gate on the drain; a...
2017/0140986 SELF-ALIGNED METAL CUT AND VIA FOR BACK-END-OF-LINE (BEOL) PROCESSES FOR SEMICONDUCTOR INTEGRATED CIRCUIT (IC)...
Self-aligned metal cut and via for Back-End-Of-Line (BEOL) processes for semiconductor integrated circuit (IC) fabrication, and related processes and devices,...
2017/0140985 SELF-ALIGNED CONDUCTIVE POLYMER PATTERN PLACEMENT ERROR COMPENSATION LAYER
A method includes forming a first conductive feature positioned in a first dielectric layer. A conductive polymer layer is formed above the first dielectric...
2017/0140984 INTERCONNECT STRUCTURE INCLUDING MIDDLE OF LINE (MOL) METAL LAYER LOCAL INTERCONNECT ON ETCH STOP LAYER
An interconnect structure includes an insulator stack on an upper surface of a semiconductor substrate. The insulator stack includes a first insulator layer...
2017/0140983 TECHNIQUES FOR FILLING A STRUCTURE USING SELECTIVE SURFACE MODIFICATION
A method of device processing. The method may include providing a cavity in a layer, directing energetic flux to a bottom surface of the cavity, performing an...
2017/0140982 METHOD FOR FORMING CONDUCTIVE STRUCTURE IN SEMICONDUCTOR STRUCTURE
A method for manufacturing a semiconductor structure is provided. The method includes forming a first dielectric layer over a substrate and forming a...
2017/0140981 INTERCONNECT STRUCTURE
Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect...
2017/0140980 MECHANISMS FOR FORMING FINFETS WITH DIFFERENT FIN HEIGHTS
A semiconductor device is provided. The semiconductor device includes a first fin partially surrounded by a first isolation structure and a second fin...
2017/0140979 Multi-Barrier Deposition for Air Gap Formation
A method includes forming a first conductive line and a second conductive line in a dielectric layer, etching a portion of the dielectric layer to form a...
2017/0140978 CARRIER AND A METHOD FOR PROCESSING A CARRIER
According to various embodiments, a carrier may be provided, the carrier including: a hollow chamber spaced apart from a surface of the carrier; a trench...
2017/0140977 CHUCK PIN, METHOD FOR MANUFACTURING A CHUCK PIN, APPARATUS FOR TREATING A SUBSTRATE
A chuck pin, method for manufacturing a chuck pin, and an apparatus for treating substrate. The substrate treating apparatus includes a container having a...
2017/0140976 HEAT TREATMENT APPARATUS FOR HEATING SUBSTRATE BY IRRADIATION WITH FLASH LIGHT
A susceptor of a holding part for holding a semiconductor wafer includes a disc-shaped holding plate, an annular shaped guide ring, and a plurality of support...
2017/0140975 SPIN HEAD, APPARATUS AND METHOD FOR TREATING A SUBSTRATE INCLUDING THE SPIN HEAD
The present disclosure relates to a spin head, apparatus and method for treating a substrate including the spin head. The spin head includes a supporting plate...
2017/0140974 LAMINATED BODY AND COMPOSITE BODY; ASSEMBLY RETRIEVAL METHOD; AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
[PROBLEM] To provide a laminated body and so forth that makes it possible to prevent pieces of post-dicing semiconductor backside protective film from sticking...
2017/0140973 LAMINATE BODY AND COMPOSITE BODY; SEMICONDUCTOR DEVICE MANUFACTURING METHOD
[PROBLEM] To provide a laminated body and so forth that makes it possible to reduce cracking that would otherwise occur at the chip side face during dicing. ...
2017/0140972 LAMINATED BODY AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
A laminated body comprising a dicing sheet and a semiconductor backside protective film, in which the dicing sheet comprises a base layer and an adhesive layer...
2017/0140971 ADHESIVE WITH TUNABLE ADHESION FOR HANDLING ULTRA-THIN WAFER
Described is an apparatus which comprises a wafer tray having an adhesive layer, with dynamically adjustable adhesion properties, deposited on a surface of the...
2017/0140970 SUBSTRATE SUPPORT ASSEMBLY WITH DEPOSITED SURFACE FEATURES
A method of manufacturing an electrostatic chuck includes polishing a surface of a ceramic body of the electrostatic chuck to produce a polished surface and...
2017/0140969 ALUMINUM NITRIDE ELECTROSTATIC CHUCK USED IN HIGH TEMPERATURE AND HIGH PLASMA POWER DENSITY SEMICONDUCTOR...
Disclosed is an aluminum nitride electrostatic chuck, comprising: a positioning electrostatic chuck and a carrier structure. The positioning electrostatic...
2017/0140968 Systems and Methods for Controlling Plasma Instability in Semiconductor Fabrication
An apparatus for supporting a wafer during a plasma processing operation includes a pedestal configured to have bottom surface and a top surface and a column...
2017/0140967 Apparatus and Method for Direct Transfer of Semiconductor Devices via Stacking
An apparatus includes a first frame to hold a wafer tape, and a second frame to hold a substrate adjacent to the first side of the wafer tape. A needle is...
2017/0140966 HIGH CAPACITY OVERHEAD TRANSPORT (OHT) RAIL SYSTEM WITH MULTIPLE LEVELS
An overhead transport (OHT) system with multiple levels of rails for the transport of semiconductor workpieces is provided. A first vehicle is configured to...
2017/0140965 Container Transport Facility
A transport apparatus transports a container that includes a flow hole forming portion in which a flow hole through which gas can flow between the outside and...
2017/0140964 WAFER BOAT SUPPORT TABLE AND HEAT TREATMENT APPARATUS USING THE SAME
There is provided a wafer boat support table that supports a wafer boat having a plurality of posts from below, the plurality of posts being configured to...
2017/0140963 SUBSTRATE PROCESSING APPARATUS
A substrate processing apparatus includes a substrate retaining mechanism; a detecting unit detecting a placed state of the substrate retained by the substrate...
2017/0140962 SUBSTRATE TREATING APPARATUS
A substrate treating apparatus includes a treating section for treating substrates. The treating section has a front face and a rear face both connectable to...
2017/0140961 Pick-and-Remove System and Method for Emissive Display Repair
A system and method are provided for repairing an emissive display. Following assembly, the emissive substrate is inspected to determine defective array sites,...
2017/0140960 DIE MOUNTING SYSTEM AND DIE MOUNTING METHOD
In a die mounting system in which a die supply device is set on a component mounter and dies supplied from a die supply device are mounted on a circuit board...
2017/0140959 Apparatus and Method for Direct Transfer of Semiconductor Devices
An apparatus that directly transfers a semiconductor device die from a first substrate to a second substrate. The semiconductor device die is disposed on the...
2017/0140958 HEATER POWER FEEDING MECHANISM
A heater power feeding mechanism for independently controlling temperatures of zones of a stage on which a substrate is placed. The respective zones of the...
2017/0140957 POWER FEEDING MECHANISM AND METHOD FOR CONTROLLING TEMPERATURE OF A STAGE
A heater power feeding mechanism is provided that divides a stage on which a substrate is placed into zones by using a plurality of heaters and can control a...
2017/0140956 Single Piece Ceramic Platen
A single piece ceramic platen is disclosed. This platen may be manufactured using additive manufacturing. The single piece ceramic platen may be manufactured...
2017/0140955 APPARATUS AND METHOD FOR WAFER LEVEL BONDING
A method includes placing a first wafer onto a surface of a first wafer chuck, the first wafer chuck including multiple first profile control zones separated...
2017/0140954 PLACING TABLE AND PLASMA TREATMENT APPARATUS
A placing table on an embodiment includes a supporting member and a base. The supporting member includes a placing region provided with a heater, and an outer...
2017/0140953 SYSTEMS AND METHODS FOR ION BEAM ETCHING
An ion system for use in an etching system for etching at least a wafer using a gas. The ion system may include an ion chamber for containing charged particles...
2017/0140952 METHODS AND APPARATUS FOR CLEANING SEMICONDUCTOR WAFERS
A method for cleaning semiconductor substrate using ultra/mega sonic device comprising holding a semiconductor substrate by using a chuck, positioning a...
2017/0140951 THREE-DIMENSIONAL WAFER SURFACE WASHING METHOD AND DEVICE
Disclosed is an apparatus for removing residues present on the surface of a three-dimensional wafer formed with three-dimensional surface structures to clean...
2017/0140950 SPRAY ASSEMBLY AND WET ETCHING DEVICE HAVING THE SAME
A spray assembly including a spray pipe with a bottom provided with a plurality of first through holes, each having a nozzle, wherein the nozzle includes a...
2017/0140949 PURGE STOCKER AND PURGING METHOD
A purge stocker includes a first supply unit including N first purge apparatuses, each having a first supply unit configured to support a storage container, a...
2017/0140948 SEMICONDUCTOR PACKAGE MANUFACTURING METHOD
A method is provided for manufacturing a semiconductor package capable of preventing positional dislocation of semiconductor chip(s) as a result of contraction...
2017/0140947 Semiconductor Device and Method
In accordance with an embodiment a method of manufacturing a semiconductor device includes bonding a first semiconductor die and a second semiconductor die to...
2017/0140946 Method of Manufacturing a Cooler for Semiconductor Modules
A cooling apparatus is manufactured by: receiving a discrete module by a first singular part, the discrete module including a semiconductor die encapsulated by...
2017/0140945 THERMALLY CONDUCTIVE STRUCTURE FOR HEAT DISSIPATION IN SEMICONDUCTOR PACKAGES
A method of forming a semiconductor package includes providing a substrate, wherein the substrate has at least one chip attached on an upper surface of the...
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