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Patent # Description
2017/0162420 METHOD OF PROCESSING WAFER
A method of processing a wafer includes placing a supporting substrate in confronting relation to a face side of the wafer and integrally bonding the...
2017/0162419 BACKEND TAPING USING FLUID ASSISTED FIXATION
A method comprising; transferring a holding liquid into at least one pocket of a carrier tape, the at least one pocket comprising a recess within the carrier...
2017/0162418 COMPONENT CARRIER TAPE WITH UV RADIATION CURABLE ADHESIVE
A carrier tape for transporting a plurality of components includes a flexible substrate extending along a longitudinal axis of the carrier tape, a plurality of...
2017/0162417 METHOD AND APPARATUS FOR CLAMPING AND DECLAMPING SUBSTRATES USING ELECTROSTATIC CHUCKS
Techniques are disclosed for methods and apparatuses of an electrostatic chuck suitable for operating at high operating temperatures. In one example, a...
2017/0162416 ELECTROSTATIC CHUCK AND SEMICONDUCTOR MANUFACTURING APPARATUS
An electrostatic chuck includes a mount base. The mount base includes a base body and an electrostatic electrode, which is located in the base body. The base...
2017/0162415 System And Method For Clamping A Work Piece
A clamping system and a method of clamping a work piece are disclosed. The clamping system has an electrostatic clamp and a high-impedance voltmeter ("HIV")....
2017/0162414 ELECTROSTATIC HOLDING DEVICE AND METHOD FOR THE OPERATION THEREOF, AND CHARGE TRANSFER CIRCUIT
An electrostatic holding device (100) for holding component (1) by electrostatic holding forces includes clamp carrier (10) which has electrode device (11) and...
2017/0162413 SEMICONDUCTOR STOCKER SYSTEMS AND METHODS
In an embodiment, the present invention discloses cleaned storage processes and systems for high level cleanliness articles, such as extreme ultraviolet (EUV)...
2017/0162412 SUBSTRATE PROCESSING AND APPARATUS
A method for preparing a stencil to receive a plurality of IC units, the method comprising the steps of: providing a metal substrate having an array of...
2017/0162411 TRAY
A tray for holding an integrated circuit component includes a base frame and at least a pair of supporting walls. The supporting walls are connected to the...
2017/0162410 MARKING METHOD FOR WAFER DICE
Disclosed is a method for marking, by using a laser marker, a plurality of wafer dice divided by a wafer dicing process. The disclosed marking method for wafer...
2017/0162409 SUBSTRATE PROCESSING APPARATUS, METHOD OF DETACHING SUBSTRATE FROM VACUUM SUCTION TABLE OF SUBSTRATE PROCESSING...
An object of the present invention is to detach a substrate from a table without damaging the substrate by lift pins. One embodiment of the present invention...
2017/0162408 High Efficiency High Accuracy Heater Driver
A thermal process chamber having a lamp driver circuit that includes two transistors and two diodes is described. The thermal process chamber includes a...
2017/0162407 REDUCED WIRE COUNT HEATER ARRAY BLOCK
A thermal system includes a plurality of thermal elements. In one form, each of the thermal elements define a resistor and a current limiting device. The...
2017/0162406 CAPACITIVE COUPLING PLASMA PROCESSING APPARATUS AND METHOD FOR USING THE SAME
A plasma processing apparatus includes a process container configured to accommodate a target substrate and to be vacuum-exhausted. A first electrode and a...
2017/0162405 SPIN CHUCK WITH HEATED NOZZLE ASSEMBLY
An apparatus for processing wafer-shaped articles comprises a process chamber and a spin chuck positioned inside the process chamber. The spin chuck is...
2017/0162404 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
The present technology relates to a semiconductor device and a method of manufacturing the semiconductor device capable of suppressing warpage of the...
2017/0162403 METHOD FOR FABRICATING STACK DIE PACKAGE
In one embodiment, a method can include coupling a gate and a source of a first die to a lead frame. The first die can include the gate and the source that are...
2017/0162402 METHOD OF MANUFACTURING A SEMICONDUCTOR STRUCTURE
A method of manufacturing a semiconductor structure is provided. First, a preliminary structure is provided. The preliminary structure has a first region and a...
2017/0162401 BAFFLE PLATE, PLASMA PROCESSING APPARATUS USING THE SAME, SUBSTRATE PROCESSING APPARATUS AND METHOD OF...
A plasma processing apparatus includes a susceptor, a chamber housing that accommodates the susceptor and encloses a reaction space, and an annular shaped...
2017/0162400 SUBSTRATE TREATMENT APPARATUS AND SUBSTRATE TREATMENT METHOD
A substrate treatment method is used for removing a resist from a front surface of a substrate. A substrate treatment apparatus includes a substrate holding...
2017/0162398 LOW-DAMAGE ETCHING METHOD FOR III-NITRIDE
A low-damage etching method for a III-Nitride structure is disclosed. The method comprises: forming an etching mask on the III-Nitride structure, which is...
2017/0162397 DRY-ETCHING METHOD
According to the present invention, a dry-etching method for performing plasma etching in a vertical profile while maintaining selectivity relative to a mask,...
2017/0162396 METHOD OF FABRICATING A GATE CAP LAYER
A method of fabricating a gate cap layer includes providing a substrate with an interlayer dielectric disposed thereon, wherein a recess is disposed in the...
2017/0162395 FINFET GATE STRUCTURE
A semiconductor device includes a semiconductor fin, a lining oxide layer, a silicon nitride based layer and a gate oxide layer. The semiconductor fin has a...
2017/0162394 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
A method is provided for fabricating a semiconductor device. The method includes providing a base substrate including a dummy gate electrode and an interlayer...
2017/0162393 METAL REFLOW FOR MIDDLE OF LINE CONTACTS
A method of forming a contact in a semiconductor device includes forming a first gate and a second gate on a substrate; removing an interlayer dielectric (ILD)...
2017/0162392 High-efficiency line-forming optical systems and methods for defect annealing and dopant activation
High-efficiency line-forming optical systems and methods for defect annealing and dopant activation are disclosed. The system includes a CO.sub.2-based...
2017/0162391 SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME
A semiconductor device includes a GaN device provided with: a substrate made of a semi-insulating material or a semiconductor; a channel-forming layer...
2017/0162390 Forming a Contact Layer on a Semiconductor Body
Disclosed is a method. The method includes forming a metal layer on a first surface of a semiconductor body; irradiating the metal layer with particles to move...
2017/0162389 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
A method for fabricating the semiconductor device is disclosed. A semiconductor substrate having a main surface is provided. A gate is formed on the main...
2017/0162388 STRUCTURE AND METHOD FOR HIGH PERFORMANCE LARGE-GRAIN-POLY SILICON BACKPLANE FOR OLED APPLICATIONS
Large grain polysilicon films can be exfoliated on a handle substrate, such as a glass or glass-ceramic substrate. The large grain polysilicon can have high...
2017/0162387 INTEGRATION OF III-V COMPOUND MATERIALS ON SILICON
A method of forming a semiconductor device is provided. The method includes depositing an aluminum-base interlayer on a silicon substrate, the aluminum-base...
2017/0162386 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device includes: forming a base film containing a first element and carbon on a substrate by supplying a film forming...
2017/0162385 WAFER ROTATION IN A SEMICONDUCTOR CHAMBER
A method and apparatus for processing a substrate are provided. The apparatus includes a pedestal and rotation member, both of which are moveably disposed...
2017/0162384 APPARATUS AND TECHNIQUES FOR FILLING A CAVITY USING ANGLED ION BEAM
A method may include generating a plasma in a plasma chamber and directing the ions comprising at least one of a condensing species and inert gas species from...
2017/0162383 FIN-FET DEVICE AND FABRICATION METHOD THEREOF
A method for fabricating a Fin-FET device includes forming a plurality of discrete fin structures on a substrate with a bottom portion of the sidewall surfaces...
2017/0162382 SEALING COMPOSITION AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
The invention provides a sealing composition including: polymer (A) containing a cationic functional group and having a weight average molecular weight of from...
2017/0162381 MASK PATTERN FORMING METHOD, FINE PATTERN FORMING METHOD, AND FILM DEPOSITION APPARATUS
In a mask pattern forming method, a resist film is formed over a thin film, the resist film is processed into resist patterns having a predetermined pitch by...
2017/0162380 PATTERN DECOMPOSITION FOR DIRECTED SELF ASSEMBLY PATTERNS TEMPLATED BY SIDEWALL IMAGE TRANSFER
After forming spacers over a hard mask layer using a sidewall image transfer process, a neutral material layer is formed on the portions of the hard mask layer...
2017/0162379 METHODS AND SOLUTIONS FOR CLEANING INGAAS (OR III-V) SUBSTRATES
Embodiments described herein generally relate to improved methods and solutions for cleaning a substrate prior to epitaxial growth of Group III-V channel...
2017/0162378 METHOD OF MANUFACTURING SUBSTRATE FOR EPITAXY
A method of manufacturing a substrate for epitaxy is disclosed, including the following steps. Dispose a buffer layer on a base, wherein the buffer layer is...
2017/0162377 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND CHEMICAL LIQUID
A method of manufacturing a semiconductor device including attaching, by a liquid treatment, a first liquid to a surface of a semiconductor substrate having a...
2017/0162376 STRANDED OUTER LEAD WIRE ASSEMBLY FOR QUARTZ PINCH SEALS
A stranded outer lead wire assembly for a quartz pinch sealed lamp. The stranded outer lead wire assembly is a butt welded connection of a refractory metal...
2017/0162375 MASS SPECTROMETRY DEVICE
A mass spectrometry device that can perform highly robust, highly sensitive, and low-noise analysis and addresses the problems of preventing reductions in ion...
2017/0162374 Improved Quadrupole Robustness
An apparatus for filtering ions is disclosed comprising a separation device for separating ions temporally according to a first physico-chemical property and a...
2017/0162373 INLINE DILUTION AND AUTOCALIBRATION FOR ICP-MS SPECIATION ANALYSIS
Systems and methods for inline and automatic dilution of chemicals of interest for speciation and subsequent analysis by ICP spectrometry are described. A...
2017/0162372 Methods for Mass Spectrometry of Mixtures of Protein or Polypeptides Using Proton Transfer Reaction
Applications of ion-ion reaction chemistry are disclosed in which proton transfer reactions (PTR) are used to (1) simplify complex mixture analysis of samples...
2017/0162371 Methods and Apparatus for Tandem Collision-Induced Dissociation Cells
A method for operating a mass spectrometer so as to detect or quantify analytes, comprises: (a) identifying a selected-reaction-monitoring (SRM) transition to...
2017/0162370 ARCING DETECTION APPARATUS FOR PLASMA PROCESSING
Embodiments described herein generally relate to a plasma processing chamber and a detection apparatus for arcing events. In one embodiment, an arcing...
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