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Patent # Description
2017/0179326 SYSTEM AND METHOD FOR MASS-PRODUCTION OF HIGH-EFFICIENCY PHOTOVOLTAIC STRUCTURES
One embodiment of the invention can provide a system for fabricating a photovoltaic structure. During fabrication, the system can form a sacrificial layer on a...
2017/0179325 SOLAR CELL AND METHOD OF MANUFACTURING THE SAME
Disclosed is a solar cell including a semiconductor substrate, a protective-film layer on a surface of the semiconductor substrate, a polycrystalline...
2017/0179324 HIGH-EFFICIENCY LOW-COST SOLAR PANEL WITH PROTECTION CIRCUITRY
One embodiment of the invention can provide a solar panel. The solar panel can include a plurality of strings of photovoltaic strips sandwiched between a front...
2017/0179323 SOLAR CELL MODULE
A solar cell module includes: two solar cells, each including: a first main face and a second main face; a first electrode on the first main face, comprising a...
2017/0179322 SOLAR BATTERY MODULE
A solar battery module is provided with a plurality of solar cells, a wiring material for connecting adjacent solar cells in the longitudinal directors to form...
2017/0179320 SYSTEM AND METHOD FOR FABRICATING SOLAR PANELS USING BUSBARLESS PHOTOVOLTAIC STRUCTURES
A photovoltaic structure can include two or more sets of parallel conductive fingers on a top surface and a bottom surface, such that the fingers can collect...
2017/0179319 MANUFACTURING METHOD FOR SOLAR CELL MODULE PROVIDED WITH MULTIPLE SOLAR CELLS CONNECTED BY TAB LINES AND SOLAR...
In a solar cell module, a first encapsulant and a second encapsulant are provided between a first protective member and a second protective member, and solar...
2017/0179318 Flexible Laminates for Solar Modules
A solar module includes a laminate structure having at least two solar cells. Each of the solar cells has an individual reinforcement laminated to one face of...
2017/0179317 EXTENDED SHORT-WAVE INFRARED STRAIN-LAYERED SUPERLATTICE ON INDIUM ARSENIDE SUBSTRATE AND ASSOCIATED METHODS
Materials and methods may be provided for short-wave infrared (SWIR) superlattice materials. The superlattice material includes a first sub-layer comprising...
2017/0179316 DIGITAL ALLOY GERMANIUM HETEROJUNCTION SOLAR CELL
A photovoltaic device includes a digital alloy buffer layer including a plurality of alternating layers of semiconductor material. An absorption layer...
2017/0179315 SOLAR CELL, SOLAR CELL MODULE, AND PRODUCTION METHOD FOR SOLAR CELL
An n-type low-doped region and a first main-surface side highly doped region, which has an n-type dopant concentration higher than that in the n-type low-doped...
2017/0179314 PHOTOVOLTAIC CELLS
This invention relates to cells and devices for harvesting light. Specifically the cell comprises at least one electrode which comprises graphene or modified...
2017/0179313 Solar Cell With Reduced Absorber Thickness and Reduced Back Surface Recombination
A stacked-layered thin film solar cell. The solar cell has reduced absorber thickness and an improved back contact for Copper Indium Gallium Selenide solar...
2017/0179312 LASER BEAM SHAPING FOR FOIL-BASED METALLIZATION OF SOLAR CELLS
Approaches for foil-based metallization of solar cells and the resulting solar cells are described. For example, a method of fabricating a solar cell involves...
2017/0179311 METHOD OF MANUFACTURING PHOTOELECTRIC CONVERSION ELEMENT, PHOTOELECTRIC CONVERSION ELEMENT, AND PHOTOELECTRIC...
A method of manufacturing a photoelectric conversion element including a semiconductor layer includes: forming an electrode; forming an insulating layer...
2017/0179310 SOLAR CELL FABRICATION USING LASER PATTERNING OF ION-IMPLANTED ETCH-RESISTANT LAYERS AND THE RESULTING SOLAR CELLS
Solar cell fabrication using laser patterning of ion-implanted etch-resistant layers, and the resulting solar cells, are described. In an example, a back...
2017/0179309 ADHESIVE FOR SOLAR-CELL BACK SHEET, POLYOL COMPOSITION FOR SOLAR-CELL BACK SHEET ADHESIVE, SOLAR-CELL BACK...
There are provided an adhesive for a solar-cell back sheet having an excellent curing rate and being capable of exhibiting excellent adhesive performance by...
2017/0179308 LASER FOIL TRIM APPROACHES FOR FOIL-BASED METALLIZATION FOR SOLAR CELLS
Laser foil trim approaches for foil-based metallization of solar cells, and the resulting solar cells, are described. For example, a method of fabricating a...
2017/0179307 DEVICE LAYER THIN-FILM TRANSFER TO THERMALLY CONDUCTIVE SUBSTRATE
A semiconductor structure includes a thin-film device layer, an optoelectronic device disposed in the thin-film device layer, and a surrogate substrate...
2017/0179306 SEMICONDUCTOR DEVICE
A semiconductor device include a substrate, a first well region formed in the substrate, a first isolation structure formed in the first well region, a...
2017/0179305 ENABLING LARGE FEATURE ALIGNMENT MARKS WITH SIDEWALL IMAGE TRANSFER PATTERNING
In an embodiment, this disclosure relates to a method of creating an alignment feature within a sidewall image transfer process by the addition of a block...
2017/0179304 LEAKAGE-FREE IMPLANTATION-FREE ETSOI TRANSISTORS
A semiconductor device includes an extremely thin semiconductor-on-insulator substrate (ETSOI) having a base substrate, a thin semiconductor layer and a buried...
2017/0179303 VERTICAL TRANSISTOR FABRICATION AND DEVICES
A method of fabricating a vertical field effect transistor including forming a first recess in a substrate; epitaxially growing a first drain from the first...
2017/0179302 VERTICAL FIELD EFFECT TRANSISTORS
Vertical field effect transistors (FETs) with minimum pitch and methods of manufacture are disclosed. The structure includes at least one vertical fin...
2017/0179301 FINFETS with Wrap-Around Silicide and Method Forming the Same
A device includes isolation regions extending into a semiconductor substrate, with a substrate strip between opposite portions of the isolation regions having...
2017/0179300 ARRAY SUBSTRATE AND METHOD FOR MAKING SAME
A high-performance TFT substrate for a flat panel display includes a substrate, a first conductive layer on the substrate, a semiconductor layer positioned on...
2017/0179299 SEMICONDUCTOR DEVICE HAVING A PLANAR INSULATING LAYER
A semiconductor device includes a substrate. A planar insulating layer is disposed on an upper surface of the substrate. A channel region is disposed above the...
2017/0179298 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A change in electrical characteristics of a semiconductor device including an interlayer insulating film over a transistor including an oxide semiconductor as...
2017/0179297 ONE TIME PROGRAMMABLE NON-VOLATILE MEMORY DEVICE
A one-time programmable non-volatile memory device includes a first conductivity type well region located in a semiconductor substrate, a selection gate...
2017/0179296 MANUFACTURE METHOD OF DUAL GATE OXIDE SEMICONDUCTOR TFT SUBSTRATE AND STRUCTURE THEREOF
A dual gate oxide semiconductor TFT substrate is made by utilizing a halftone mask to implement one photo process, which accomplishes patterning of an oxide...
2017/0179295 SEMICONDUCTOR STRUCTURE
A semiconductor structure includes a substrate and a first element disposed in the substrate and arranged along a first direction. The first element is made of...
2017/0179294 SEMICONDUCTOR DEVICE
A semiconductor device capable of holding data for a long time is provided. The semiconductor device includes a first transistor, a second transistor, and a...
2017/0179293 TRANSISTOR, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE
To provide a transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor...
2017/0179292 NON-PLANAR TRANSISTOR
A non-planar transistor is provided. It includes a substrate, a fin structure, a gate structure, a first spacer structure and a source/drain region. The fin...
2017/0179291 FinFETs with Strained Well Regions
A device includes a substrate and insulation regions over a portion of the substrate. A first semiconductor region is between the insulation regions and having...
2017/0179290 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a substrate, at least one source drain feature, a gate structure, and at least one gate spacer. The source/drain feature is...
2017/0179289 METHOD TO FORM STRAINED nFET AND STRAINED pFET NANOWIRES ON A SAME SUBSTRATE
A semiconductor is provided that includes an nFET gate structure straddling over a first nanowire stack and a portion of a first SiGe layer having a first Ge...
2017/0179288 III-V TRANSISTOR DEVICE WITH SELF-ALIGNED DOPED BOTTOM BARRIER
A semiconductor device comprises a first layer of a substrate arranged on a second layer of the substrate the second layer of the substrate including a doped...
2017/0179287 MOS Devices with Non-Uniform P-type Impurity Profile
An integrated circuit structure include a semiconductor substrate, a gate stack over the semiconductor substrate, and a recess extending into the semiconductor...
2017/0179286 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
A method for forming a semiconductor device includes steps as follows: Firstly, a semiconductor substrate having a circuit element with at least one spacer...
2017/0179285 Methods for Forming Semiconductor Device Structures
The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication. A structure includes a relaxed...
2017/0179284 SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME
A semiconductor device includes a substrate including a first region and a second region, a first fin-type pattern in the first region, a second fin-type...
2017/0179283 MULTI-GATE TUNNEL FIELD-EFFECT TRANSISTOR (TFET)
A Tunnel Field-Effect Transistor (TFET) is provided comprising a source-channel-drain structure of a semiconducting material. The source-channel-drain...
2017/0179282 CHANNEL-LAST REPLACEMENT METAL-GATE VERTICAL FIELD EFFECT TRANSISTOR
A method of making a vertical transistor includes forming a doped source on a substrate; depositing a sacrificial gate material on the source; forming a trench...
2017/0179281 Self-Aligned Nanostructures for Semiconductor Devices
A method for forming a semiconductor device is disclosed. The method includes providing a semiconductor substrate. The method also includes epitaxially growing...
2017/0179280 POWER MOSFETS AND METHODS FOR MANUFACTURING THE SAME
A semiconductor device and the method of manufacturing the same are provided. The semiconductor device includes a substrate, a source region, a drain region, a...
2017/0179279 PARTIAL, SELF-BIASED ISOLATION IN SEMICONDUCTOR DEVICES
A device includes a semiconductor substrate, a buried doped isolation layer disposed in the semiconductor substrate to isolate the device, a drain region...
2017/0179278 Power FET With Integrated Sensors And Method Of Manufacturing
A semiconductor device and a method of making are disclosed. The device includes a substrate, a power field effect transistor (FET), and integrated sensors...
2017/0179277 TRENCH MOSFET WITH DEPLETED GATE SHIELD AND METHOD OF MANUFACTURE
A semiconductor device, method of manufacture of a semiconductor device, and electronic system are disclosed. For example, the semiconductor device includes at...
2017/0179276 SUPER-JUNCTION SEMICONDUCTOR DEVICE
A super-junction semiconductor device is provided. The super-junction semiconductor device includes a substrate, a drift layer, a field insulator, a floating...
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