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Patent # Description
2017/0222063 SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor structure includes a semiconductor substrate having a first electrical portion, a second electrical portion, and a bridged conductive layer....
2017/0222062 CHIP DIODE AND METHOD FOR MANUFACTURING SAME
The present invention is directed to a chip diode with a Zener voltage Vz of 4.0 V to 5.5 V, including a semiconductor substrate having a resistivity of 3...
2017/0222061 MANUFACTURE METHOD OF TFT SUBSTRATE STRUCTURE AND TFT SUBSTRATE STRUCTURE
The present invention provides a manufacture method of a TFT substrate structure and a TFT substrate structure. In the manufacture method of the TFT substrate...
2017/0222060 TFT SWITCH AND METHOD FOR MANUFACTURING THE SAME
A thin-film transistor (TFT) switch includes a gate, a drain, a source, a semiconductor layer, and a fourth electrode. The drain is connected to a first...
2017/0222059 ARRAY SUBSTRATE AND THE MANUFACTURING METHODS THEREOF
The present disclosure relates to an array substrate and the manufacturing method thereof. The array substrate includes a glass substrate. The shading metal...
2017/0222058 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
There is provided a semiconductor device including: a gate electrode; a channel layer arranged in a region directly below or directly above the gate electrode;...
2017/0222057 Semiconductor Device, Display Device, Input/Output Device, and Electronic Device
A self-aligned transistor including an oxide semiconductor film, which has excellent and stable electrical characteristics, is provided. A semiconductor device...
2017/0222056 SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, MODULE, ELECTRONIC DEVICE, AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a first insulator, a transistor over the first insulator, a second insulator over the transistor, and a third insulator over...
2017/0222055 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a substrate, at least one active region, at least one gate structure, and an insulating structure. The active region is present...
2017/0222054 SEMICONDUCTOR STRUCTURE(S) WITH EXTENDED SOURCE/DRAIN CHANNEL INTERFACES AND METHODS OF FABRICATION
Semiconductor structures and methods of fabrication are provided, with one or both of an extended source-to-channel interface or an extended drain-to-channel...
2017/0222053 V-Shape Recess Profile for Embedded Source/Drain Epitaxy
A semiconductor device includes a semiconductor base. A dielectric isolation structure is formed in the semiconductor base. A source/drain of a FinFET...
2017/0222052 ENHANCED DISLOCATION STRESS TRANSISTOR
A device is provided. The device includes a transistor formed on a semiconductor substrate, the transistor having a conduction channel. The device includes at...
2017/0222051 FINFET DEVICE AND METHOD OF FORMING THE SAME
A FinFET device and a method of forming the same are disclosed. In accordance with some embodiments, a FinFET device includes a substrate having at least one...
2017/0222050 POWER MOSFETS AND METHODS FOR MANUFACTURING THE SAME
A semiconductor device and the method of manufacturing the same are provided. The semiconductor device comprises a well region, a first doped region, a drain...
2017/0222049 VERTICAL TRANSISTOR AND THE FABRICATION METHOD
A vertical transistor and the fabrication method. The transistor comprises a first surface and a second surface that is opposite to the first surface. A drift...
2017/0222048 IMPLEMENTATION OF LONG-CHANNEL THICK-OXIDE DEVICES IN VERTICAL TRANSISTOR FLOW
A method for fabricating a semiconductor structure is provided that includes the steps of: forming a structure including a substrate, a counter-doped layer on...
2017/0222047 THREE DIMENSIONAL VERTICALLY STRUCTURED ELECTRONIC DEVICES
In one embodiment, a method of forming a vertical transistor includes forming a layer comprising a semiconductor material above a substrate, defining three...
2017/0222046 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
In a vertical MOSFET of a trench gate structure, a high-concentration implantation region is provided in a p-type base region formed from a p-type silicon...
2017/0222045 SELF-ALIGNED REPLACEMENT METAL GATE SPACERLESS VERTICAL FIELD EFFECT TRANSISTOR
A method of making a vertical field effect transistor includes forming a semiconductor nanowire that extends from a substrate surface. A first sacrificial...
2017/0222044 STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a source structure at least...
2017/0222043 Semiconductor Device Including a Lateral Transistor
A semiconductor device includes a source region and a drain region of a first conductivity type. The source region and the drain region are arranged in a first...
2017/0222042 SOI POWER LDMOS DEVICE
An LDMOS device includes a handle portion having a buried dielectric layer and a semiconductor layer thereon doped a second dopant type. A drift region doped a...
2017/0222041 TRENCH HAVING THICK DIELECTRIC SELECTIVELY ON BOTTOM PORTION
A method of fabricating a semiconductor device includes etching a semiconductor substrate having a top surface to form a trench having sidewalls and a bottom...
2017/0222040 TRENCH GATE TRENCH FIELD PLATE VERTICAL MOSFET
A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the...
2017/0222039 SEMICONDUCTOR DEVICE AND METHOD OF MAUFACTURING THE SAME
A semiconductor device according to one embodiment includes a semiconductor substrate having a main surface and a back surface opposite to the main surface, a...
2017/0222038 SEMICONDUCTOR DEVICE
A semiconductor device includes a layer having first and second surfaces, a first region including central and peripheral portions, and a second region on the...
2017/0222037 SEMICONDUCTOR DEVICE
Provided is a semiconductor apparatus includes: a gate electrode disposed inside a trench and opposedly facing a p type base region with a gate insulating film...
2017/0222036 Memory Cell And Non-Volatile Semiconductor Storage Device
A voltage applied to a bit line or to a source line is reduced to a value allowing a first or second select gate structure to block electrical connection...
2017/0222035 PRE-SCULPTING OF SI FIN ELEMENTS PRIOR TO CLADDING FOR TRANSISTOR CHANNEL APPLICATIONS
Transistor fin elements (e.g., fin or tri gate) may be modified by radio frequency (RF) plasma and/or thermal processing for purpose of dimensional sculpting....
2017/0222034 METHOD FOR FORMATION OF VERTICAL CYLINDRICAL GaN QUANTUM WELL TRANSISTOR
The present invention provides a method for forming a quantum well device having high mobility and high breakdown voltage with enhanced performance and...
2017/0222033 SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME
A method of producing a semiconductor device includes forming an insulating film on a substrate on which a semiconductor layer is formed; removing a part of...
2017/0222032 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
The present disclosure provides a semiconductor structure, including a substrate, a first III-V layer over the substrate, having a first band gap, and a second...
2017/0222031 SEMICONDUCTOR DEVICE
A semiconductor device includes a transistor, a semiconductor layer, an active region and a conductive layer. The active region is in the semiconductor layer....
2017/0222030 SEMICONDUCTOR DEVICE FABRICATION
There is provided a method for fabricating a semiconductor device having the following structure, and comprising the steps of growing a first and a second...
2017/0222029 SEMICONDUCTOR DEVICE
A semiconductor device includes a middle field stop layer having a first conductivity type impurity concentration higher than a drift layer and arranged at a...
2017/0222028 SEMICONDUCTOR DEVICE, DISPLAY DEVICE, INPUT/OUTPUT DEVICE, AND ELECTRONIC DEVICE
To suppress change in electric characteristics and improve reliability of a semiconductor device including a transistor formed using an oxide semiconductor. A...
2017/0222026 METHOD OF FABRICATING FIN FIELD EFFECT TRANSISTOR
The present invention provides a method of fabricating a fin field effect transistor (finFET), comprising: firstly, an interfacial layer is formed on a fin...
2017/0222025 ORGANIC SURFACE TREATMENTS FOR DISPLAY GLASSES TO REDUCE ESD
Glass substrates comprising an A-side upon which silicon thin film transistor devices can be fabricated and a B-side having a substantially homogeneous organic...
2017/0222024 FORMING STACKED NANOWIRE SEMICONDUCTOR DEVICE
A semiconductor device comprises a nanowire arranged over a substrate, a gate stack arranged around the nanowire, a spacer arranged along a sidewall of the...
2017/0222023 Apparatus and Method for Power MOS Transistor
A method comprises providing a substrate with a second conductivity type, growing a first epitaxial layer having the second conductivity type, growing a second...
2017/0222022 SEMICONDUCTOR DEVICE WITH COMPOSITE TRENCH AND IMPLANT COLUMNS
A metal insulator semiconductor field effect transistor (MISFET) such as a super junction metal oxide semiconductor FET with high voltage breakdown is realized...
2017/0222021 VERTICAL FIELD EFFECT TRANSISTORS WITH PROTECTIVE FIN LINER DURING BOTTOM SPACER RECESS ETCH
A method of fabricating a vertical field effect transistor comprising that includes forming openings through a spacer material to provide fin structure...
2017/0222020 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes first and second FETs including first and second channel regions, respectively. The first and second FETs include first and...
2017/0222019 METHODS OF FABRICATING SEMICONDUCTOR DEVICES
A semiconductor device and a method for fabricating the same are disclosed. The semiconductor device comprises: a semiconductor substrate with an active area...
2017/0222018 SELF-ALIGNED BOTTOM UP GATE CONTACT AND TOP DOWN SOURCE-DRAIN CONTACT STRUCTURE IN THE PREMETALLIZATION...
An integrated circuit includes a source-drain region, a channel region adjacent to the source-drain region, a gate structure extending over the channel region...
2017/0222017 MEMORY CELL AND FABRICATION METHOD THEREOF
Memory cells and fabrication methods thereof are provided. An exemplary method includes providing a substrate having a well region; forming a select gate...
2017/0222016 COMPOUND SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A compound semiconductor device includes: a semiconductor substrate; a channel layer over the semiconductor substrate; a carrier supply layer over the channel...
2017/0222015 EPI FACET HEIGHT UNIFORMITY IMPROVEMENT FOR FDSOI TECHNOLOGIES
A method of controlling the facet height of raised source/drain epi structures using multiple spacers, and the resulting device are provided. Embodiments...
2017/0222014 INTEGRATED CIRCUIT DEVICE AND METHOD OF FABRICATING THE SAME
A device includes: a gate line on an active region of a substrate, a pair of source/drain regions in the active region on both sides of the gate line, a...
2017/0222013 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
The thickness of an insulating film, which will serve as an offset spacer film and is formed in an offset monitor region, is managed as the thickness of an...
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