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Patent # Description
2017/0221759 METHOD AND SYSTEM FOR UNIFORM DEPOSITION OF METAL
A method for manufacturing a semiconductor device includes providing a substrate, performing a nucleation process on the substrate to form a nucleation layer...
2017/0221758 METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE
A method for forming a semiconductor device structure is provided. The method includes forming a first dielectric layer and a first conductive structure over a...
2017/0221757 FINFET DEVICE AND METHOD OF FORMING THE SAME
Provided is a FinFET device including a substrate having at least one fin, a gate stack, a spacer, a strained layer and a composite etching stop layer. The...
2017/0221756 THREE-DIMENSIONAL MEMORY DEVICE CONTAINING AN ALUMINUM OXIDE ETCH STOP LAYER FOR BACKSIDE CONTACT STRUCTURE AND...
Collateral etching of a dielectric material around a trench during formation of a substrate contact via structure can be avoided employing an aluminum oxide...
2017/0221755 SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME
A semiconductor device may include a first conductive pattern having a line portion and a pad portion connected to the line portion on a substrate, a gate...
2017/0221754 APPARATUS AND METHOD FOR FORMING METAL BY HOT-WIRE ASSISTED CLEANING AND ATOMIC LAYER DEPOSITION
An apparatus includes a housing, a chamber disposed in the housing and configured to receive a substrate, a shower head disposed outside the housing and...
2017/0221753 BARRIER LAYER REMOVAL METHOD AND SEMICONDUCTOR STRUCTURE FORMING METHOD
The present invention provides a barrier layer removal method, wherein the barrier layer includes at least one layer of ruthenium or cobalt, the method...
2017/0221752 SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE
In accordance with an embodiment, a semiconductor component includes a plurality of layers of compound semiconductor material over a body of semiconductor...
2017/0221751 HIGH SPEED EPITAXY SYSTEM AND METHODS
A substrate carrier for an epitaxy chamber is described that has an elongated base member supporting two substrate supports in an angled relationship and a...
2017/0221750 CONDUCTIVE WAFER LIFT PIN O-RING GRIPPER WITH RESISTOR
Embodiments of the present disclosure generally relate to a lift pin assembly used for de-chucking substrates. The lift pin assembly includes a base and one or...
2017/0221749 HEAT TREATMENT SUSCEPTOR AND HEAT TREATMENT APPARATUS
A plurality of substrate support pins are provided upright on a holding plate so as to contact a position on which no stress is exerted in a lower surface of a...
2017/0221748 SUBSTRATE CONVEYING METHOD AND SUBSTRATE PROCESSING SYSTEM
Provided is a substrate conveying method including: holding a substrate by a holder; rotating the substrate while conveying the substrate; specifying a...
2017/0221747 PIN STRUCTURE, METHOD FOR OPERATING THE SAME, AND SUPPORTING DEVICE CONTAINING THE SAME
The present disclosure provides a pin structure for providing support to a substrate. The pin structure includes a first supporting unit and a second...
2017/0221746 ADHESIVE FOR TEMPORARY BONDING, ADHESIVE LAYER, WAFER WORK PIECE AND METHOD FOR MANUFACTURING SEMICONDUCTOR...
The present invention provides a temporary-bonding adhesive having excellent heat resistance, whereby a semiconductor circuit formation substrate and a support...
2017/0221745 SUPPORT, ADHESIVE SHEET, LAMINATED STRUCTURE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING PRINTED WIRING...
A method for manufacturing a printed wiring board which includes: Step (A) of laminating an adhesive sheet including a support and a resin composition layer...
2017/0221744 POSITIONING APPARATUS
A method includes moving a sensor and an article at a first speed to position the sensor into a reference position relative to an article fixture. The sensor...
2017/0221743 CONNECTING MECHANISM AND CONNECTING METHOD OF SUBSTRATE CONTAINER
A connecting mechanism includes a mounting unit, a substrate transfer port, a door closing or opening the substrate transfer port, a coupling mechanism...
2017/0221742 CENTERING SUBSTRATES ON A CHUCK
An apparatus and an associated method. The apparatus includes a chuck in a process chamber, an array of three or more ultrasonic sensors in the process chary a...
2017/0221741 Method and Apparatus of Evaluating a Semiconductor Manufacturing Process
A method and apparatus for evaluating and controlling a semiconductor manufacturing process having a plurality of process steps in a process flow is described....
2017/0221740 METHODS AND APPARATUSES FOR ESTIMATING ON-WAFER OXIDE LAYER REDUCTION EFFECTIVENESS VIA COLOR SENSING
Disclosed are methods of preparing a semiconductor substrate having a metal seed layer for a subsequent electroplating operation. In some embodiments, the...
2017/0221739 METROLOGY SYSTEM AND MEASUREMENT METHOD USING THE SAME
A method for thickness measurement includes forming an implantation region in a semiconductor substrate. A semiconductor layer is formed on the implantation...
2017/0221738 SUBSTRATE PROCESSING APPARATUS
A substrate processing apparatus includes a first reaction chamber including: a first heating unit, a first processing space, and a first transfer space...
2017/0221737 CHAMBER, SEMICONDUCTOR PROCESSING STATION, AND SEMICONDUCTOR PROCESS USING THE SAME
A chamber includes a sidewall, a cooling pipe, and an external pipe. The cooling pipe includes a first segment extending along the sidewall of the chamber, and...
2017/0221736 HEAT TREATMENT SUSCEPTOR AND HEAT TREATMENT APPARATUS
A plurality of substrate support parts provided on a susceptor each have an outer circumferential surface such that a plane parallel to a holding surface of a...
2017/0221735 Thermal Reflector Device for Semiconductor Fabrication Tool
A system and apparatus for thermal treatment of a substrate with improved thermal uniformity is provided. In some embodiments, the system includes a heating...
2017/0221734 PEDESTAL CONSTRUCTION WITH LOW COEFFICIENT OF THERMAL EXPANSIION TOP
A support assembly for use in semiconductor processing includes an application substrate, a heater layer disposed directly on the application substrate, an...
2017/0221733 WAFER CASSETTE
A wafer cassette includes a case, a plurality of wafer trays, and a plurality of transmission mechanisms. The wafer trays are disposed in the case. Each of the...
2017/0221732 Device for Anisotropically Etching a Substrate, and Method for Operating a Device for Anisotropically Etching a...
A device for etching a substrate includes a first reaction chamber into which a first gas is introduced; a second reaction chamber into which a second gas is...
2017/0221731 TREATING LIQUID VAPORIZING APPARATUS AND SUBSTRATE TREATING APPARATUS
A treating liquid vaporizing apparatus includes a buffer tank for storing a treating liquid, a vaporizing container connected to the buffer tank for vaporizing...
2017/0221730 SUBSTRATE PROCESSING HEATER DEVICE AND SUBSTRATE SOLUTION PROCESSING DEVICE HAVING SAME
The present invention relates to a substrate processing heater device that heats a substrate to process the substrate and a substrate solution processing...
2017/0221729 ENVIRONMENTALLY CONTROLLED COATING SYSTEMS
Embodiments of an enclosed coating system according to the present teachings can be useful for patterned area coating of substrates in the manufacture of a...
2017/0221728 IC PACKAGING METHOD AND A PACKAGED IC DEVICE
Embodiments of a method for packaging Integrated Circuit (IC) dies and an IC device are described. In an embodiment, a method for packaging IC dies involves...
2017/0221727 NON-UNIFORM SUBSTRATE STACKUP
Some embodiments described herein include apparatuses and methods of forming such apparatuses. One such embodiment may include a routing arrangement having...
2017/0221726 CAVITY PACKAGE WITH PRE-MOLDED SUBSTRATE
A cavity package is set forth along with a method of manufacturing thereof. The method comprises applying a selective plating resist to a metallic substrate in...
2017/0221725 SUBSTRATE PROCESSING APPARATUS, SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING LIQUID
In one embodiment, a substrate processing liquid contains phosphoric acid as a primary component and contains water and ketone. In another embodiment, a...
2017/0221724 TRANSISTORS WITH HIGH CONCENTRATION OF BORON DOPED GERMANIUM
Techniques are disclosed for forming transistor devices having source and drain regions with high concentrations of boron doped germanium. In some embodiments,...
2017/0221723 METHOD OF FABRICATING SEMICONDUCTOR STRUCTURE USING PLANARIZATION PROCESS AND CLEANING PROCESS
A method for fabricating a semiconductor structure includes following steps. First, a first layer, a second layer and a third layer are sequentially formed on...
2017/0221722 Pre-Heat Processes for Millisecond Anneal System
Preheat processes for a millisecond anneal system are provided. In one example implementation, a heat treatment process can include receiving a substrate on a...
2017/0221721 GATE CUT WITH HIGH SELECTIVITY TO PRESERVE INTERLEVEL DIELECTRIC LAYER
A method for preserving interlevel dielectric in a gate cut region includes recessing a dielectric fill to expose cap layers of gate structures formed in a...
2017/0221720 APPARATUS AND METHOD FOR TREATING SUBSTRATES
Provided are an apparatus and a method for treating substrates. The apparatus includes a process chamber, a support plate to support a substrate inside the...
2017/0221719 SEMICONDUCTOR DEVICE PROCESSING METHOD FOR MATERIAL REMOVAL
A method of removing at least a portion of a layer of material from over a semiconductor substrate that can include dispensing an etching solution over the...
2017/0221718 SELECTIVE FILM FORMATION FOR RAISED AND RECESSED FEATURES USING DEPOSITION AND ETCHING PROCESSES
Embodiments of the invention provide a processing method for selective film formation for raised and recessed features using deposition and etching processes....
2017/0221717 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a fin structure disposed over a substrate, a gate structure and a source. The fin structure includes an upper layer being...
2017/0221716 METHOD OF CONTROLLING THRESHOLD OF TRANSISTOR AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
In a method of controlling a threshold of a transistor, a gate insulating film is formed in a channel region of a metal-oxide-semiconductor (MOS) transistor on...
2017/0221715 METHOD FOR FORMING JUNCTION IN SEMICONDUCTOR
Pre-amorphization treatment is performed on a surface of a semiconductor wafer to make the surface amorphous. This can prevent channeling in which impurities...
2017/0221714 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
In a vertical MOSFET of a trench gate structure, a high-concentration implantation region is provided in a p-type base region formed from a p-type silicon...
2017/0221713 Methods and Systems for Dopant Activation Using Microwave Radiation
A semiconductor structure includes a substrate, a source/drain (S/D) junction, and an S/D contact. The S/D junction is associated with the substrate and...
2017/0221712 LASER ANNEALING APPARATUS AND LASER ANNEALING METHOD
The present invention provides an efficient heat treatment such as activation treatment of impurities on a substrate such as a thick silicon wafer with large...
2017/0221711 METHOD OF HIGH VOLTAGE DEVICE FABRICATION
A method for manufacturing a semiconductor device includes providing a substrate structure including a substrate having multiple structures. Each of the...
2017/0221710 Systems and Methods for Gap Filling Improvement
Systems and methods are provided for contact formation. A semiconductor structure is provided. The semiconductor structure includes an opening formed by a...
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