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Patent # Description
2017/0250165 SEMICONDUCTOR PACKAGE ASSEMBLY
A semiconductor package assembly having a first semiconductor package, with a first redistribution layer (RDL) structure, a first semiconductor die having...
2017/0250164 DISPLAY APPARATUS AND MANUFACTURING METHOD THEREOF
A display apparatus including a light emitting diode part including a plurality of regularly arranged light emitting diodes, and a thin-film transistor (TFT)...
2017/0250163 CONNECTORS FOR SMART WINDOWS
This disclosure provides connectors for smart windows. A smart window may incorporate an optically switchable pane. In one aspect, a window unit includes an...
2017/0250162 METHOD FOR MANUFACTURING SEMICONDUCTOR APPARATUS, METHOD FOR MANUFACTURING FLIP-CHIP TYPE SEMICONDUCTOR...
A method for manufacturing a semiconductor apparatus, including preparing a first substrate provided with a pad optionally having a plug and a second substrate...
2017/0250161 Correction Die for Wafer/Die Stack
Representative implementations of devices and techniques provide correction for a defective die in a wafer-to-wafer stack or a die stack. A correction die is...
2017/0250160 3DIC Structure and Methods of Forming
A structure and a method of forming are provided. The structure includes a first dielectric layer overlying a first substrate. A first connection pad is...
2017/0250159 INTEGRATED CIRCUIT DIE HAVING BACKSIDE PASSIVE COMPONENTS AND METHODS ASSOCIATED THEREWITH
Embodiments of the present disclosure are directed towards an integrated circuit (IC) die. In embodiments, the IC die may include a semiconductor substrate, a...
2017/0250158 Semiconductor Device and Method of Forming Insulating Layers Around Semiconductor Die
A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the...
2017/0250157 ELECTRODE ASSEMBLY AND METHOD FOR MANUFACTURING SAME
Provided is an electrode assembly which may be manufactured by providing a first substrate and a second substrate, plasma treating the first substrate, forming...
2017/0250156 IMAGING SYSTEM AND MANUFACTURING APPARATUS
An imaging system using ultraviolet light or a manufacturing apparatus including the imaging system is provided. An imaging system includes an imaging element...
2017/0250155 MULTI-ACCESS MEMORY SYSTEM AND A METHOD TO MANUFACTURE THE SYSTEM
A multiple memory access system is disclosed. The system includes a first die disposed on a package substrate. A second die is stacked above the first die. The...
2017/0250154 Semiconductor Device and Method of Forming 3D Dual Side Die Embedded Build-Up Semiconductor Package
A semiconductor device has a plurality of semiconductor die. A substrate is provided with bumps disposed over the substrate. A first prefabricated insulating...
2017/0250153 ELECTRONIC PART, ELECTRONIC DEVICE, AND ELECTRONIC APPARATUS
An electronic part includes a substrate, an insulating film formed over the substrate, a first pillar electrode, a first solder formed over the first pillar...
2017/0250152 Chip embedding package with solderable electric contact
A package comprising an electronic chip, a laminate-type encapsulant at least partially encapsulating the electronic chip, a wiring structure extending from...
2017/0250151 SEMICONDUCTOR UNIT, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS
There are provided a semiconductor unit that prevents connection failure caused by a wiring substrate to improve reliability, a method of manufacturing the...
2017/0250150 DUAL SIDE SOLDER RESIST LAYERS FOR CORELESS PACKAGES AND PACKAGES WITH AN EMBEDDED INTERCONNECT BRIDGE AND...
A coreless package substrate with dual side solder resist layers is disclosed. The coreless package substrate has a top side and a bottom side opposite of the...
2017/0250149 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor structure includes a substrate; a post passivation interconnect (PPI) disposed over the substrate and including a plurality of first elongated...
2017/0250148 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device forming a pad on the semiconductor substrate. A rewiring is formed that is electrically connected to the pad...
2017/0250147 Semiconductor Device and Method of Manufacture
A semiconductor device has a top metal layer, a first passivation layer over the top metal layer, a first redistribution layer over the first passivation...
2017/0250146 Power Supply Transient Performance (Power Integrity) for a Probe Card Assembly in an Integrated Circuit Test...
The present invention describes essentially three different embodiments for the implementation of low impedance (over frequency) power delivery to a die. Such...
2017/0250145 PERFORATED CONDUCTIVE MATERIAL FOR EMI SHIELDING OF SEMICONDUCTOR DEVICE AND COMPONENTS
An electric device and method of fabrication of that electric device is disclosed. The electric device includes one or more electrical devices attached to a...
2017/0250144 Static Discharge System
A semiconductor circuit includes a three-terminal high voltage semiconductor device, a charge distribution structure and a static discharge system. The charge...
2017/0250143 INTEGRATED CIRCUIT DEVICE WITH OVERVOLTAGE DISCHARGE PROTECTION
An integrated circuit device includes a package and at least two leads exposed external to the package to permit electrical connections to the package. A first...
2017/0250142 Self-Destructive Circuits Under Radiation
Circuits which self-destruct under radiation are provided. In one aspect, a method for creating a radiation-sensitive circuit is provided. The method includes...
2017/0250141 WIRING CIRCUIT BOARD, SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING WIRING CIRCUIT BOARD, AND METHOD OF...
A wiring circuit board is provided which can dissipate some heat generated by the driving of a semiconductor element due to thermal conduction to help control...
2017/0250140 High Performance Compliant Substrate
A substrate structure is presented that can include a porous polyimide material and electrodes formed in the porous polyimide material. In some examples, a...
2017/0250139 Alignment Mark Design for Packages
A package includes a device die, a molding material molding the device die therein, a through-via penetrating through the molding material, and an alignment...
2017/0250138 SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME
An embodiment is a structure including a first die having an active surface with a first center point, a molding compound at least laterally encapsulating the...
2017/0250137 SEMICONDUCTOR DEVICE
According to one embodiment, there is provided a semiconductor device including a first wiring, a semiconductor chip, a first bonding member, having a first...
2017/0250136 SEMICONDUCTOR DEVICE
Provided is a semiconductor device in which a fuse element, which is cuttable by a laser, can be stably cut. The fuse element includes an upper fuse element, a...
2017/0250135 SEMICONDUCTOR DEVICE WITH PATTERNED GROUND SHIELDING
Semiconductor devices and methods of formation are provided herein. A semiconductor device includes a first inductor, a patterned ground shielding (PGS)...
2017/0250134 Methods for Microelectronics Fabrication and Packaging Using a Magnetic Polymer
A magnetic polymer for use in microelectronic fabrication includes a polymer matrix and a plurality of ferromagnetic particles disposed in the polymer matrix....
2017/0250133 Systems and Methods for Microelectronics Fabrication and Packaging Using a Magnetic Polymer
A magnetic polymer for use in microelectronic fabrication includes a polymer matrix and a plurality of ferromagnetic particles disposed in the polymer matrix....
2017/0250132 LOW STRESS VIAS
A component can include a substrate having a front surface and a rear surface remote therefrom, an opening extending from the rear surface towards the front...
2017/0250131 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
In one embodiment, a semiconductor device includes an insulator. The device further includes a plug provided in the insulator, the plug including a first...
2017/0250130 CONDUCTIVE TRACES IN SEMICONDUCTOR DEVICES AND METHODS OF FORMING SAME
A method includes forming a dielectric layer over a contact pad of a device, forming a first polymer layer over the dielectric layer, forming a first...
2017/0250129 Packaging Devices and Methods
A method of manufacturing a packaging device may include: forming a plurality of through-substrate vias (TSVs) in a substrate, wherein each of the plurality of...
2017/0250128 METHOD OF INTEGRATING CAPACITORS IN SEMICONDUCTOR DEVICES AND CORRESPONDING DEVICE
In an embodiment, a method of integrating capacitors in semiconductor devices includes: providing a lead-frame for a semiconductor device, the lead-frame...
2017/0250127 SEMICONDUCTOR PACKAGE HAVING MULTI-PHASE POWER INVERTER WITH INTERNAL TEMPERATURE SENSOR
According to an exemplary implementation, a semiconductor package includes a multi-phase power inverter having power switches and situated on a leadframe of...
2017/0250126 Semiconductor Device Having Compliant and Crack-Arresting Interconnect Structure
A power converter (300) has a first transistor chip (310) conductively stacked on top of a second transistor chip (320) attached to a substrate (301). A first...
2017/0250125 SEMICONDUCTOR DEVICE INCLUDING A CLIP
A semiconductor device includes a lead frame including a die paddle and a lead, a semiconductor chip, and a clip. The semiconductor chip has a first side and a...
2017/0250124 SEMICONDUCTOR DEVICE
A semiconductor device that includes a first die pad, an adhesive, and a second die pad fixed to the top surface of the first die pad via the adhesive. The...
2017/0250123 Method and Apparatus for Cooling Integrated Circuits
An apparatus having first, second, and third chambers and a plurality of receiving channels is disclosed. The first chamber includes a device surface to be...
2017/0250122 METHOD OF MANUFACTURING AN OBJECT WITH MICROCHANNELS PROVIDED THERETHROUGH
This invention relates to a method of manufacturing an object with microchannels provides therethrough, and more particularly, but not exclusively, to a method...
2017/0250121 SEMICONDUCTOR-ACCOMMODATING TRAY AND COVER THEREFOR
Provided are a semiconductor-accommodating tray and a cover therefor. The semiconductor-accommodating tray includes a heat-resistant base plate, a plurality of...
2017/0250120 HIGH FREQUENCY MODULE
A high frequency module improved in heat dissipation performance includes: a dielectric multilayer substrate including a ground layer and a high frequency...
2017/0250119 ELECTRONIC DEVICE COMPRISING AN ENCAPSULATING BLOCK LOCALLY OF SMALLER THICKNESS
An electronic device includes a carrier substrate with at least one electronic-circuit chip mounted on a front face of the carrier substrate. An encapsulation...
2017/0250118 ELECTRONIC DEVICE, ALTIMETER, ELECTRONIC APPARATUS, AND MOVING OBJECT
An electronic device includes a package including an opening, and a cavity communicating with the opening, a pressure sensor element disposed in the cavity,...
2017/0250116 SEMICONDUCTOR DEVICE HAVING DUAL CHANNELS, COMPLEMENTARY SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Provided is a semiconductor device having dual channels including a first portion and a second portion sharing a buried gate pillar. The buried gate pillar...
2017/0250115 Stacked Device and Associated Layout Structure
Stacked devices and circuits formed by stacked devices are described. In accordance with some embodiments, a semiconductor post extends vertically from a...
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