Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
2017/0250114 Method for Singulating Packaged Integrated Circuits and Resulting Structures
A method of packaging an integrated circuit includes forming a first integrated circuit and a second integrated circuit on a wafer, the first and second...
2017/0250113 METHOD OF LASER PROCESSING FOR SUBSTRATE CLEAVING OR DICING THROUGH FORMING "SPIKE-LIKE" SHAPED DAMAGE STRUCTURES
This invention provides an effective and a method of laser processing for separating semiconductor devices formed on a single substrate (6) or separating high...
2017/0250112 SEMICONDUCTOR DEVICE AND A METHOD FOR FORMING A SEMICONDUCTOR DEVICE
A method for forming a semiconductor device comprises forming an insulation trench structure comprising insulation material extending into the semiconductor...
2017/0250111 ELECTRONIC DEVICE INCLUDING MOAT POWER METALLIZATION IN TRENCH
An electronic device is provided. The electronic device includes a semiconductor layer, a dielectric layer disposed on the semiconductor layer, circuitry...
2017/0250110 Methods for Isolating Portions of a Loop of Pitch-Multiplied Material and Related Structures
Different portions of a continuous loop of semiconductor material are electrically isolated from one another. In some embodiments, the end of the loop is...
2017/0250109 COMBINED METHOD FOR PRODUCING SOLIDS, INVOLVING LASER TREATMENT AND TEMPERATUREINDUCED STRESSES TO GENERATE...
The present invention relates to a method for the production of at least one three-dimensional layer of solid material, in particular for usage as wafer,...
2017/0250108 SLIT STRESS MODULATION IN SEMICONDUCTOR SUBSTRATES
A disclosed example to modulate slit stress in a semiconductor substrate includes controlling a first process to apply a first material to a semiconductor...
2017/0250107 SEMICONDUCTOR DEVICE
An element isolation trench is formed in a substrate and is formed along each side of a polygon in a planar view. A first trench is formed in the substrate and...
2017/0250106 METHOD FOR FABRICATING A FIN FIELD EFFECT TRANSISTOR AND A SHALLOW TRENCH ISOLATION
A method for fabricating a shallow trench isolation (STI) structure comprises the following steps. A silane-base precursor having a volumetric flowrate of 500...
2017/0250105 SEMICONDUCTOR INTERCONNECT STRUCTURE AND MANUFACTURING METHOD THEREOF
The present disclosure provides an interconnect structure, including a low k dielectric layer with an air gap region and a non-air gap region. A first...
2017/0250104 VIA SELF ALIGNMENT AND SHORTING IMPROVEMENT WITH AIRGAP INTEGRATION CAPACITANCE BENEFIT
A method including forming a sacrificial material between metal lines of an integrated circuit structure; forming a mask on the sacrificial material; and after...
2017/0250103 FLUORO POLYMER CONTACT LAYER TO CARBON NANOTUBE CHUCK
Embodiments described herein generally relate to methods and apparatuses for manufacturing devices. An improved substrate support assembly having a fluoro...
2017/0250102 WAFER PROCESSING METHOD
In a wafer processing method, the back side of a wafer is attached to an adhesive tape supported at its peripheral portion by an annular frame having an inside...
2017/0250101 ELECTROSTATIC CHUCK OPTIMIZED FOR REFURBISHMENT
A method of manufacturing an electrostatic chuck includes bonding an electrostatic puck to a metal base plate, wherein the electrostatic puck has an electrode...
2017/0250100 ELECTROSTATIC CHUCK HAVING THERMALLY ISOLATED ZONES WITH MINIMAL CROSSTALK
A substrate support assembly includes a ceramic puck and a thermally conductive base having an upper surface that is bonded to a lower surface of the ceramic...
2017/0250099 FILM STRESS UNIFORMITY CONTROL BY RF COUPLING AND WAFER MOUNT WITH ADAPTED RF COUPLING
A fixture or clamp for a wafer in a vacuum treatment system has a non-conductive body with a first plane surface for arranging a substrate (wafer) thereon and...
2017/0250098 SEMICONDUCTOR PROCESSING DEVICE
A semiconductor processing device includes a first etching chamber, a second etching chamber, and an etching module. The etching module is adapted to...
2017/0250097 SUBSTRATE TREATMENT APPARATUS, SUBSTRATE TREATMENT METHOD, AND METHOD FOR MANUFACTURING SUBSTRATE
According to an embodiment, a substrate treatment apparatus includes, a substrate support unit supporting a substrate, a rotary unit rotating the substrate, a...
2017/0250096 APPARATUS AND METHOD FOR CLEANING SEMICONDUCTOR WAFER
An apparatus and method for cleaning semiconductor wafer are provided. The apparatus includes a brush module, a swing arm, a rotating actuator and an elevating...
2017/0250095 SUBSTRATE CLEANING APPARATUS AND SUBSTRATE PROCESSING FACILITY HAVING THE SAME
A substrate cleaning apparatus includes a porous suction part having a polygonal pillar shape with a plurality of cleaning surfaces, a transfer unit to...
2017/0250094 STICTION-FREE DRYING PROCESS WITH CONTAMINANT REMOVAL FOR HIGH-ASPECT RATIO SEMICONDUCTOR DEVICE STR
Embodiments of the invention generally relate to a method of cleaning a substrate and a substrate processing apparatus that is configured to perform the method...
2017/0250093 ELECTRICAL INTERCONNECT STRUCTURE FOR AN EMBEDDED ELECTRONICS PACKAGE
An electronics package includes a lower insulating layer, an upper insulating layer coupled to the lower insulating layer, and a conductive contact pad coupled...
2017/0250092 3DIC Package Comprising Perforated Foil Sheet
A structure includes a thermal interface material, and a Perforated Foil Sheet (PFS) including through-openings therein, with a first portion of the PFS...
2017/0250091 Packaging Method and Structure
A system and method for manufacturing a semiconductor device are provided. In an embodiment a first semiconductor device and a second semiconductor device are...
2017/0250090 Multi-Chip Structure and Method of Forming Same
A device includes a redistribution layer over a molding compound layer, a first chip over the fan-out structure, wherein the first chip comprise a plurality of...
2017/0250089 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
Semiconductor devices and manufacturing method of the same are disclosed. A semiconductor device includes a substrate, a p-type MOS transistor, an n-type MOS...
2017/0250088 FIN CUTTING PROCESS FOR MANUFACTURING FINFET SEMICONDUCTOR DEVICES
One illustrative method disclosed herein includes, among other things, forming an original fin-formation etch mask comprised of a plurality of original...
2017/0250087 ION BEAM ETCHING UTILIZING CRYOGENIC WAFER TEMPERATURES
The embodiments herein relate to methods and apparatus for etching features in semiconductor substrates. In a number of cases, the features may be etched while...
2017/0250086 SUBSTRATE PROCESSING METHOD AND RECORDING MEDIUM
A substrate processing method is for forming a metal film on a target substrate by using a plasma. The method includes loading a target substrate having a...
2017/0250085 SEMICONDUCTOR MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE
A semiconductor manufacturing method includes forming a first film on an upper surface of a substrate. The semiconductor manufacturing method includes forming...
2017/0250084 PHOSPHORUS OR ARSENIC ION IMPLANTATION UTILIZING ENHANCED SOURCE TECHNIQUES
Apparatus and method for use of solid dopant phosphorus and arsenic sources and higher order phosphorus or arsenic implant source material are described. In...
2017/0250083 QUASI-VERTICAL DIODE WITH INTEGRATED OHMIC CONTACT BASE AND RELATED METHOD THEREOF
A quasi-vertical Schottky diode architecture includes a topside anode contact that connects to external circuitry through an airbridge finger, a thin mesa of...
2017/0250082 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A silicon carbide semiconductor device includes a silicon carbide layer having a first main surface and a second main surface opposite to the first main...
2017/0250081 SEMICONDUCTOR STORAGE DEVICE
In a substrate processing method according to the embodiment, a first material is implanted into a surface of a target film to modify the surface of the target...
2017/0250080 COMPENSATING FOR LITHOGRAPHIC LIMITATIONS IN FABRICATING SEMICONDUCTOR INTERCONNECT STRUCTURES
A hard mask is formed into lines and bridges two adjacent lines using mandrels, spacers for the mandrels and a lithographic process for each bridge to create a...
2017/0250079 RESIST UNDERLAYER FILM-FORMING COMPOSITION
There is provided a composition that a resist pattern having a reduced LWR representing variations in line width of the resist pattern, compared to...
2017/0250078 METHOD FOR INTER-CHAMBER PROCESS
Embodiments described herein generally relate to a substrate processing system, such as an etch processing system. In one embodiment, a method of processing a...
2017/0250077 OXIDE AND MANUFACTURING METHOD THEREOF
Provided is an oxide with a novel crystal structure, an oxide with high crystallinity, or an oxide with low impurity concentration. An oxide has a hexagonal...
2017/0250076 Thin Film Transistor and Manufacturing Method Thereof, Array Substrate and Manufacturing Method Thereof,...
The present invention provides a thin film transistor and a manufacturing method thereof, an array substrate comprising the thin film transistor and a...
2017/0250075 Method of Producing Transition Metal Dichalcogenide Layer
Method of producing one or more transition metal dichalcogenide (MX.sub.2) layers on a substrate, comprising the steps of: obtaining a substrate having a...
2017/0250074 DOUBLE ASPECT RATIO TRAPPING
A semiconductor structure is provided by a process in which two aspect ratio trapping processes are employed. The structure includes a semiconductor substrate...
2017/0250073 TRENCH METAL INSULATOR METAL CAPACITOR WITH OXYGEN GETTERING LAYER
A method including forming an oxygen gettering layer on one side of an insulating layer of a deep trench capacitor between the insulating layer and a...
2017/0250072 FILM FORMING METHOD AND FILM FORMING SYSTEM
A film forming method of depositing a thin film of a reaction product generated by a reaction between a raw material gas and a reactive gas on a substrate by...
2017/0250071 PATTERN FORMATION METHOD
According to one embodiment, a pattern formation method includes forming a base structure including first and second guide portions each including a pinning...
2017/0250070 FORMATION OF HETEROEPITAXIAL LAYERS WITH RAPID THERMAL PROCESSING TO REMOVE LATTICE DISLOCATIONS
Method and devices are disclosed for device manufacture of gallium nitride devices by growing a gallium nitride layer on a silicon substrate using Atomic Layer...
2017/0250069 DUST COLLECTING APPARATUS, SUBSTRATE PROCESSING SYSTEM, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
In one embodiment, a dust collecting apparatus includes a container configured to contain a fluid that includes particles to be collected. The apparatus...
2017/0250068 METHOD FOR FORMING SILICON NITRIDE FILM SELECTIVELY ON SIDEWALLS OR FLAT SURFACES OF TRENCHES
A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si--N bond on an upper surface, and a...
2017/0250067 INCANDESCENT LAMP
An incandescent lamp is provided which prevents disconnection of a coupling part between a filament and a lead wire and also which improves impact resistance....
2017/0250066 LIGHT SOURCE DEVICE
In a light source device, a control unit causes an energy density of a laser light in a lighting start region RS when a laser support light is maintained to be...
2017/0250065 Grouping Amplitudes of TOF Extractions to Detect Convolution Due to Resolution Saturation
Sample molecules are ionized producing a beam of ions using an ion source. A plurality of ion extractions are performed on the beam of ions using a TOF mass...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.