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Patent # Description
2017/0256523 METHOD AND APPARATUS FOR TRANSFER OF SEMICONDUCTOR DEVICES
A system to transfer an unpackaged die directly from a die holding substrate to a transfer location on a secondary substrate. The system includes a die...
2017/0256522 MICRO-PRINTED DISPLAY
A micro-printed display includes a display substrate. An array of row conductors, an array of column conductors, and a plurality of micro-pixels are disposed...
2017/0256521 MICRO-TRANSFER PRINTABLE ELECTRONIC COMPONENT
A micro-transfer printable electronic component includes one or more electronic components, such as integrated circuits or LEDs. Each electronic component has...
2017/0256520 PACKAGE SUBSTRATE AND LIGHT EMITTING DEVICE PACKAGE
Provided are a package substrate and a light emitting device package. The package substrate may include a base substrate having a plurality of mounting regions...
2017/0256519 STUB MINIMIZATION FOR WIREBOND ASSEMBLIES WITHOUT WINDOWS
A microelectronic assembly (300) or system (1500) includes at least one microelectronic package (100) having a microelectronic element (130) mounted face up...
2017/0256518 FLEXIBLE WINDOW CLAMP
A window clamp includes a center portion, side portions, and flexible members. The side portions are arranged on opposing sides of the center portion. The...
2017/0256517 SILVER BONDING WIRE AND METHOD OF MANUFACTURING THE SAME
A bonding wire and a method of manufacturing the bonding wire are provided. The bonding wire contains 90.0 to 99.0 wt % of silver (Ag); 0.2 to 2.0 wt % of gold...
2017/0256516 Systems of Bonded Substrates and Methods for Bonding Substrates with Bonding Layers
A system of bonded substrates may include a first substrate, a second substrate, and a bonding layer. The first substrate may include a bonding surface,...
2017/0256515 SEMICONDUCTOR DEVICE INCLUDING ANTISTATIC DIE ATTACH MATERIAL
A semiconductor device includes a substrate, a semiconductor die, and an antistatic die attach material between the substrate and the semiconductor die. The...
2017/0256514 OPTICAL ELECTRONIC DEVICE AND METHOD OF FABRICATION
Electronic devices are collectively fabricated from a main wafer which includes optical elements and a secondary wafer that are mounted one on top of the other...
2017/0256513 SEMICONDUCTOR DEVICE HAVING A BOUNDARY STRUCTURE, A PACKAGE ON PACKAGE STRUCTURE, AND A METHOD OF MAKING
The present disclosure relates to a semiconductor device. In some embodiments, the semiconductor device has a first plurality of conductive pads arranged over...
2017/0256512 Methods and Apparatus of Packaging Semiconductor Devices
Methods and apparatuses for wafer level packaging (WLP) semiconductor devices are disclosed. A redistribution layer (RDL) is formed on a first passivation...
2017/0256511 SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THE SAME
Provided are a semiconductor package and a method of manufacturing the same. The semiconductor package comprises a substrate, a semiconductor chip on the...
2017/0256510 SEMICONDUCTOR DEVICE
Electrode pads disposed on a first surface of a semiconductor element include a first pad located close to a corner and a second pad located apart from the...
2017/0256509 Method of Manufacturing Molded Semiconductor Packages Having an Optical Inspection Feature
A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main...
2017/0256508 SEMICONDUCTOR CHIP, SEMICONDUCTOR DEVICE AND MANUFACTURING PROCESS FOR MANUFACTURING THE SAME
A semiconductor device includes a substrate main body, a plurality of first bump pads, and redistribution layer (RDL). The first bump pads are disposed...
2017/0256507 SIGNAL TRANSMISSION DEVICE USING ELECTROMAGNETIC RESONANCE COUPLER
A signal transmission device comprises: a first lead frame having a first major surface and a second major surface opposite to the first major surface; a...
2017/0256506 SEMICONDUCTOR DEVICE
A semiconductor device is a semiconductor device in which one chip region is formed through divided exposure. An interlayer insulating film has a via and an...
2017/0256505 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
A semiconductor device includes: a substrate; a first wiring layer arranged above the substrate; a first insulating film covering the first wiring layer; a...
2017/0256504 SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes a semiconductor substrate including an element region, a guard ring provided on an outer periphery...
2017/0256503 SEMICONDUCTOR DEVICE
A semiconductor device includes; a semiconductor substrate including a major surface; a first diffusion region in the major surface in a main cell region; a...
2017/0256502 Wafer Level Shielding in Multi-Stacked Fan Out Packages and Methods of Forming Same
An embodiment device package includes a device die, a molding compound surrounding the device die, a conductive through inter-via (TIV) extending through the...
2017/0256501 METHODS OF FORMING SEMICONDUCTOR DEVICES INCLUDING DETERMINING MISREGISTRATION BETWEEN SEMICONDUCTOR LEVELS AND...
A method of determining a lateral misregistration between levels of a semiconductor structure comprises imaging at least one first alignment mark in a first...
2017/0256500 HYBRID WAFER DICING APPROACH USING A SPLIT BEAM LASER SCRIBING PROCESS AND PLASMA ETCH PROCESS
Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor...
2017/0256499 GRAPHENE WIRING STRUCTURE AND METHOD FOR MANUFACTURING GRAPHENE WIRING STRUCTURE
A graphene wiring structure of an embodiment has a multilayered graphene having a plurality of planar graphene sheets laminated, and a first interlayer...
2017/0256498 SELF-FORMING BARRIER FOR SUBTRACTIVE COPPER
A method of forming electrically conductive structures that includes forming a copper containing layer including a barrier forming element, and applying a...
2017/0256497 ELECTRONIC COMPONENT BUILT-IN SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
An electronic component built-in substrate includes a first core layer having opening, a second core layer formed on the first core layer, a third core layer...
2017/0256496 CHIP PACKAGE AND METHOD FOR FORMING THE SAME
A chip package including a substrate is provided. A sensing region or device region of the substrate is electrically connected to a conducting pad. A first...
2017/0256495 HYBRID METAL INTERCONNECTS WITH A BAMBOO GRAIN MICROSTRUCTURE
A method of forming an interconnect with a bamboo grain microstructure. The method includes forming a conductive filler layer in a trench of an insulating...
2017/0256494 HYBRID METAL INTERCONNECTS WITH A BAMBOO GRAIN MICROSTRUCTURE
A method of forming an interconnect with a bamboo grain microstructure. The method includes forming a conductive filler layer in a trench of an insulating...
2017/0256493 E-FUSE STRUCTURE OF SEMICONDUCTOR DEVICE
Provided is an e-fuse structure of a semiconductor device having improved fusing performance so as to enable a program operation at a low voltage. The e-fuse...
2017/0256492 ULTRA HIGH PERFORMANCE INTERPOSER
An interconnection component includes a semiconductor material layer having a first surface and a second surface opposite the first surface and spaced apart in...
2017/0256491 SEMICONDUCTOR STRUCTURE AND METHOD MAKING THE SAME
The present disclosure provides a method for forming an integrated circuit (IC) structure. The method comprises providing a substrate including a conductive...
2017/0256490 LOW CAPACITANCE THROUGH SUBSTRATE VIA STRUCTURES
Apparatuses and methods are disclosed herein for the formation of low capacitance through substrate via structures. An example apparatus includes an opening...
2017/0256489 SOC WITH INTEGRATED VOLTAGE REGULATOR USING PREFORMED MIM CAPACITOR WAFER
In some embodiments, a method and/or a system may include an integrated circuit. The integrated circuit may include a semiconductor die. The integrated circuit...
2017/0256488 TWO STEP METALLIZATION FORMATION
An integrated circuit structure includes a first conductive line, a dielectric layer over the first conductive line, a diffusion barrier layer in the...
2017/0256487 Semiconductor Devices, Multi-Die Packages, and Methods of Manufacture Thereof
Semiconductor device, multi-die packages, and methods of manufacture thereof are described. In an embodiment, a semiconductor device may include: first...
2017/0256486 METHOD AND APPARATUS FOR FORMING SELF-ALIGNED VIA WITH SELECTIVELY DEPOSITED ETCHING STOP LAYER
A first conductive element is disposed. in a first dielectric layer. An etching stop layer is disposed on the first dielectric layer but not on the first...
2017/0256485 INTEGRATED CIRCUIT DEVICE AND METHOD FOR MANUFACTURING SAME
An integrated circuit device includes a first insulating film, a second insulating film provided on the first insulating film, and having a composition...
2017/0256484 MIDDLE-END-OF-LINE STRAP FOR STANDARD CELL
A semiconductor structure is disclosed that includes a semiconductor structure includes an active area, a first conductive line, a conductive via, a first...
2017/0256483 SEMICONDUCTOR DEVICE
A semiconductor device includes a first conductive layer with first and second sections separated in a first direction. A first chip is on the first section...
2017/0256482 WIRING BOARD, AND SEMICONDUCTOR DEVICE
A wiring board includes: a first wiring structure including: a first insulating layer; a first wiring layer; and a via wiring; a protective insulating layer...
2017/0256481 ELECTRONIC PACKAGE AND SEMICONDUCTOR SUBSTRATE
A semiconductor substrate is provided, including a substrate body having a lateral surface, and a protruding structure extending outward from the lateral...
2017/0256480 ELECTRONIC COMPONENTS HAVING THREE-DIMENSIONAL CAPACITORS IN A METALLIZATION STACK
Disclosed herein are electronic components having three-dimensional capacitors disposed in a metallization stack, as well as related methods and devices. In...
2017/0256479 PACKAGE STRUCTURE
A package structure including a substrate, a first lead frame, a first metal layer, at least one chip, a base and a second metal layer is provided. The base...
2017/0256478 WIRING SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
A wiring substrate includes insulating layers including a first insulating layer and an outermost insulating layer such that the first insulating layer is...
2017/0256477 Barrier Structures Between External Electrical Connectors
A structure includes a die substrate; a passivation layer on the die substrate; first and second interconnect structures on the passivation layer; and a...
2017/0256476 SEMICONDUCTOR DEVICES HAVING THROUGH ELECTRODES AND METHODS FOR FABRICATING THE SAME
The semiconductor device includes a substrate including an integrated circuit and a contact that are electrically connected to each other, an insulation layer...
2017/0256475 SYSTEMS AND METHODS FOR SPRING-BASED DEVICE ATTACHMENT
Apparatuses for coupling a semiconductor device to a cooling system, methods of coupling a semiconductor device to a cooling system, and systems incorporating...
2017/0256474 MODULE
A module 1a includes an electronic component 3a, and also includes a wiring substrate 2 on one principal surface of which the electronic component 3a is...
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