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Patent # | Description |
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2017/0301733 |
Memory Arrays Some embodiments include memory arrays. The memory arrays can have global bitlines extending along a first horizontal direction, vertical local bitlines... |
2017/0301732 |
DUAL OTS MEMORY CELL SELECTION MEANS AND METHOD A 3D cross-point memory array includes a bitline and a word line. Both the bitline and the word line have multiple selector switches. Each switch of a... |
2017/0301731 |
METHOD FOR PRODUCING SEMICONDUCTOR DEVICE A method for producing a memory device and semiconductor device includes forming pillar-shaped phase change layers and lower electrodes in two or more rows and... |
2017/0301730 |
MEMORY CELL STRUCTURES A memory cell includes a first diode, a second diode, and a random access memory cell element. The first diode and the random access memory cell element are... |
2017/0301729 |
NANO-IMPRINTED SELF-ALIGNED MULTI-LEVEL PROCESSING METHOD The present disclosure generally relates to fine geometry electrical circuits and methods of manufacture thereof. More specifically, methods for forming 3D... |
2017/0301728 |
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME The present disclosure provides a semiconductor structure and a method for manufacturing the same. The semiconductor structure includes a bottom electrode via... |
2017/0301727 |
SPIN-ORBIT TORQUE MAGNETIC RANDOM ACCESS MEMORY A spin-orbit torque magnetic random access memory includes a substrate, and an SOT memory cell disposed on the substrate and including a magnetic free layer... |
2017/0301726 |
HALL SENSOR WITH BURIED HALL PLATE A CMOS integrated circuit includes a Hall sensor having a Hall plate formed in a first isolation layer which is formed concurrently with a second isolation... |
2017/0301725 |
SEMICONDUCTOR LIGHT EMITTING DEVICE A semiconductor light emitting device includes first and second light emitting bodies, a first electrode, a second electrode and a first interconnection. The... |
2017/0301724 |
DISPLAY APPARATUS A display apparatus includes at least one substrate with several penetration holes, several displaying units and several switch devices disposed at different... |
2017/0301723 |
MANUFACTURING OF AN IMAGER DEVICE AND IMAGER DEVICE Embodiments related to the manufacturing of an imager device and an imager device are disclosed. Embodiments associated with methods of an imager device are... |
2017/0301722 |
BACKSIDE INCIDENCE TYPE SOLID-STATE IMAGE PICKUP DEVICE A back-illuminated solid-state imaging device includes a semiconductor substrate, a shift register, and a light-shielding film. The semiconductor substrate... |
2017/0301721 |
METHOD OF MANUFACTURING AN IMAGER AND IMAGER DEVICE Embodiments related to a method of manufacturing of an imager and an imager device are shown and depicted. |
2017/0301720 |
CMOS IMAGE SENSOR STRUCTURE WITH IR/NIR INTEGRATION A semiconductor device includes a substrate, light sensing devices, at least one infrared radiation sensing device, a transparent insulating layer, an infrared... |
2017/0301719 |
IMAGING DEVICE AND METHOD OF MANUFACTURING IMAGING DEVICE An imaging device includes a plurality of pixels. Each of the pixels includes a photoelectric conversion unit provided in a first semiconductor region of a... |
2017/0301718 |
FULL-PDAF (PHASE DETECTION AUTOFOCUS) CMOS IMAGE SENSOR STRUCTURES The present disclosure relates to an image sensor having autofocus function and associated methods. In some embodiments, the image sensor has first and second... |
2017/0301717 |
SEMICONDUCTOR INTEGRATED CIRCUIT, ELECTRONIC DEVICE, SOLID-STATE IMAGING
APPARATUS, AND IMAGING APPARATUS A semiconductor integrated circuit includes a first semiconductor substrate in which a part of an analog circuit is formed between the analog circuit and a... |
2017/0301716 |
ACTIVE AREA SELECTION FOR LIDAR RECEIVERS Techniques provided herein are directed toward providing an optical sensor that reduces noise from sources of light other than the LIDAR transmitter by... |
2017/0301715 |
PAD STRUCTURE FOR BACKSIDE ILLUMINATED (BSI) IMAGE SENSORS A pad structure with a contact via array for high bond structure is provided. In some embodiments, a semiconductor substrate comprises a pad opening. An... |
2017/0301714 |
SOLID-STATE IMAGING DEVICE AND METHOD OF MANUFACTURING THE SAME, AND
IMAGING APPARATUS A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that ... |
2017/0301713 |
SOLID STATE IMAGING DEVICE AND MANUFACTURING METHOD THEREFOR A solid state imaging device for a wafer-level pinhole camera module is provided by using a mask transfer technique to form, with a high degree of precision,... |
2017/0301712 |
IMAGE SENSOR INCLUDING PLANAR BOUNDARY BETWEEN OPTICAL BLACK AND ACTIVE
PIXEL SENSOR AREAS An image sensor includes a substrate including a sensor array area, a pad area, and a circuit area, a wiring layer on the pad area, and a light-shielding... |
2017/0301711 |
IMAGING APPARATUS An imaging apparatus includes a substrate including an imaging element, one or two attachment portions that attach the substrate by screwing and are capable of... |
2017/0301709 |
DEEP TRENCH ISOLATION FABRICATION FOR BSI IMAGE SENSOR The present disclosure relates to an integrated circuit, and an associated method of formation. In some embodiments, the integrated circuit comprises a deep... |
2017/0301708 |
MAJORITY CURRENT ASSISTED RADIATION DETECTOR DEVICE The invention relates to a majority current assisted detector device, comprising a semiconductor layer of a first conductivity type epitaxially grown on a... |
2017/0301707 |
DISPLAY SUBSTRATE ASSEMBLY AND METHOD OF MANUFACTURING THE SAME, AND
DISPLAY APPARATUS The present disclosure provides a display substrate assembly including a first substrate and a second substrate opposite to each other, the first substrate... |
2017/0301706 |
METHOD OF MANUFACTURING DISPLAY PANEL SUBSTRATE A method of manufacturing a display panel substrate having a semiconductor element includes a film forming step of forming a thin film, a resist film forming... |
2017/0301705 |
LTPS PIXEL UNIT AND MANUFACTURING METHOD FOR THE SAME An LTPS pixel unit and a manufacturing method. The method includes following steps: forming a buffering layer on the substrate; forming a semiconductor pattern... |
2017/0301704 |
THIN-FILM TRANSISTOR DEVICE A thin-film transistor (TFT) device may include a data line and a gate line formed on a base substrate, a TFT connected to the data line and the gate line, and... |
2017/0301703 |
ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE An array substrate, a manufacturing method therefor, and a display device are provided. The array substrate comprises multiple pixel units, where at least one... |
2017/0301702 |
DISPLAY DEVICE Deterioration of image quality in a display device due to kickback voltages may be reduced or prevented by varying parasite capacitance, the size of the... |
2017/0301701 |
ACTIVE DEVICE An active device includes a poly-silicon semiconductor layer, a first insulating layer, a gate electrode, a second insulating layer, a first through hole, an... |
2017/0301700 |
METHOD FOR PRODUCING TFT ARRAY SUBSTRATE, TFT ARRAY SUBSTRATE, AND DISPLAY
APPARATUS The present disclosure provides a method for producing a TFT array substrate, a TFT array substrate, and a display apparatus, and relates to a technical field... |
2017/0301699 |
SEMICONDUCTOR DEVICE AND DISPLAY DEVICE INCLUDING THE SEMICONDUCTOR DEVICE To improve field-effect mobility and reliability of a transistor including an oxide semiconductor film. A semiconductor device includes an oxide semiconductor... |
2017/0301698 |
METHOD OF PROVIDING AN IMAGING SYSTEM AND IMAGING SYSTEM THEREOF Some embodiments include a method. The method can include providing a scintillator structure. Providing the scintillator structure can include providing a... |
2017/0301697 |
SILICON GERMANIUM FINS ON INSULATOR FORMED BY LATERAL RECRYSTALLIZATION Relaxed silicon germanium fins are formed on a bulk silicon substrate through the lateral recrystallization of molten silicon germanium having high germanium... |
2017/0301696 |
Array Substrate, Display Panel and Display Apparatus The present disclosure provides an array substrate, a display panel and a display apparatus. The array substrate includes gate lines and data lines defining a... |
2017/0301695 |
DISPLAY PANEL AND A METHOD OF MANUFACTURING THE SAME A display panel includes a substrate including a display area, a peripheral area and a buffer area disposed between the display area and the peripheral area.... |
2017/0301694 |
SEMICONDUCTOR DEVICE WITH SILICON LAYER CONTAINING CARBON A semiconductor device having an n channel MISFET formed on an SOI substrate including a support substrate, an insulating layer formed on the support substrate... |
2017/0301693 |
RF ELECTRONIC CIRCUIT COMPRISING CAVITIES BURIED UNDER RF ELECTRONIC
COMPONENTS OF THE CIRCUIT RF electronic circuit comprising at least: a substrate comprising at least one support layer and a semiconducting surface layer located on the support layer;... |
2017/0301692 |
TRANSISTOR WITH CONTROLLED OVERLAP OF ACCESS REGIONS A method for producing a microelectronic device with one or more transistor(s) including forming a first gate on a region of a semiconductor layer, forming a... |
2017/0301691 |
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME According to one embodiment, a method for manufacturing a semiconductor memory device includes forming a stacked body by alternately stacking an insulating... |
2017/0301690 |
NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a... |
2017/0301689 |
THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING
THE SAME A semiconductor memory device includes a stack including gate electrodes sequentially stacked on a substrate, a vertical insulating structure penetrating the... |
2017/0301688 |
NONVOLATILE MEMORY DEVICES AND METHODS OF FORMING SAME A vertical NAND-type memory device includes a vertical stack of inter-gate insulating layers and gate electrodes arranged in an alternating sequence on an... |
2017/0301687 |
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME According to one embodiment, columnar portions extend through an insulating layer and through a stacked body under the insulating layer. The columnar portions... |
2017/0301686 |
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME According to one embodiment, the stacked body includes a plurality of electrode layers stacked with an insulator interposed. The electrode layers have a... |
2017/0301685 |
Integrated Structures Including Material Containing Silicon, Nitrogen, and
at Least One of Carbon, Oxygen,... Some embodiments include an integrated structure having vertically-stacked conductive levels alternating with dielectric levels. A layer over the conductive... |
2017/0301684 |
SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR DEVICE A semiconductor memory device includes: a substrate including a cell region and a connection region; a first word line stack comprising a plurality of first... |
2017/0301683 |
SEMICONDUCTOR DEVICE WITH SPLIT GATE FLASH MEMORY CELL STRUCTURE AND
METHOD OF MANUFACTURING THE SAME A semiconductor device with split gate flash memory cell structure includes a substrate having a first area and a second area, at least a first cell formed in... |