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Patent # Description
2018/0004704 INTERFACE APPARATUS AND METHOD
An interface comprises routing circuitry configured to receive data items from a data source device and to route the received data items to a data sink device...
2018/0004699 Method, Apparatus And System For Dynamic Optimization Of Signal Integrity On A Bus
In one embodiment, a host controller is to couple to an interconnect to which a plurality of devices may be coupled. The host controller may include: a first...
2018/0004692 DIRECT MEMORY ACCESS (DMA) UNIT WITH ADDRESS ALIGNMENT
Systems and methods for operating a DMA unit with address alignment are disclosed. These may include configuring a bandwidth control setting for a read job...
2018/0004690 EFFICIENT CONTEXT BASED INPUT/OUTPUT (I/O) CLASSIFICATION
Technology for an apparatus is described. The apparatus can include a memory controller with circuitry configured to define a caching and processing priority...
2018/0004688 LOAD REDUCED NONVOLATILE MEMORY INTERFACE
A storage circuit includes a buffer coupled between the storage controller and the nonvolatile memory devices. The circuit includes one or more groups of...
2018/0004687 REMOTE MEMORY OPERATIONS
An extension of node architecture and proxy requests enables a node to expose memory computation capability to remote nodes. A remote node can request...
2018/0004686 METHOD AND APPARATUS OF REAL-TIME RETIMER DELAY MEASUREMENT
Described is an apparatus comprising a first circuitry, a second circuitry, a third circuitry, and a fourth circuitry. The first circuitry may be an elastic...
2018/0004683 PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO SUPPORT LIVE MIGRATION OF PROTECTED CONTAINERS
A processor includes a decode unit to decode an instruction that is to indicate a page of a protected container memory, and a storage location outside of the...
2018/0004677 MEMORY SYSTEM AND METHOD FOR OPERATING THE SAME
A memory system includes a memory device including a memory block, the memory block including a plurality of memory cell groups, an address translator that...
2018/0004670 PREFETCH BANDWIDTH THROTTLING BY DYNAMICALLY ADJUSTING MISS BUFFER PREFETCH-DROPPING THRESHOLDS
The disclosed embodiments relate to a method for controlling prefetching in a processor to prevent over-saturation of interfaces in the memory hierarchy of the...
2018/0004669 CACHE DEVICE AND METHOD FOR STORING TAG DATA AND CACHE DATA IN CACHE DEVICE
A cache device of an embodiment includes a tag/data memory. The tag/data memory includes a storage area capable of storing a plurality of pieces of tag data...
2018/0004667 FUNCTIONAL CACHING IN ERASURE CODED STORAGE
Encoding a file into a plurality of chunks, wherein a subset of the plurality of chunks may be used to create a functional equivalent of the file. At least one...
2018/0004664 COMPUTER SYSTEM INCLUDING SYNCHRONOUS INPUT/OUTPUT AND HARDWARE ASSISTED PURGE OF ADDRESS TRANSLATION CACHE...
A synchronous input/output (I/O) computing system includes a processor and a memory unit that stores program instructions. The system purges one or more...
2018/0004658 METHOD AND SYSTEM FOR VALID MEMORY MODULE CONFIGURATION AND VERIFICATION
Aspects of the present disclosure involve a system and method for verifying and validating accurate memory module placement on a printed circuit board. In one...
2018/0004657 DATA STORAGE IN A MOBILE DEVICE WITH EMBEDDED MASS STORAGE DEVICE
A mobile device (100) includes a processing device (140), a random access memory, RAM, (150) and an embedded mass storage device (160). A first interface (IF1)...
2018/0004653 DATA STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF
A method of operating a data storage device includes programming non-fully programmed memory blocks at a point in time when a reference time elapses from a...
2018/0004649 Techniques to Format a Persistent Memory File
Examples may include techniques to format a persistent memory file. Memory representations of data structures maintained in virtual addresses of a process...
2018/0004648 DEFECT REPORTING IN APPLICATION TESTING
The present subject matter relates to defect reporting in application testing. In an implementation, a category of application testing is determined based on a...
2018/0004646 Computing Device and Method for Performing Test of Rehosting
Disclosed is a method for performing a test of rehosting performed by a computing device including one or more processors and a memory storing commands...
2018/0004642 USING TEST WORKLOAD RUN FACTS AND PROBLEM DISCOVERY DATA AS INPUT FOR BUSINESS ANALYTICS TO DETERMINE TEST...
Aspects of the present invention include a method, system and computer program product for utilizing various data to determine the effectiveness of a software...
2018/0004638 RUN TIME WORKLOAD THRESHOLD ALERTS FOR CUSTOMER PROFILING VISUALIZATION
A method obtains from a database historical data values for each of a plurality of workload data points relating to a prior workload run; determines a...
2018/0004635 INPUT DISCOVERY FOR UNKNOWN PROGRAM BINARIES
A method to discover an input sequence for an unknown binary program is provided. The method may include obtaining a first input sequence for an unknown binary...
2018/0004634 Z/OS SMF/RMF WORKLOAD DATA PLAYBACK WITH WEB DASHBOARD VISUALIZATION
Aspects of the present invention include a method, system and computer program product for comparing data from prior and current software workload runs and for...
2018/0004629 RUN TIME SMF/RMF STATISTICAL FORMULA METHODOLOGY FOR GENERATING ENHANCED WORKLOAD DATA POINTS FOR CUSTOMER...
Aspects of the present invention include a method, system and computer program product for generating new or additional workload data points in accordance with...
2018/0004628 COOPERATIVE TRIGGERING
There is disclosed in an example a processor, having: a front end including circuitry to decode instructions from an instruction stream; a data cache unit...
2018/0004627 SEQUENTIAL MONITORING AND MANAGEMENT OF CODE SEGMENTS FOR RUN-TIME PARALLELIZATION
A processor includes an instruction pipeline and control circuitry. The instruction pipeline is configured to process instructions of program code. The control...
2018/0004623 MULTI-DIMENSIONAL SELECTIVE TRACING
Techniques are described herein for performing multi-dimensional selective tracing within a computer system. In one or more embodiments, the tracing profile...
2018/0004619 METHOD AND DEVICE FOR DATA CENTER MANAGEMENT
Embodiments of the present disclosure provide a method and device for data center management. For example, there is provided a method, comprising: obtaining...
2018/0004618 PROCESSING METHOD, COMMUNICATION SYSTEM, AND RECORDING MEDIUM
A processing method executed by a processor included in a first communication device, the method includes outputting, from a first communication interface of...
2018/0004617 MANAGING SETS OF TRANSACTIONS FOR REPLICATION
Methods and systems for managing sets of transactions for replication are provided. A system includes a number of origination nodes forming a source array. A...
2018/0004612 APPLICATION AWARE INPUT/OUTPUT FENCING
Disclosed herein are methods, systems, and processes to perform application aware input/output (I/O) fencing operations. Performing such an application aware...
2018/0004611 FAILURE MONITORING IN DISTRIBUTED COMPUTING SYSTEMS
Arbitration techniques in distributed computing systems are disclosed herein. In one embodiment, a method includes receiving an arbitration request from a...
2018/0004606 DATA BACKUP USING METADATA MAPPING
An information processing apparatus, backup method, and program product that enable efficient differential backup. In one embodiment, an information processing...
2018/0004605 SYSTEM, METHOD AND RECORDING MEDIUM FOR ANTIFRAGILE COMPUTING PROBLEM MANAGEMENT
A computing problem management method, system, and non-transitory computer readable medium, include detecting an impending problem of a computing system,...
2018/0004602 METHOD OF CORRECTING ERRORS IN A MEMORY ARRAY AND A SYSTEM FOR IMPLEMENTING THE SAME
A method of correcting errors in a memory array. The method includes configuring a first memory array with a first error correction code (ECC) to provide error...
2018/0004599 Methods for Error Correction with Resistive Change Element Arrays
Error correction methods for arrays of resistive change elements are disclosed. An array of resistive change elements is organized into a plurality of...
2018/0004598 LINKED-LIST INTERLINEATION OF DATA
In one embodiment, linked-list interlineation of data in accordance with the present description includes inserting a subsequent set of data in a linked-list...
2018/0004597 Low-Overhead Mechanism to Detect Address Faults in ECC-Protected Memories
Embodiments are generally directed to a low-overhead mechanism to detect address faults in ECC-protected memories. An embodiment of an apparatus includes a...
2018/0004596 ERROR CORRECTION CODE EVENT DETECTION
Methods, systems, and devices for operating a memory cell or cells are described. An error in stored data may be detected by an error correction code (ECC)...
2018/0004595 READ FROM MEMORY INSTRUCTIONS, PROCESSORS, METHODS, AND SYSTEMS, THAT DO NOT TAKE EXCEPTION ON DEFECTIVE DATA
A processor of an aspect includes a decode unit to decode a read from memory instruction. The read from memory instruction is to indicate a source memory...
2018/0004591 HANDLING MEMORY ERRORS IN MEMORY MODULES THAT INCLUDE VOLATILE AND NON-VOLATILE COMPONENTS
In one example in accordance with the present disclosure, a system for handling memory errors includes a memory module having volatile components and...
2018/0004587 INFORMATION PROCESSING DEVICE, EXTERNAL STORAGE DEVICE, HOST DEVICE, RELAY DEVICE, CONTROL PROGRAM, AND CONTROL...
According to the embodiments, an external storage device switches to an interface controller for supporting only a read operation of nonvolatile memory when a...
2018/0004585 Application Programming Interface (API) Hub
Embodiments are directed to a system for controlling access to remote services, comprising an application programming interface (API) hub configured to provide...
2018/0004584 Method and Processes For Securely Autofilling Data Fields in A Software Application
The present invention gives the methods and processes for automatically servicing user driven requests to find place-holder fields, fill them in with relevant...
2018/0004583 PROTEINS, POOLS, AND SLAWX IN PROCESSING ENVIRONMENTS
Embodiments described herein include mechanisms for encapsulating data that needs to be shared between or across processes. These mechanisms include slawx...
2018/0004581 Multi-Purpose Events for Notification and Sequence Control in Multi-core Processor Systems
Techniques are provided for improving the performance of a constellation of coprocessors by hardware support for asynchronous events. In an embodiment, a...
2018/0004575 ADJUSTING VARIABLE LIMIT ON CONCURRENT CODE EXECUTIONS
Systems and methods are described for adjusting a number of concurrent code executions allowed to be performed for a given user on an on-demand code execution...
2018/0004574 Averting Lock Contention Associated with Core-Based Hardware Threading in a Split Core Environment
Techniques are disclosed for managing lock contention in a multithreaded processing system. In one embodiment, a method includes tracking an amount of time...
2018/0004571 Averting Lock Contention Associated with Core-Based Hardware Threading in a Split Core Environment
Techniques are disclosed for managing lock contention in a multithreaded processing system. In one embodiment, a method includes tracking a current total...
2018/0004567 METHODS AND APPARATUS TO SELECT VIRTUALIZATION ENVIRONMENTS DURING DEPLOYMENT
Methods and apparatus to select virtualization environments are disclosed. An example apparatus includes a logic circuit, a workload analyzer to determine...
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