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Patent # Description
2018/0069154 Contact Configuration for Optoelectronic Device
An optoelectronic device with a multi-layer contact is described. The optoelectronic device can include an n-type semiconductor layer having a surface. A mesa...
2018/0069153 NITRIDE SEMICONDUCTOR LIGHT-EMITTING DEVICE, AND METHOD FOR MANUFACTURING SAME
A nitride semiconductor light-emitting device and a method for manufacturing same for improving the electrostatic discharge (ESD) characteristics of the...
2018/0069152 LIGHT EMITTING DIODE
Disclosed is a light emitting diode using light of a short wavelength band. The light emitting diode includes a first conductivity type semiconductor layer...
2018/0069151 Deep Ultraviolet Light Emitting Diode
A method of fabricating a light emitting diode, which includes an n-type contact layer and a light generating structure adjacent to the n-type contact layer,...
2018/0069150 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE PACKAGE INCLUDING THE SAME
A semiconductor device includes a semiconductor structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an...
2018/0069149 TRANSFERRING METHOD, MANUFACTURING METHOD, DEVICE AND ELECTRONIC APPARATUS OF MICRO-LED
The present invention discloses a transferring method, a manufacturing method, a device and an electronics apparatus of micro-LED. The method for transferring...
2018/0069148 REPAIRING METHOD, MANUFACTURING METHOD, DEVICE AND ELECTRONICS APPARATUS OF MICRO-LED
The present invention discloses a repairing method, manufacturing method, device and electronics apparatus of micro-LED. The method for repairing a micro-LED...
2018/0069147 METHOD FOR PRODUCING A PLURALITY OF SEMICONDUCTOR CHIPS AND SEMICONDUCTOR CHIP
Disclosed is a method for producing a plurality of semiconductor chips (10). A composite (1), which comprises a carrier (4) and a semiconductor layer sequence...
2018/0069146 Minimizing Tin Loss During Thermal Processing of Kesterite Films
Techniques for minimizing loss of volatile components during thermal processing of kesterite films are provided. In one aspect, a method for annealing a...
2018/0069145 SEMICONDUCTOR DEVICE
In a plane including the center line of a vertical through hole, it is assumed that a segment that connects a first point corresponding to the edge of an...
2018/0069144 SOLAR CELL AND METHOD FOR MANUFACTURING SAME
The solar cell includes an n-type semiconductor layer and a p-type semiconductor layer on a first principal surface of a crystalline silicon substrate. The...
2018/0069143 PARALLEL INTERCONNECTION OF NEIGHBORING SOLAR CELLS VIA A COMMON BACK PLANE
A solar cell assembly comprising a plurality of solar cells and a support, the support comprising a conductive layer. The conductive layer is divided into a...
2018/0069142 PHOTOVOLTAIC SOLAR CELL WITH BACKSIDE RESONANT WAVEGUIDE
A solar cell has a backside resonant waveguide structure. The backside structure includes a plurality of resonant waveguides formed in or on a ...
2018/0069141 MONOLITHIC INTEGRATION OF HETEROJUNCTION SOLAR CELLS
A method for fabricating a device with integrated photovoltaic cells includes supporting a semiconductor substrate on a first handle substrate and doping the...
2018/0069140 Tunneling Barrier Infrared Detector Devices
Embodiments of the present disclosure are directed to infrared detector devices incorporating a tunneling structure. In one embodiment, an infrared detector...
2018/0069139 PHOTOVOLTAIC DEVICES AND PHOTOVOLTAIC MODULES
A photovoltaic device includes: a semiconductor substrate stretching in a first direction and a second direction that intersects the first direction; and a...
2018/0069138 FABRICATING THIN-FILM OPTOELECTRONIC DEVICES WITH ADDED POTASSIUM
A method (200) and deposition zone apparatus (300) for fabricating thin-film optoelectronic devices (100), the method comprising: providing a...
2018/0069137 IMAGE SENSOR AND IMAGE CAPTURING APPARATUS
An image sensor comprising: a plurality of pixels that are each provided with a plurality of photoelectric conversion portions and a microlens, and that are...
2018/0069136 PROCESS AND STRUCTURES FOR FABRICATION OF SOLAR CELLS
Contact holes of solar cells are formed by laser ablation to accommodate various solar cell designs. Use of a laser to form the contact holes is facilitated by...
2018/0069135 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
There is provided a semiconductor device configured to include a plurality of semiconductor units formed in a semiconductor layer. Each of the semiconductor...
2018/0069134 JFET STRUCTURE AND MANUFACTURING METHOD OF THE SAME
The present disclosure provides a transistor structure, including a self-aligned source-drain structure surrounded by an insulating structure and a gate of a...
2018/0069133 SEMICONDUCTOR DEVICE
In a cross section in a channel width direction, a semiconductor layer includes a first region of which one end portion is in contact with an insulating layer...
2018/0069132 TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL, AND RELATED MANUFACTURING METHOD
A transistor may include a semiconductor, a source electrode, a drain electrode, and a gate electrode. The semiconductor may include a first doped region, a...
2018/0069131 STACKED SERIES CONNECTED VFETS FOR HIGH VOLTAGE APPLICATIONS
A method of forming a semiconductor device and resulting structures having stacked vertical field effect transistors (VFETs) connected in series. A first...
2018/0069130 DISPLAY DEVICE
According to one embodiment, a display device includes a first light shielding layer, a second light shielding layer, a first semiconductor layer, a second...
2018/0069129 THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME
A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode...
2018/0069128 DISPLAY DEVICE
A display device according to an exemplary embodiment of the present invention includes: a substrate; a gate line and a data line that are provided on the...
2018/0069127 THIN FILM TRANSISTOR OF DISPLAY PANEL
A thin film transistor of a display panel includes a patterned light absorption layer, a patterned semiconductor layer, a patterned gate insulating layer, a...
2018/0069126 SEMICONDUCTOR DEVICE
A semiconductor device includes an n-type oxide semiconductor layer, a gate electrode above the oxide semiconductor layer, a gate insulation layer between the...
2018/0069125 SEMICONDUCTOR DEVICES
Semiconductor devices as described herein may include a fin-shaped pattern extending in a first direction, first and second side walls facing each other, first...
2018/0069124 HETEROGENEOUS SOURCE DRAIN REGION AND EXTENSION REGION
A semiconductor structure includes a source drain region of a first material and an extension region of a second material. A semiconductor device fabrication...
2018/0069123 MOS Devices Having Epitaxy Regions with Reduced Facets
An integrated circuit structure includes a gate stack over a semiconductor substrate, and an opening extending into the semiconductor substrate, wherein the...
2018/0069122 SEMICONDUCTOR DEVICE
The present disclosure provides a fabrication method for forming a semiconductor device, including: forming a substrate, the substrate including first fins,...
2018/0069121 METHOD TO INDUCE STRAIN IN 3-D MICROFABRICATED STRUCTURES
Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed in two epitaxial layers that are grown over...
2018/0069120 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a substrate, a liner, and an epitaxy structure. The substrate has a recess. The liner is disposed in the recess. The liner is...
2018/0069119 SEMICONDUCTOR DEVICE INCLUDING GATE ELECTRODE FOR APPLYING TENSILE STRESS TO SILICON SUBSTRATE, AND METHOD OF...
A gate insulating film and a gate electrode of non-single crystalline silicon for forming an nMOS transistor are provided on a silicon substrate. Using the...
2018/0069118 STRAINED CMOS ON STRAIN RELAXATION BUFFER SUBSTRATE
A FinFET device includes a strain relaxation buffer (SRB) substrate. A set of cut silicon fins is on the SRB substrate. Each fin in the set of cut silicon fins...
2018/0069117 SEMICONDUCTOR DEVICES INCLUDING VERTICAL CHANNEL TRANSISTORS
A semiconductor device includes an active pillar that protrudes above a substrate, the active pillar including a pair of vertical sections and a body...
2018/0069116 DIODE, JUNCTION FIELD EFFECT TRANSISTOR, AND SEMICONDUCTOR DEVICE
Provided are a diode, a junction field effect transistor (JFET), and a semiconductor device that have a top doped region. A dopant concentration gradient of...
2018/0069115 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
An n-type region and a p-type region of a first parallel pn layer are arranged parallel to a base front surface, in a striped planar layout extending from an...
2018/0069114 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device including a Fin FET device includes a fin structure extending in a first direction and protruding from a substrate layer. The fin...
2018/0069113 UNIFORM FIN DIMENSIONS USING FIN CUT HARDMASK
A method for forming fins includes patterning a fin cut mask over a fin etch mask to protect the fin etch mask in a fin region and etching a substrate in...
2018/0069112 Semiconductor Device and Manufacturing Method
A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer provided on the first nitride semiconductor layer, a...
2018/0069111 ESD PROTECTION SCR DEVICE
An ESD protection SCR device includes a semiconductor substrate, an epitaxial layer, device isolation layers, an n-type well formed in an anode region, a first...
2018/0069110 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device including an IGBT element having features of a low on-state voltage and a low turn-off loss is provided. The semiconductor device is...
2018/0069109 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A performance of a semiconductor device is improved. A semiconductor device includes two element portions and an interposition portion interposed between the...
2018/0069108 NARROW ACTIVE CELL IE TYPE TRENCH GATE IGBT AND A METHOD FOR MANUFACTURING A NARROW ACTIVE CELL IE TYPE TRENCH...
In an equal width active cell IE type IGBT, a wide active cell IE type IGBT, and the like, an active cell region is equal in trench width to an inactive cell...
2018/0069107 LATERAL INSULATED-GATE BIPOLAR TRANSISTOR AND MANUFACTURING METHOD THEREFOR
Provided is a lateral insulated-gate bipolar transistor (LIGBT), comprising a substrate (10), an anode terminal and a cathode terminal on the substrate (10),...
2018/0069106 FABRICATION OF INTEGRATED CIRCUIT STRUCTURES FOR BIPOLOR TRANSISTORS
Methods according to the present disclosure include: providing a substrate including: a first semiconductor region, a second semiconductor region, and a trench...
2018/0069105 METHOD TO BUILD VERTICAL PNP IN A BICMOS TECHNOLOGY WITH IMPROVED SPEED
Various particular embodiments include an integrated circuit (IC) structure having: a stack region; and a silicon substrate underlying and contacting the stack...
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