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Patent # Description
2018/0069104 Method Of Forming Pairs Of Three-Gate Non-volatile Flash Memory Cells Using Two Polysilicon Deposition Steps
A simplified method for forming pairs of non-volatile memory cells using two polysilicon depositions. A first polysilicon layer is formed on and insulated from...
2018/0069103 Reduction of Fin Loss in the Formation of FinFETs
A method includes forming a dummy gate stack on a top surface and a sidewall of a middle portion of a semiconductor fin, and forming a spacer layer. The spacer...
2018/0069102 FIN FIELD EFFECT TRANSISTOR AND METHOD OF FORMING THE SAME
A fin field effect transistor (FinFET) includes a substrate and a fin having a first height over a surface of the substrate. The fin includes a first portion...
2018/0069101 METHOD FOR MANUFACTURING SEMICONDUCTOR FIN STRUCTURE WITH EXTENDING GATE STRUCTURE
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and a fin structure formed over the...
2018/0069100 FORMING NON-LINE-OF-SIGHT SOURCE DRAIN EXTENSION IN AN NMOS FINFET USING N-DOPED SELECTIVE EPITAXIAL GROWTH
A finFET device includes an n-doped source and/or drain extension that is disposed between a gate spacer of the finFET and a bulk semiconductor portion of the...
2018/0069099 MANUFACTURE METHOD OF N TYPE THIN FILM TRANSISTOR
The present invention provides a manufacture method of a N type thin film transistor. In the manufacture process, the chemical solution is employed to etch the...
2018/0069098 OXIDE TFT AND METHOD OF FORMING THE SAME
The present disclosure proposes an oxide TFT and its forming method. The method includes providing a substrate, forming an active layer on top of the...
2018/0069097 FABRICATION OF A VERTICAL FIN FIELD EFFECT TRANSISTOR HAVING A CONSISTENT CHANNEL WIDTH
A method of forming a vertical fin field effect transistor having a consistent channel width, including forming one or more vertical fin(s) on the substrate,...
2018/0069096 Vertical Tunneling Field-Effect Transistor Cell and Fabricating the Same
A tunneling field-effect transistor (TFET) device is disclosed. A protrusion structure is disposed over the substrate and protrudes out of the plane of...
2018/0069095 SEMICONDUCTOR STRUCTURE WITH UNLEVELED GATE STRUCTURE
Semiconductor structures are provided. The semiconductor structure includes a fin structure formed over a substrate and a gate structure formed across the fin...
2018/0069094 METHOD OF FORMING THE GATE ELECTRODE OF FIELD EFFECT TRANSISTOR
A method of fabricating a semiconductor device includes depositing a contact etch stop layer (CESL) over a dummy gate electrode, a source/drain (S/D) region...
2018/0069093 SEMICONDUCTOR DEVICE LAYOUT STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a semiconductor substrate, a trench isolator portion in the semiconductor substrate, a dummy gate on the semiconductor...
2018/0069092 SOURCE/DRAIN PARASITIC CAPACITANCE REDUCTION IN FINFET-BASED SEMICONDUCTOR STRUCTURE HAVING TUCKED FINS
A method of reducing parasitic capacitance includes providing a starting semiconductor structure, the starting semiconductor structure including a ...
2018/0069091 METHOD FOR LATE DIFFERENTIAL SOI THINNING FOR IMPROVED FDSOI PERFORMANCE AND HCI OPTIMIZATION
Methods for selectively thinning a silicon channel area under a gate electrode and resulting devices are disclosed. Embodiments include providing a SOI...
2018/0069090 HEMT TRANSISTOR
Heterojunction structure, also referred to as a heterostructure, of semiconductor material, in particular for a high electron mobility transistor (HEMT),...
2018/0069089 METHOD OF FORMING SEMICONDUCTOR STRUCTURE
A method of forming a semiconductor structure is disclosed. A substrate having a first area and a second area is provided, wherein a first surface of the first...
2018/0069088 TUNABLE BREAKDOWN VOLTAGE RF FET DEVICES
A tunable breakdown voltage RF MESFET and/or MOSFET and methods of manufacture are disclosed. The method includes forming a first line and a second line on an...
2018/0069087 Vertical Transistor Device Structure with Cylindrically-Shaped Field Plates
A vertical power transistor device includes a semiconductor layer of a first conductivity type, with a plurality of dielectric regions disposed in the...
2018/0069086 SEMICONDUCTOR CRYSTAL SUBSTRATE AND SEMICONDUCTOR DEVICE
A semiconductor crystal substrate includes a first buffer layer formed of a nitride semiconductor over a substrate, a second buffer layer formed of a nitride...
2018/0069085 NUCLEATION LAYER FOR GROWTH OF III-NITRIDE STRUCTURES
Nucleation layers for growth of III-nitride structures, and methods for growing the nucleation layers, are described herein. A semiconductor can include a...
2018/0069083 Controlled Ion Implantation into Silicon Carbide Using Channeling and Devices Fabricated Using Controlled Ion...
Methods of forming a semiconductor structure include the use of channeled implants into silicon carbide crystals. Some methods include providing a silicon...
2018/0069082 MULTI-DOPED GRAPHENE AND METHOD FOR PREPARING THE SAME
A graphene doped with different dopants and a method for preparing the same are disclosed. A method for preparing a multi-doped graphene includes: mixing a...
2018/0069081 SIC STRUCTURE, SEMICONDUCTOR DEVICE HAVING SIC STRUCTURE, AND PROCESS OF FORMING THE SAME
A silicon carbide (SiC) structure and a method of forming the SiC structure are disclosed. The SiC structure includes an SiC substrate and a film provided on...
2018/0069080 LOW-VOLTAGE CHARGE-COUPLED DEVICES WITH A HETEROSTRUCTURE CHARGE-STORAGE WELL
A CCD with an internal heterostructure well to store the photogenerated carriers is realized by using barrier and absorber semiconductors with a type-II band...
2018/0069079 SEMICONDUCTOR DEVICES INCLUDING TRAP RICH LAYER REGIONS
In a particular aspect, a device includes a substrate including a first trap rich layer region and a second trap rich layer region. The first trap rich layer...
2018/0069078 FOOD AND BEVERAGE COMPOSITIONS INFUSED WITH LIPOPHILIC ACTIVE AGENTS AND METHODS OF USE THEREOF
Aspects described herein relate to food and beverage compositions infused with lipophilic active agents and methods of use for the treatment of a variety of...
2018/0069077 POWER DEVICE INTEGRATION ON A COMMON SUBSTRATE
A semiconductor structure for facilitating an integration of power devices on a common substrate includes a first insulating layer formed on the substrate and...
2018/0069076 SEMICONDUCTOR DEVICE
An HVJT is includes a parasitic diode formed by pn junction between an n.sup.--type diffusion region and a second p.sup.--type separation region surrounding a...
2018/0069075 SEMICONDUCTOR DEVICE
A semiconductor device includes: a semiconductor substrate including a drift region of a first conductivity type; an emitter region of the first conductivity...
2018/0069074 METHOD FOR TREATING A SUBSTRATE AND A SUBSTRATE
A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate...
2018/0069073 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a semiconductor substrate having a main surface, a first insulating film formed on the main surface, a first coil formed on the...
2018/0069072 DISPLAY DEVICE
A display device according to an embodiment of the present invention includes: a display panel including a display region, a backside region, and a curvature...
2018/0069071 DISPLAY DEVICE
A display device includes: a flexible substrate having a shape extending in a first direction and a second direction crossing each other; a display element...
2018/0069070 DISPLAY DEVICE
A display device includes a substrate including a first plastic layer, a second plastic layer on the first plastic layer, and a black organic layer between the...
2018/0069069 ORGANIC LIGHT EMITTING DIODE DISPLAY
An organic light emitting diode display includes a substrate, a plurality of pixels disposed on the substrate, and a plurality of transmitting windows...
2018/0069068 ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE
An organic light emitting diode display device includes a substrate, a plurality of organic light emitting diodes on the substrate, a thin film encapsulation...
2018/0069067 DISPLAY DEVICE
A display device according includes a display panel configured to display an image, a first flexible printed circuit film, and a second flexible printed...
2018/0069066 FLEXIBLE DISPLAY DEVICE
A display device includes: a flexible substrate; a pixel over the flexible substrate, the pixel including a transistor and a display element; a first wiring...
2018/0069065 DISPLAY DEVICE
A display device is disclosed, which includes: a first substrate with a data line disposed thereon, wherein the data line extends along a data ...
2018/0069064 METHOD FOR MANUFACTURING DISPLAY DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE
A method for manufacturing a display device, which does not easily damage an electrode, is provided. In the first step, a terminal electrode, a wiring, and a...
2018/0069063 DISPLAY DEVICE AND METHOD OF MANUFACTURING SAME
A display device comprises a circuit element layer on a substrate and comprising a thin film transistor, a storage capacitor, and a pixel electrode connected...
2018/0069062 ORGANIC ELECTROLUMINESCENT DISPLAY DEVICE
An organic electroluminescent display device for improving light extraction efficiency is provided. A bank has an opening part at a position of a...
2018/0069061 ORGANIC LIGHT-EMITTING DIODE
An organic light-emitting diode includes at least two segments arranged adjacent to one another, a scattering layer that at least partially scatters the light...
2018/0069060 Electronic Devices Having Displays With Openings
An electronic device may have a display. The display may have an active region in which display pixels are used to display images. The display may have one or...
2018/0069059 HYBRID DISPLAY
A hybrid pixel arrangement for a full-color display is provided, which includes an inorganic LED in at least one sub-pixel, and an organic emissive stack in at...
2018/0069058 HIGH PIXEL DENSITY ARRAY ARCHITECTURE
What is disclosed is a pixel array architecture for displays being based on a matrix of subpixels arranged in a rectilinear matrix oriented at an angle...
2018/0069057 PIXEL ARRANGEMENT STRUCTURE FOR ORGANIC LIGHT EMITTING DISPLAY DEVICE
A pixel arrangement structure of an OLED display is provided. The pixel arrangement structure includes: a first pixel having a center coinciding with a center...
2018/0069056 DISPLAY DEVICE
A display device includes a substrate having a plurality of transmissive regions aligned in a first direction and a second direction, a plurality of first...
2018/0069055 ORGANIC LIGHT EMITTING DISPLAY DEVICE AND ORGANIC LIGHT EMITTING STACKED STRUCTURE
Disclosed is an organic light emitting display device. The organic light emitting display device includes an emission part which is disposed between an anode...
2018/0069054 Display Panel And Display Device
A display panel and a display device are provided. The display device includes an array substrate; an organic light emitting layer including a second...
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