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Patent # Description
2018/0069053 DISPLAY DEVICE
A display device includes a flexible display module and provides a display surface on which an image is displayed. The flexible display module includes a...
2018/0069052 SEMICONDUCTOR DEVICE AND STRUCTURE
A 3D semiconductor device, the device including: first transistors; second transistors, overlaying the first transistors; third transistors, overlaying the...
2018/0069051 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A resistance change element includes first and second electrodes spaced apart from each other, a metal material layer adjacent to the first electrode, an oxide...
2018/0069050 MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
A memory device includes a first interconnect extending in a first direction, semiconductor members extending in a second direction, a second interconnect...
2018/0069049 SEMICONDUCTOR DEVICE AND METHOD OF FORMING CURVED IMAGE SENSOR REGION ROBUST AGAINST BUCKLING
A semiconductor wafer has a plurality of non-rectangular semiconductor die with an image sensor region. The non-rectangular semiconductor die has a circular,...
2018/0069048 INTEGRATED SENSING MODULE, INTEGRATED SENSING ASSEMBLY AND METHOD OF MANUFACTURING THE INTEGRATED SENSING MODULE
An integrated sensing module includes: an image sensing chip including photo sensing units arranged in a two-dimensional array; a micro-hole layer disposed on...
2018/0069047 RADIATION DETECTOR DEVICE
An embodiment of the invention relates to a radiation detector device including a detector substrate for direct conversion of X-ray and/or gamma quanta to...
2018/0069046 SEMICONDUCTOR DEVICES
A semiconductor device may include a first sensor configured to sense light having a wavelength within a first wavelength range from incident light and...
2018/0069045 SOLID-STATE IMAGE SENSOR, IMAGING DEVICE, AND ELECTRONIC EQUIPMENT
The present technology relates to a solid-state image sensor, an imaging device, and electronic equipment configured such that an FD is shared by a plurality...
2018/0069044 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Provided is a semiconductor device which allows an alignment mark used for the manufacturing of a solid-state image sensor (semiconductor device) having a...
2018/0069043 SEMICONDUCTOR DEVICE STRUCTURE AND MANUFACTURING PROCESS THEREOF
A semiconductor device structure for sensing an incident light includes a substrate, a wiring structure, and at least one passivation layer. The substrate has...
2018/0069042 EMBEDDED ORIENTATION MARKERS FOR IMAGING SENSORS
An imaging sensor includes an imaging array with a plurality of pixels. A sub-set of the pixels are marker pixels configured to each provide a constant...
2018/0069041 FILL FACTOR ENHANCEMENT
An image sensor includes a plurality of photodiodes disposed in a semiconductor material and a plurality of isolation structures disposed between individual...
2018/0069040 SOLID-STATE IMAGING DEVICE
A pixel array in a solid-state imaging device includes first and second signal lines provided for each column. A pixel belongs to a first or second group on a...
2018/0069039 BACKSIDE ILLUMINATED IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME
A backside illuminated image sensor includes a photodiode arranged in a substrate, a first insulating layer arranged on a front surface of the substrate, a...
2018/0069038 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a semiconductor substrate, a photoelectric conversion element, a first isolation insulating film, and a current blocking...
2018/0069037 STACKED IMAGE SENSOR HAVING AN AIR GAP
A stacked image sensor includes: a lower device including a lower inter-layer dielectric layer over an upper surface of a lower substrate, and a lower capping...
2018/0069036 IMAGE SENSOR HAVING GUARD DAMS
An image sensor is described. The image sensor may include a substrate including a pixel area, a logic area, and a guard area disposed between the pixel area...
2018/0069035 Tensile Contact Etch Stop Layer (CESL) For Radio Frequency (RF) Silicon-On-Insulator (SOI) Switch Technology
A radio frequency switch includes a plurality of n-channel SOI CMOS transistors connected in series, wherein each of these transistors has a gate width of at...
2018/0069034 MANUFACTURE METHOD OF LTPS ARRAY SUBSTRATE
The present invention provides a manufacture method of a LTPS array substrate. By utilizing one halftone mask, the N type heavy doping, the channel doping of...
2018/0069033 TFT ARRAY SUBSTRATE STRUCTURE AND MANUFACTURING METHOD THEREOF
The present invention provides a TFT array substrate structure and a manufacturing method thereof, in which an interlayer dielectric layer (3) having a...
2018/0069032 TFT SUBSTRATE MANUFACTURING METHOD
The present invention provides a TFT substrate manufacturing method, which first forms a pixel electrode, a data line, and source/drain terminals on the base...
2018/0069031 ARRAY SUBSTRATE AND DISPLAY DEVICE USING THE SAME
An array substrate includes a substrate having a display region and a peripheral region, at least one scan line, at least one data line, at least one pixel...
2018/0069030 ARRAY SUBSTRATE, FABRICATION METHOD FOR FORMING THE SAME, AND DISPLAY DEVICE CONTAINING THE SAME
The present application discloses a fabrication method for forming an array substrate, including: forming, in a fanout region, a first signal-load line...
2018/0069029 LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF MANUFACTURING A LIQUID CRYSTAL DISPLAY DEVICE
Provided is a liquid crystal display device, including: an array substrate; a plurality of pixels sectioned by video signal lines and scanning signal lines...
2018/0069028 EMBEDDED SECURITY CIRCUIT FORMED BY DIRECTED SELF-ASSEMBLY
Embedded security circuits formed by directed self-assembly and methods for creating the same are provided herein. An example integrated circuit includes a set...
2018/0069027 PREVENTING STRAINED FIN RELAXATION
A semiconductor structure includes a stained fin, a gate upon the strain fin, and a spacer upon a sidewall of the gate and upon an end surface of the strained...
2018/0069026 STRAINED CMOS ON STRAIN RELAXATION BUFFER SUBSTRATE
A method for constructing an advanced FinFET structure is described. A first long silicon fin for n-type FinFET devices and a first long silicon germanium fin...
2018/0069025 Display Device and Electronic Device
A display device includes overlapping two display panels. The display panel on the upper side includes a first display region and a region that transmits...
2018/0069024 EXTREMELY THIN SILICON-ON-INSULATOR SILICON GERMANIUM DEVICE WITHOUT EDGE STRAIN RELAXATION
A method for forming a semiconductor structure includes forming a strained silicon germanium layer on top of a substrate. At least one patterned hard mask...
2018/0069023 DEPOSITION METHOD OF SILICON OXIDE THIN FILM AND MANUFACTURE METHOD OF LOW TEMPERATURE POLY-SILICON TFT SUBSTRATE
The present invention provides a deposition method of a silicon oxide thin film and a manufacture method of a Low Temperature Poly-silicon TFT substrate. The...
2018/0069022 THIN-FILM TRANSISTOR AND METHOD OF FABRICATING THE SAME
The present disclosure provides a method of fabricating a TFT substrate. The method includes: forming a gate electrode on a substrate; forming a gate...
2018/0069021 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device may include a first cell structure, a second cell structure, a pad structure, a circuit, and one or more openings. The pad structure may...
2018/0069020 PHOTORESIST POLYMERS, PHOTORESIST COMPOSITIONS, METHODS OF FORMING PATTERNS AND METHODS OF MANUFACTURING...
A photoresist polymer includes a first repeating unit and a second repeating unit. The first repeating unit includes a fluorine leaving group that is...
2018/0069019 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Disclosed are a semiconductor device and a manufacturing method thereof. According to the semiconductor device and the manufacturing method thereof according...
2018/0069018 3D MEMORY DEVICE
A 3D memory device comprising: a substrate; at least one first group of at least three first U-shaped memory cells strings each including a first buried string...
2018/0069017 3D MEMORY DEVICE
A 3D memory device comprising: a substrate; at least one first group of four first "U"-shaped memory cells strings each including a first buried string...
2018/0069016 3D MEMORY DEVICE
A 3D memory device comprising: a substrate; at least three first "U"-shaped strings of memory cells each including a first buried string portion, a first...
2018/0069015 DRAIN SELECT GATE FORMATION METHODS AND APPARATUS
Some embodiments include a string of charge storage devices formed along a vertical channel of semiconductor material; a gate region of a drain select gate...
2018/0069014 SEMICONDUCTOR DEVICE
An insulating film, which is sandwiched between a gate electrode formed on an SOI layer constituting an SOI substrate and an epitaxial layer formed on the SOI...
2018/0069013 Thin SRAM Cell Having Vertical Transistors
A memory device includes six field effect transistors (FETs) formed with semiconductor nanowires arranged on a substrate in an orientation substantially...
2018/0069012 METHOD FOR MANUFACTURING STATIC RANDOM ACCESS MEMORY DEVICE
In a method of manufacturing an SRAM device, an insulating layer is formed over a substrate. First dummy patterns are formed over the insulating layer....
2018/0069011 Semiconductor Devices and Methods of Manufacture Thereof
A method of forming an SRAM cell includes forming a first vertical pull-down transistor, a second vertical pull-down transistor, a first vertical pass-gate...
2018/0069010 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device having a high degree of freedom of layout has a first part AR1, in which a plurality of p-type wells PW and n-type wells NW are...
2018/0069009 SELECTIVE SAC CAPPING ON FIN FIELD EFFECT TRANSISTOR STRUCTURES AND RELATED METHODS
FinFET structures and methods of forming such structures. The FinFET structures including a substrate; at least two gates disposed on the substrate; a...
2018/0069008 MEMORY DEVICE COMPRISING ELECTRICALLY FLOATING BODY TRANSISTOR
A semiconductor memory cell comprising an electrically floating body. A method of operating the memory cell is provided.
2018/0069007 SEMICONDUCTOR DEVICES WITH SIDEWALL SPACERS OF EQUAL THICKNESS
Semiconductor structures with different devices each having spacers of equal thickness and methods of manufacture are disclosed. The method includes forming a...
2018/0069006 Semiconductor Devices with Nanowires and Methods for Fabricating the Same
A semiconductor device may include a substrate, a first nanowire, a second nanowire, a first gate insulating layer, a second gate insulating layer, a first...
2018/0069005 PUNCHTHROUGH STOP LAYERS FOR FIN-TYPE FIELD-EFFECT TRANSISTORS
Device structures for a FinFET and fabrication methods for making a device structure for a FinFET. A first layer containing a first dopant is formed on a first...
2018/0069004 FABRICATION OF FIN FIELD EFFECT TRANSISTORS FOR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICES INCLUDING...
A method of forming a complementary metal oxide semiconductor (CMOS) device on a substrate, including forming a plurality of vertical fins on the substrate,...
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