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Patent # Description
2018/0068901 FABRICATION OF A VERTICAL FIN FIELD EFFECT TRANSISTOR WITH REDUCED DIMENSIONAL VARIATIONS
A method of forming a fin field effect transistor (finFET) having fin(s) with reduced dimensional variations, including forming a dummy fin trench within a...
2018/0068900 Method and Structure for FinFET Isolation
A semiconductor device includes a substrate; first and second fins over the substrate and extending lengthwise generally along a first direction; first and...
2018/0068899 WRAP-AROUND CONTACT INTEGRATION SCHEME
Embodiments of the invention provide a wrap-around contact integration scheme that includes sidewall protection during contact formation. According to one...
2018/0068898 Semi-sequential 3D Integration
Disclosed herein is a semiconductor structure including: a host substrate and one or more bonding layers on top of the host substrate. The structure further...
2018/0068897 LASER PROCESSING METHOD AND LASER PROCESSING APPARATUS
A laser beam machining method and a laser beam machining device capable of cutting a work without producing a fusing and a cracking out of a predetermined...
2018/0068896 METHOD OF FABRICATING ELECTRONIC PACKAGE
An electronic package is provided, which includes: an electronic element having an active surface with a plurality of electrode pads, an inactive surface...
2018/0068895 METHOD OF PROCESSING A WAFER
A method of processing a wafer having a metal film formed on a reverse side thereof includes removing a metal film on the reverse side of the wafer along an...
2018/0068894 Methods and Apparatus for Scribe Seal Structures
An example integrated circuit die includes: a plurality of lower level conductor layers, a plurality of lower level insulator layers between the plurality of...
2018/0068893 PARTIAL SPACER FOR INCREASING SELF ALIGNED CONTACT PROCESS MARGINS
A semiconductor structure is provided. The semiconductor includes a gate stack on a substrate. The semiconductor includes a first set of sidewall spacers on...
2018/0068892 BACKSIDE CONTACT TO A FINAL SUBSTRATE
A device structure with a backside contact includes a silicon-on-insulator substrate including a device layer, a buried insulator layer, and an...
2018/0068891 BACKSIDE CONTACT TO A FINAL SUBSTRATE
A method for fabricating a backside contact using a silicon-on-insulator substrate that includes a device layer, a buried insulator layer, and a handle wafer....
2018/0068890 METHOD OF ENABLING SEAMLESS COBALT GAP-FILL
Methods for depositing a contact metal layer in contact structures of a semiconductor device are provided. In one embodiment, a method for depositing a contact...
2018/0068889 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device and a method of manufacturing the same, the semiconductor device including a substrate; an insulating layer on the substrate, the...
2018/0068888 METHOD FOR REDUCING CRACKS IN A STEP-SHAPED CAVITY
A method for manufacturing a semiconductor device includes providing a semiconductor substrate including a substrate and a multilayer film having a step-shaped...
2018/0068887 SEMICONDUCTOR STRUCTURE WITH AIRGAP
A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a...
2018/0068886 POROUS SEMICONDUCTOR LAYER TRANSFER FOR AN INTEGRATED CIRCUIT STRUCTURE
An integrated radio frequency (RF) circuit structure may include an active device on a front-side surface of a semiconductor device layer. A backside surface...
2018/0068885 SELECTIVE FORMATION OF METALLIC FILMS ON METALLIC SURFACES
Metallic layers can be selectively deposited on surfaces of a substrate relative to a second surface of the substrate. In preferred embodiments, the metallic...
2018/0068884 Micro Device Arrangement in Donor Substrate
This disclosure is related to arranging micro devices in the donor substrate by either patterning or population so that there is no interfering with unwanted...
2018/0068883 ELECTROSTATIC CHUCK DEVICE
Provided is an electrostatic chuck device which includes: an electrostatic chuck section having one main surface serving as a placing surface on which a...
2018/0068882 SUBSTRATE STORAGE CONTAINER
[Problem] To reduce a sliding trace in a vicinity of a substrate end surface, while maintaining smooth vertical movement of a substrate in a groove of the...
2018/0068881 SUBSTRATE PROCESSING APPARATUS
A substrate processing apparatus including a frame and at least one substrate transport arm having at least one end effector, each end effector having a base...
2018/0068880 DIE SORTING APPARATUS AND DIE SORTING METHOD
A die sorting apparatus includes a fixing mechanism for fixing a wafer having a plurality of dies, a positioning mechanism including an indicator for selecting...
2018/0068879 Front Opening Ring Pod
A pod for exchanging consumable parts with a process module includes a base plate having a front side, a back side, and first and second lateral sides. A first...
2018/0068878 TAPE STICKING APPARATUS AND TAPE STICKING METHOD
Disclosed is a tape sticking apparatus in which an end region of a board formed of a film-shaped member is supported by a backup stage, a tape slice for...
2018/0068877 SUBSTRATE CLEANING APPARATUS AND SUBSTRATE CLEANING METHOD
According to one embodiment, a substrate cleaning apparatus that cleans a substrate while rotating the substrate, the substrate cleaning apparatus includes: a...
2018/0068876 SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD
A second liquid film of the second processing liquid covers an upper surface of the first liquid film of the first processing liquid, on the upper surface of...
2018/0068875 SUBSTRATE PROCESSING APPARATUS
A substrate processing apparatus includes: a spin chuck adapted to hold a substrate having a substantially circular outer shape with the principal surface of...
2018/0068874 Modular System for Moulding Electronic Components and Kit-of-Parts for Assembling Such a Modular System
The invention relates to a modular system for moulding electronic components, comprising at least three separate system modules; a press module for moulding...
2018/0068873 SUBSTRATE LIQUID PROCESSING APPARATUS
A substrate liquid processing apparatus includes a liquid unit configured to process a liquid processing unit configured to process a substrate with multiple...
2018/0068872 Carrier Substrate For Semiconductor Structures Suitable For A Transfer By Transfer Print And Manufacturing Of...
A carrier substrate for semiconductor structures which can be transferred by transfer printing, and manufacture of the semiconductor structures on the carrier...
2018/0068871 BONDED BODY, SUBSTRATE FOR POWER MODULE WITH HEAT SINK, HEAT SINK, METHOD FOR PRODUCING BONDED BODY, METHOD FOR...
A bonded body is provided that is formed by bonding a metal member formed from copper, nickel, or silver, and an aluminum alloy member formed from an aluminum...
2018/0068870 ELECTRONIC PACKAGE AND METHOD FOR FABRICATING THE SAME
The present disclosure provides an electronic package and a method for fabricating the same. The method including: connecting a first carrier structure with an...
2018/0068869 MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
Provided is a manufacturing method for a semiconductor device using stamping press working which is capable of securing an island having substantially the same...
2018/0068868 ARTICLES HAVING HOLES WITH MORPHOLOGY ATTRIBUTES AND METHODS FOR FABRICATING THE SAME
Articles including a glass-based substrate with holes, semiconductor packages including an article with holes, and methods of fabricating holes in a substrate...
2018/0068867 METHOD AND STRUCTURE FOR A 3D WIRE BLOCK
The present invention provides for a structure and a mechanism by which by utilizing additive manufacturing processes electrical connections are created that...
2018/0068866 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
Semiconductor devices and fabrication methods thereof are provided. An exemplary fabrication method includes providing a semiconductor substrate; forming a...
2018/0068865 ETCHING METHOD
A method for selectively etching a first region of silicon oxide with respect to a second region of silicon nitride includes a first step of exposing a target...
2018/0068864 METHOD FOR PREVENTING EXCESSIVE ETCHING OF EDGES OF AN INSULATOR LAYER
A method for manufacturing a semiconductor device includes forming a first semiconductor layer on a semiconductor substrate, forming a first insulator layer on...
2018/0068863 TREATMENT AGENT FOR INHIBITING SUBSTRATE PATTERN COLLAPSE AND TREATMENT METHOD OF SUBSTRATE
A treatment agent for inhibiting substrate pattern collapse contains a polymer and a polar solvent. A treatment method of a substrate includes: applying the...
2018/0068862 PLASMA PROCESSING METHOD AND PLASMA PROCESSING APPARATUS
The present invention provides a plasma processing method and a plasma processing apparatus. The plasma processing method enables consistent processing by...
2018/0068861 Location-Specific Tuning of Stress to Control Bow to Control Overlay In Semiconductor Processing
Techniques herein include systems and methods for correcting pattern overlay errors by correcting or adjusting bowing of wafers. Location-specific tuning of...
2018/0068860 Location-Specific Tuning of Stress to Control Bow to Control Overlay In Semiconductor Processing
Techniques herein include systems and methods for correcting pattern overlay errors by correcting or adjusting bowing of wafers. Location-specific tuning of...
2018/0068859 Location-Specific Tuning of Stress to Control Bow to Control Overlay In Semiconductor Processing
Techniques herein include systems and methods for correcting pattern overlay errors by correcting or adjusting bowing of wafers. Location-specific tuning of...
2018/0068858 FORMING A CONTACT FOR A TALL FIN TRANSISTOR
A method of making a semiconductor device includes forming a recessed fin in a substrate, the recessed fin being substantially flush with a surface of the...
2018/0068857 LOW RESISTANCE SOURCE-DRAIN CONTACTS USING HIGH TEMPERATURE SILICIDES
A semiconductor structure and a method for fabricating the same. The semiconductor structure includes at least one semiconductor fin disposed on a substrate. A...
2018/0068856 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
In manufacturing a trench type MOSFET, reliability of a semiconductor device is prevented from being degraded due to a short circuit or lowering of withstand...
2018/0068855 Method of Manufacturing Thin Film Transistor
The present disclosure provides a method of manufacturing a thin film transistor, the method comprises: to provide a substrate, to provide a gate electrode on...
2018/0068854 SUBSTRATE BONDING APPARATUS AND SUBSTRATE BONDING METHOD
A substrate bonding apparatus includes a vacuum chamber, a surface activation part for activating respective bonding surfaces of a first substrate and a second...
2018/0068853 Diamond Semiconductor System and Method
Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The system may include a diamond material having n-type donor...
2018/0068852 Method of Quasi Atomic Layer Etching
Techniques herein include an etch process that etches a layer of material incrementally, similar to mono-layer etching of atomic layer etching (ALE), but not...
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