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Patent # Description
2018/0067889 Processor Core To Coprocessor Interface With FIFO Semantics
Techniques are provided for exchanging dedicated hardware signals to manage a first-in first-out (FIFO). In an embodiment, a first processor initiates content...
2018/0067888 SINGLE-CHIP CONTROL MODULE FOR AN INTEGRATED SYSTEM-ON-A-CHIP FOR SILICON PHOTONICS
The present invention provides an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data...
2018/0067887 PCIE LANE AGGREGATION OVER A HIGH SPEED LINK
A method of operating a computer network system configured with disaggregated inputs/outputs. This system can be configured in a leaf-spine architecture and...
2018/0067886 BACK CHANNEL SUPPORT FOR SYSTEMS WITH SPLIT LANE SWAP
Example embodiments may include a method for configuring an interface that includes determining information for a configuration of an interface of a first...
2018/0067885 USB TYPE-C MODULE
A USB Type-C module has a plurality of ground pins including a first ground pin, a first configuration pin, a second configuration pin and a detector. The...
2018/0067884 USB TYPE-C CONNECTOR WITH A SECONDARY PORT
The present disclosure relates to a USB type-C connector assembly including a connector and a secondary port. The connector assembly may be integrally attached...
2018/0067883 TECHNIQUES OF EMULATION OF SERIAL PORT OVER USB AT EMBEDDED-SYSTEM DEVICE
In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be an embedded-system device. The...
2018/0067882 MULTIPROCESSOR SYSTEM
The present invention realizes a functional safety of a multiprocessor system without tightly coupling processor elements. When causing a plurality of...
2018/0067881 ENSURING THE APPROPRIATE UTILIZATION OF SYSTEM RESOURCES USING WEIGHTED WORKLOAD BASED, TIME-INDEPENDENT SCHEDULING
Ensuring the appropriate utilization of system resources using weighted workload based, time-independent scheduling, including: receiving an I/O request...
2018/0067880 CONTROLLER AND OPERATING METHOD THEREOF
A controller may include a first encoder suitable for generating a first polar parity by performing a first polar encoding operation to respective first...
2018/0067879 SYSTEMS AND METHODS FOR IMPLEMENTING A USER MODE VIRTUAL SERIAL COMMUNICATIONS PORT EMULATOR
Systems and methods for implementing a user mode virtual serial communications port emulator are disclosed herein. According to an aspect, a method for a...
2018/0067878 METHOD AND APPARATUS FOR TRANSMITTING INFORMATION
The present application discloses a method and an apparatus for transmitting information. A specific implementation of the method includes: sending first...
2018/0067877 Maintaining Ordering Requirements While Converting Protocols In A Communications Fabric
Systems and methods for maintaining an order of read and write transactions for each source through a bridge in a bus fabric are disclosed. The bridge provides...
2018/0067876 SYSTEMS AND METHODS FOR CONTENT INFORMATION COMMUNICATION
Message exchange techniques for content information communication between a primary device and a companion device are described. Content information may...
2018/0067875 UNIVERSAL SERIAL BUS SMART HUB
A USB smart hub may provide enhanced battery charging, data storage security, vendor matching, device authentication, data capture/debug, and role switching....
2018/0067874 SYSTEM FOR SECURING CONTENTS OF REMOVABLE MEMORY
This disclosure includes a method for securing a memory of an electronic system that includes initializing the memory, creating a security key, transmitting...
2018/0067873 NON-ENCLAVE ACCESS PREVENTION
A processing system includes an execution unit comprising a logic circuit to implement an architecturally-protected execution environment associated with a...
2018/0067872 METHOD AND DEVICE FOR TRANSFER OF DATA TO OR FROM A MEMORY
A method for reading or writing data at an address of a memory is disclosed. The data includes a number of consecutive words that each has a plurality of bits....
2018/0067871 DYNAMIC ACCESS METHOD SWITCHING FOR OPEN DATA SETS
A method for switching between access methods while a data set is open includes attempting, on behalf of a first system, to gain access to a control interval...
2018/0067870 Control for Authenticated Accesses to a Memory Device
The embodiments of the invention describe settings, commands, command signals, flags, attributes, parameters or the like for signed access prior to allowing...
2018/0067869 IN-MEMORY SHARED DATA REUSE REPLACEMENT AND CACHING
A cache management system for managing a plurality of intermediate data includes a processor and a memory having stored thereon instructions that cause the...
2018/0067868 HOST PAGE MANAGEMENT USING ACTIVE GUEST PAGE TABLE INDICATORS
A marking capability is used to provide an indication of whether a block of memory is being used by a guest control program to back an address translation...
2018/0067867 HOST-BASED RESETTING OF ACTIVE USE OF GUEST PAGE TABLE INDICATORS
A marking capability is used to provide an indication of whether a block of memory is being used by a guest control program to back an address translation...
2018/0067866 TRANSLATE ON VIRTUAL MACHINE ENTRY
A processor includes a core with virtualization support circuitry to, in response to a request to access an instruction, retrieve a logical address from a...
2018/0067865 APPARATUS AND METHOD FOR COMPUTATIONAL WORKFLOW MANAGEMENT
Apparatuses and methods for performing computational workflow management are provided. An example apparatus may include processing circuitry. The processing...
2018/0067864 SYSTEM AND METHOD FOR CREATING TIME-ACCURATE EVENT STREAMS
Embodiments of the present invention may provide an improved distributed computing system. Entities in the distributed computing system may be divided into...
2018/0067863 COMPUTING SYSTEM WITH CACHE MANAGEMENT MECHANISM AND METHOD OF OPERATION THEREOF
A computing system includes: a memory storage unit, having memory blocks, configured as a memory cache to store storable objects; and a device control unit,...
2018/0067862 ALLOCATE A SEGMENT OF A BUFFER TO EACH OF A PLURALITY OF THREADS TO USE FOR WRITING DATA
Provided are a computer program product, system, and method to allocate a segment of a buffer to each of a plurality of threads to use for writing data. Each...
2018/0067861 DUPLICATE IN-MEMORY SHARED-INTERMEDIATE DATA DETECTION AND REUSE MODULE IN SPARK FRAMEWORK
A cache management system for managing a plurality of intermediate data includes a processor, and a memory having stored thereon the plurality of intermediate...
2018/0067860 READ AHEAD MANAGEMENT IN A MULTI-STREAM WORKLOAD
Implementations described and claimed herein provide a method and system for managing execution of commands for a storage device, the method comprising...
2018/0067859 SELECTIVE ALLOCATION OF CPU CACHE SLICES TO DATABASE OBJECTS
A central processing unit (CPU) forming part of a computing device, initiates execution of code associated with each of a plurality of objects used by a worker...
2018/0067858 METHOD FOR DETERMINING DATA IN CACHE MEMORY OF CLOUD STORAGE ARCHITECTURE AND CLOUD STORAGE SYSTEM USING THE SAME
A method for determining data in cache memory of a cloud storage architecture and a cloud storage system using the method are disclosed. The method includes...
2018/0067857 EFFICIENT DATA CACHING MANAGEMENT IN SCALABLE MULTI-STAGE DATA PROCESSING SYSTEMS
According to some example embodiments, a method includes: receiving, by a processor, from a data source, a processing profile comprising input data blocks and...
2018/0067856 SYSTEMS AND METHOD FOR DELAYED CACHE UTILIZATION
A system for managing cache utilization includes a processor core, a lower-level cache, and a higher-level cache. In response to activating the higher-level...
2018/0067855 SHARED BUFFERED MEMORY ROUTING
A shared memory controller receives a flit from another first shared memory controller over a shared memory link, where the flit includes a node identifier...
2018/0067854 AGGRESSIVE WRITE-BACK CACHE CLEANING POLICY OPTIMIZED FOR NON-VOLATILE MEMORY
Methods and apparatus related to an aggressive write-back cache cleaning policy optimized for Non-Volatile Memory (NVM) are described. In one embodiment, dirty...
2018/0067853 EFFICIENT DATA STORAGE AND RETRIEVAL USING A HETEROGENEOUS MAIN MEMORY
Techniques related to efficient data storage and retrieval using a heterogeneous main memory are disclosed. A database includes a set of persistent format (PF)...
2018/0067852 POLARITY BASED DATA TRANSFER FUNCTION FOR VOLATILE MEMORY
Apparatus, systems, and methods to implement polarity based data transfer function for volatile memory power reduction are described. The transfer function...
2018/0067851 STORAGE SYSTEM
A storage system monitors the first access frequency of occurrence which is the access frequency of occurrence from a host device during a first period, and...
2018/0067850 NON-VOLATILE MEMORY DEVICE
A write frequency of a non-volatile memory is determined at a fine granularity while suppressing consumption of the volatile memory. When it is determined that...
2018/0067849 STORAGE DEVICE THAT MAINTAINS A PLURALITY OF LAYERS OF ADDRESS MAPPING
A storage device includes a nonvolatile memory, a cache memory, and a processor. The processor is configured to load, from the nonvolatile memory into the...
2018/0067848 MEMORY ACCESS CONTROL METHOD AND SYSTEM
There is provided a memory access control method and system in which one or more memory blocks are allocated to hold data for a dataset and the one or more...
2018/0067847 MEMORY DEVICE INCLUDING COLUMN REDUNDANCY
A memory device includes a memory cell array and a column decoder. The memory cell array includes a plurality of mats connected to a word line. The column...
2018/0067845 AUTOMATED QUALITY ASSURANCE TESTING OF BROWSER-BASED APPLICATIONS
Methods and apparatuses are described for intelligent automation of computer software test scripts and code requirements. A server generates a baseline test...
2018/0067844 MEASURING AND OPTIMIZING TEST RESOURCES AND TEST COVERAGE EFFECTIVENESS THROUGH RUN TIME CUSTOMER PROFILING AND...
Aspects of the present invention include a method, system and computer program product. The method includes a processor performing an accounting of available...
2018/0067843 MEASURING AND OPTIMIZING TEST RESOURCES AND TEST COVERAGE EFFECTIVENESS THROUGH RUN TIME CUSTOMER PROFILING AND...
Aspects of the present invention include a method, system and computer program product. The method includes a processor performing an accounting of available...
2018/0067842 APPLYING EYE TRACKERS MONITORING FOR EFFECTIVE EXPLORATORY USER INTERFACE TESTING
Embodiments are directed to analyzing eye tracking data collected from an end user to identify user attention and focus areas in user interface (UI)...
2018/0067841 METHOD AND APPARATUS FOR DETERMINING A PERFORMANCE IMPACT BY A SOFTWARE UPGRADE OF A MOBILE USER ENDPOINT DEVICE
A method and apparatus for determining the impact of a software upgrade on a service performance are disclosed. The method obtains call detail records...
2018/0067840 INSTRUCTION GENERATION
Generating instructions, in particular for mailbox verification in a simulation environment. A sequence of instructions is received, as well as selection data...
2018/0067839 USING WORKLOAD PROFILING AND ANALYTICS TO UNDERSTAND AND SCORE COMPLEXITY OF TEST ENVIRONMENTS AND WORKLOADS
Aspects of the present invention include a method, system and computer program product determining, scoring and reporting the complexity of customer and test...
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