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Patent # Description
2018/0075924 Liquid Crystal Display Device and Electronic Device Including the Same
A driver circuit includes first to third transistors, a first circuit, and a second circuit. In the first transistor, a first terminal is electrically...
2018/0075923 SHIFT REGISTER UNIT, GATE DRIVING CIRCUIT, DISPLAY PANEL AND DISPLAY DEVICE
A shift register unit, a gate drive circuit, a display panel and a display device are disclosed. The shift register unit combines a light emission signal...
2018/0075922 SEMICONDUCTOR DEVICE INCLUDING FUSE CIRCUIT
Disclosed here is a semiconductor device that comprises plurality of input nodes configured to be supplied with input signals, a decoder coupled to the input...
2018/0075921 WORD LINE VOLTAGE GENERATOR FOR PROGRAMMABLE MEMORY ARRAY
The present disclosure relates to a method of generating a high differential read current through a non-volatile memory, including receiving a voltage read...
2018/0075920 APPARATUSES AND METHODS FOR FLEXIBLE FUSE TRANSMISSION
Apparatuses and methods for transmitting fuse data from fuse arrays to latches are described. An example apparatus includes: a plurality of fuse arrays, each...
2018/0075919 Block Health Monitoring Using Threshold Voltage Of Dummy Memory Cells
Techniques are provided for measuring the endurance of a set of data memory cells by evaluating the threshold voltage (Vth) of associated dummy memory cells. A...
2018/0075918 NON-VOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
A memory device has a memory cell array with memory cells. A page buffer group generates page buffer signals according to a verify read result of the memory...
2018/0075917 SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM
A semiconductor memory device includes memory cells, a sense amplifier unit including a first latch circuit, and a control unit configured to execute read and...
2018/0075916 MEMORY DEVICE AND OPERATING METHOD THEREOF
Provided herein are a memory device and an operating method thereof. The memory device may include a plurality of memory blocks and one or more peripheral...
2018/0075915 HIGH VOLTAGE SWITCH CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME
Disclosed are a high voltage switch circuit and a semiconductor memory device including the same. The high voltage switching circuit includes: a control signal...
2018/0075914 Sense Amplifier With Bit Line Pre-Charge Circuit for Reading Flash Memory Cells In An Array
The present invention relates to an improved sense amplifier for reading values in flash memory cells in an array. In one embodiment, a sense amplifier...
2018/0075913 MEMORY DEVICES FOR READING MEMORY CELLS OF DIFFERENT MEMORY PLANES
Memory devices may include digital-to-analog converters configured to convert digital values to analog read voltages and to apply the analog read voltages to...
2018/0075912 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device includes first and second memory cell arrays, and first and second control circuits configured to execute an operation on the...
2018/0075911 STORAGE DEVICE AND METHOD FOR MANAGING STORAGE DEVICE
A storage device includes a plurality of flash memory cells, a controller which writes data into a memory cell which is used as the cell which stores data...
2018/0075910 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME
Provided herein are a semiconductor memory device and a method of operating the same. The semiconductor memory device includes a memory cell array including a...
2018/0075909 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME
A semiconductor memory device in accordance with an embodiment may include a memory cell array, a peripheral circuit, and a control circuit. The memory cell...
2018/0075908 SEMICONDUCTOR MEMORY DEVICE
According to one embodiment, a semiconductor memory device includes a stacked body including a first stacked region, and a first structure body. The first...
2018/0075907 Memory Cells, Memory Cell Arrays, Methods of Using and Methods of Making
A semiconductor memory cell and arrays of memory cells are provided In at least one embodiment, a memory cell includes a substrate having a top surface, the...
2018/0075906 PROGRAMMABLE RESISTIVE DEVICE AND MEMORY USING DIODE AS SELECTOR
Building programmable resistive devices in contact holes at the crossover of a plurality of conductor lines in more than two vertical layers is disclosed....
2018/0075905 ELECTRONIC DEVICE
Provided are, among others, memory circuits or devices and their applications in electronic devices or systems and various implementations of an electronic...
2018/0075904 MEMRISTIVE CROSSBAR ARRAY HAVING MULTI-SELECTOR MEMRISTOR CELLS
A memristive crossbar array is described. The crossbar array includes a number of row lines and a number of column lines intersecting the row lines to form a...
2018/0075903 SEMICONDUCTOR MEMORY DEVICE INCLUDING VARIABLE RESISTANCE ELEMENT
According to one embodiment, a variable resistance memory includes first to third insulating layers, first and second variable resistance layers, first and...
2018/0075902 SEMICONDUCTOR STORAGE DEVICE AND MEMORY SYSTEM
According to one embodiment, a semiconductor storage device includes a first memory cell capable of storing n-bit data (n is a natural number not less than 4)....
2018/0075901 PROVIDING CONTROLLED PULSES FOR QUANTUM COMPUTING
A quantum mechanical radio frequency (RF) signaling system includes a transmission line that receives and conducts an RF pulse signal operating at a radio...
2018/0075900 MEMORY DEVICE, DRIVING METHOD THEREOF, SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE
A memory device includes a memory cell, a replica cell, a read circuit, a write wordline, a read wordline, a dummy read wordline, a write bitline, a read...
2018/0075899 APPARATUSES AND METHODS FOR SHIFT DECISIONS
The present disclosure includes apparatuses and methods for shift decisions. An example apparatus includes a memory device. The memory device includes an array...
2018/0075898 A SYSTEM AND METHOD FOR MULTI-CYCLE WRITE LEVELING
A method and system for multi cycle write leveling are disclosed. At least three data patterns are written into consecutive address locations of a memory...
2018/0075897 MEMORY DEVICE
A memory device includes: a memory cell array including memory cells; a correction circuit which encodes write data and generates an error correction signal,...
2018/0075896 LOGIC GATE MODULE FOR PERFORMING LOGIC FUNCTIONS COMPRISING A MRAM CELL AND METHOD FOR OPERATING THE SAME
A logic gate module for performing logic functions including a MRAM cell including a magnetic tunnel junction comprising a sense layer, a storage layer, and a...
2018/0075895 MEMORY DEVICE
According to one embodiment, a memory device includes: a magnetoresistive element including first and second magnetic layers and a non-magnetic layer provided...
2018/0075894 SEMICONDUCTOR MEMORY DEVICE
According to one embodiment, a semiconductor memory device comprises a memory cell including a variable resistance element; and a first circuit configured to...
2018/0075893 SEMICONDUCTOR MEMORY DEVICE
According to one embodiment, a semiconductor memory device includes a first memory cell capable of storing one of first and second data, first and second lines...
2018/0075892 SEMICONDUCTOR MEMORY DEVICE
According to one embodiment, a semiconductor memory device comprises: first to fourth memory cells, each of which is configured to have a first resistance...
2018/0075891 Method for Sensing Memory Element Coupled to Selector Device
The present invention is directed to a method for sensing the resistance state of a memory cell that includes an MTJ memory element coupled to a two-terminal...
2018/0075890 MAGNETIC STORAGE DEVICE
According to an embodiment, a magnetic storage device includes a memory cell including a magnetoresistive effect element including a storage layer and a...
2018/0075889 MEMORY SYSTEM FOR ACCESS CONCENTRATION DECREASE MANAGEMENT AND ACCESS CONCENTRATION DECREASE METHOD
A memory cell array may include a normal cell array and a spare cell array, the normal cell array having a plurality of normal memory cells connected to normal...
2018/0075888 TECHNIQUES FOR PREVENTING TAMPERING WITH PROM SETTINGS
Techniques for preventing tampering with programmable read-only memory of an integrated circuit are provided. A method according to these techniques includes...
2018/0075887 EFFICIENT CALIBRATION OF MEMORY DEVICES
A system and method for efficient data eye training reduces the time and resources spent calibrating one or more memory devices. A temporal calibration...
2018/0075886 STORAGE DEVICE, METHOD FOR OPERATING STORAGE DEVICE, SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC...
A storage device capable of performing power gating is provided. A memory cell of the storage device includes a bistable circuit, a first transistor, a second...
2018/0075885 SEMICONDUCTOR DEVICE AND SYSTEM PERFORMING CALIBRATION OPERATION
A semiconductor device may include a calibration circuit and an output circuit. The calibration circuit may perform a calibration operation for setting a...
2018/0075884 SEMICONDUCTOR DEVICE AND MEMORY CONTROLLER RECEIVING DIFFERENTIAL SIGNAL
A semiconductor device receiving a differential data strobe signal and a method of operating the same are provided. The semiconductor device includes a...
2018/0075883 System and method for automatically displaying variable image content in an image product
A computer-implemented method for automatically displaying variable image content in an image product includes automatically obtaining markers in photos or...
2018/0075882 METHOD TO MARK AND EXPLOIT AT LEAST ONE SEQUENCE RECORD OF A VIDEO PRESENTATION
The present invention proposes a method to mark and exploit at least one sequence record of a video presentation played on a multimedia unit, said method...
2018/0075881 EDITING METHOD AND RECORDING AND REPRODUCING DEVICE
In order to provide a recording and reproducing device that allows a user to select and manage arbitrary play lists, a unit of management for managing all...
2018/0075880 VIDEO GENERATION DEVICE, VIDEO GENERATION PROGRAM, AND VIDEO GENERATION METHOD
It is an object of the invention to realize automatic video generation displaying in an easily understandable manner the state of brush stroke as effectively...
2018/0075879 Method, System, and Apparatus for Generating Video Content
The present inventive subject matter is drawn to method, system, and apparatus for generating video content related to an audio media asset. In one aspect of...
2018/0075878 Systems and Methods for Motion-Vector-Aided Video Interpolation Using Real-Time Smooth Video Playback Speed...
Systems and methods for encoding and playing back video at adjustable playback speeds by interpolating frames to achieve smooth playback in accordance with...
2018/0075877 SPEAKER SEGMENTATION AND CLUSTERING FOR VIDEO SUMMARIZATION
Techniques are provided for video summarization, based on speaker segmentation and clustering, to identify persons and scenes of interest. A methodology...
2018/0075876 SYSTEM AND METHOD FOR PROCESSING VIDEO CONTENT BASED ON EMOTIONAL STATE DETECTION
Various aspects of a system and a method for processing of a video content based on emotional state detection of one or more users are disclosed herein. The...
2018/0075875 METHODS FOR SERVING INTERACTIVE CONTENT TO A USER
One variation of a method for serving interactive content to a user includes, at a visual element inserted into a document accessed by a computing device:...
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