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Patent # Description
2018/0083135 SEMICONDUCTOR DEVICE HAVING AUXILIARY ELECTRODE FORMED IN FIELD PLATE REGION
A semiconductor device includes a source region disposed in a substrate and having a first conductivity type, a drain region disposed in the substrate and...
2018/0083134 BULK TO SILICON ON INSULATOR DEVICE
A method for forming a semiconductor device comprises forming a fin in a bulk semiconductor substrate and depositing a first insulator layer over portions of...
2018/0083133 NORMALLY-OFF, CUBIC PHASE GALLIUM NITRIDE (GAN) FIELD-EFFECT TRANSISTOR
A normally-off, heterojunction field effect transistor includes an intrinsic cubic-phase gallium nitride (c-GaN) substrate and an aluminum gallium nitride...
2018/0083132 Semiconductor Device
A semiconductor device includes a semiconductor body including a base region and two semiconductor mesas separated from each other by an insulated trench gate...
2018/0083131 SEMICONDUCTOR DEVICE
A semiconductor device includes a first semiconductor region of first conductivity type, a second semiconductor region of second conductivity type, a third...
2018/0083130 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes trench gate electrodes, an emitter coupling section that couples them with each other, an interlayer insulating film arranged...
2018/0083129 SEMICONDUCTOR DEVICE
A semiconductor device includes a first electrode, a first semiconductor region disposed on and electrically connected to the first electrode, a second...
2018/0083128 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
In some embodiments, according to one aspect, a semiconductor device includes a first semiconductor region of a first conductivity type that extends in a first...
2018/0083126 Method Of Junction Control For Lateral Bipolar Junction Transistor
A method of controlling formation of junctions in a lateral bipolar junction transistor comprises: providing a starting substrate comprising a bulk silicon...
2018/0083125 METHOD OF JUNCTION CONTROL FOR LATERAL BIPOLAR JUNCTION TRANSISTOR
A method of controlling formation of junctions in a lateral bipolar junction transistor comprises: providing a starting substrate comprising a bulk silicon...
2018/0083124 PARASITIC CAPACITANCE REDUCING CONTACT STRUCTURE IN A FINFET
In a fin-Field Effect Transistor (finFET), a recess is created at a location of a fin, the fin being coupled to a gate of the finFET, the recess extending into...
2018/0083123 METHOD FOR MANUFACTURING THIN FILM TRANSISTOR
A method for manufacturing a thin film transistor is provided. The method comprises depositing sequentially a gate insulating layer and a gate metal layer on a...
2018/0083122 FABRICATION OF STRAINED VERTICAL P-TYPE FIELD EFFECT TRANSISTORS BY BOTTOM CONDENSATION
A method of forming a strained vertical p-type field effect transistor, including forming a counter-doped layer at a surface of a substrate, forming a...
2018/0083121 METHODS OF FORMING BOTTOM AND TOP SOURCE/DRAIN REGIONS ON A VERTICAL TRANSISTOR DEVICE
One illustrative method disclosed herein includes, among other things, forming a vertically oriented channel semiconductor structure above a substrate,...
2018/0083120 SELF-ALIGNED SPACER FOR CUT-LAST TRANSISTOR FABRICATION
Methods of forming a semiconductor device include laterally etching a dummy gate to recess the dummy gate underneath a spacer layer, such that the spacer layer...
2018/0083119 FET device manufacturing using a modified Ion implantation method
A method for manufacturing a semiconductor device exhibiting improved short channel effects and increased current driving ability is disclosed. The method...
2018/0083118 NANOSHEET CHANNEL-TO-SOURCE AND DRAIN ISOLATION
A method and structures are used to fabricate a nanosheet semiconductor device. Nanosheet fins including nanosheet stacks including alternating silicon (Si)...
2018/0083117 REPLACEMENT METAL GATE STACK FOR DIFFUSION PREVENTION
A method of forming a semiconductor structure includes depositing a gate dielectric layer lining a recess of a gate structure formed on a substrate with a...
2018/0083116 STABLE WORK FUNCTION FOR NARROW-PITCH DEVICES
A work function setting metal stack includes a configuration of layers including a high dielectric constant layer and a diffusion prevention layer formed on...
2018/0083115 MIS CONTACT STRUCTURE WITH METAL OXIDE CONDUCTOR
An electrical contact structure (an MIS contact) includes one or more conductors (M-Layer), a semiconductor (S-Layer), and an interfacial dielectric layer...
2018/0083114 MASKLESS METHOD TO REDUCE SOURCE-DRAIN CONTACT RESISTANCE IN CMOS DEVICES
Various methods and semiconductor structures for fabricating an FET device having Nickel atoms implanted in a silicide metal film on a source-drain contact...
2018/0083113 FABRICATION OF NANO-SHEET TRANSISTORS WITH DIFFERENT THRESHOLD VOLTAGES
A method of forming two or more nano-sheet devices with varying electrical gate lengths, including, forming at least two cut-stacks including a plurality of...
2018/0083112 SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVING DEVICE, VEHICLE,...
A semiconductor device according to an embodiment includes a silicon carbide layer, an insulating layer, and a region provided between the silicon carbide...
2018/0083111 Semiconductor Device with First and Second Field Electrode Structures
A semiconductor device includes first and second field electrode structures that extend from a first surface into a semiconductor portion. The first field...
2018/0083110 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided...
2018/0083109 SEMICONDUCTOR DEVICE WITH EPITAXIAL SOURCE/DRAIN
A semiconductor device and method of manufacturing the semiconductor device are provided. In some embodiments, the semiconductor device includes a fin...
2018/0083108 NITROGEN-CONTAINING SEMICONDUCTOR DEVICE
A nitrogen-containing semiconductor device including a substrate, a first AlGaN buffer layer, a second AlGaN buffer layer and a semiconductor stacking layer is...
2018/0083107 Semiconductor Wafer and Method
In an embodiment, a method of planarising a surface includes applying a first layer to a surface including a protruding region such that the first layer covers...
2018/0083106 Semiconductor Structure Having Graded Transition Bodies
A semiconductor structure includes a substrate, a first graded transition body over the substrate a second transition body and a III-Nitride semiconductor...
2018/0083105 TUNED SEMICONDUCTOR AMPLIFIER
Methods and structures for improving the performance of integrated semiconductor transistors operating at high frequency and/or high power are described. Two...
2018/0083104 METHOD OF DOPED GERMANIUM FORMATION
Implementations described herein generally relate to methods and systems for depositing layer on substrates, and more specifically, to methods for forming...
2018/0083103 FinFETs with Strained Well Regions
A device includes a substrate and insulation regions over a portion of the substrate. A first semiconductor region is between the insulation regions and having...
2018/0083102 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device includes a conductive layer; a plurality of electrode layers stacked on the conductive layer; a semiconductor pillar extending...
2018/0083101 SEMICONDUCTOR DEVICE
A third dummy trench (11) is orthogonal to the first and second dummy trenches (9,10) in the dummy cell region of a substrate end portion. An interlayer...
2018/0083100 COMPOUND SEMICONDUCTOR DEVICE, METHOD FOR PRODUCING SAME, AND RESIN-SEALED TYPE SEMICONDUCTOR DEVICE
In a semiconductor element having a compound semiconductor layer epitaxially grown on a silicon substrate, an object is to suppress generation of deficiency or...
2018/0083099 SEMICONDUCTOR DEVICE INCLUDING AIR-GAP
A semiconductor device comprises a lower structure on a substrate and including a recess region, first and second barrier layers covering an inner surface of...
2018/0083098 RF DEVICE WITH REDUCED SUBSTRATE COUPLING
A substrate is provided with at least one etch stop layer to line a cavity after etching of the substrate. The cavity isolates the substrate from an active...
2018/0083097 Diode Structure of a Power Semiconductor Device
A power semiconductor device includes a semiconductor body coupled to first and second load terminals. The body includes: at least a diode structure configured...
2018/0083096 SUBSTRATE NOISE ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES
An example a semiconductor device includes a first circuit and a second circuit formed in a semiconductor substrate. The semiconductor device further includes...
2018/0083095 SEMICONDUCTOR DEVICE
A semiconductor device includes first, second, and gate electrodes. A first silicon carbide region of a first type is between the first and second electrodes...
2018/0083094 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
According to one embodiment, a semiconductor device includes first to sixth semiconductor regions, a first electrode, and a first insulating film. The first...
2018/0083093 NANOSHEET CAPACITOR
A capacitive device includes a first electrode comprising a nanosheet stack and a second electrode comprising a nanosheet stack, the second electrode arranged...
2018/0083092 NANOSHEET CAPACITOR
A capacitive device includes a first electrode comprising a nanosheet stack and a second electrode comprising a nanosheet stack, the second electrode arranged...
2018/0083091 ON-DIE CAPACITOR (ODC) STRUCTURE
An on-die-capacitor structure includes a first capacitor and a second capacitor. The first capacitor may have first and second terminals. The first and second...
2018/0083090 METAL RESISTOR STRUCTURES WITH NITROGEN CONTENT
Resistor elements and methods of forming the resistor elements generally include increasing resistivity by diffusing nitrogen ions from an underlying...
2018/0083089 SEMICONDUCTOR DEVICE RESISTOR STRUCTURE
A resistor body is separated from a doped well in a substrate by a resistor dielectric material layer. The doped well is defined by at least one doped region...
2018/0083088 DISPLAY DEVICE
A display device includes: a first substrate; a display area with a plurality of pixels on the first substrate; a pad portion adjacent to a first side of the...
2018/0083087 Organic Light Emitting Diode Display Device and Method for Manufacturing the Same
An OLED display device includes a display area of a substrate to display images; a non-display area surrounding the display area and applying signals to pixels...
2018/0083086 DISPLAY APPARATUS AND METHOD OF MANUFACTURING THEREOF, PACKAGE COVER PLATE
A display apparatus includes a display substrate, a package cover plate on the display substrate, and a plurality of FPCs; at one end of the FPC is a driver...
2018/0083085 LIGHT EMITTING DIODE DISPLAY DEVICE
The present disclosure relates to a light emitting diode display device, and a light emitting diode display device according to an exemplary embodiment...
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