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Patent # Description
2018/0090458 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package includes a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing...
2018/0090457 Semiconductor Device and Method of Manufacture
A semiconductor device has a top metal layer, a first passivation layer over the top metal layer, a first redistribution layer over the first passivation...
2018/0090456 SEMICONDUCTOR DEVICE
In a circuit substrate, a plurality of first microstrip lines connect outputs of a plurality of circuit patterns containing a parallel capacitor to a plurality...
2018/0090455 Semiconductor Device Including a LDMOS Transistor, Monolithic Microwave Integrated Circuit and Method
In an embodiment, a semiconductor device includes a semiconductor substrate including a front surface, an LDMOS transistor structure in the front surface, a...
2018/0090454 Methods and Apparatus for Scribe Street Probe Pads with Reduced Die Chipping During Wafer Dicing
An example apparatus includes a semiconductor wafer with a plurality of probe pads each formed centered in scribe streets and intersected by saw kerf lanes....
2018/0090453 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
According to one aspect of the present invention, a method of manufacturing a semiconductor device is provided, which includes a bonding step bonding a...
2018/0090452 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
There is provided a manufacturing method of a semiconductor device. The manufacturing method of the semiconductor device comprises: forming at least part of a...
2018/0090451 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
While strength of a wiring board in a semiconductor substrate is ensured, thermal conductivity is increased. A BGA includes a wiring board having an upper...
2018/0090450 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
According to one embodiment, the recess has a side surface and a bottom surface. The side surface is continuous with the major surface. The bottom surface is...
2018/0090449 INTEGRATED CIRCUIT PACKAGE, METHOD OF FABRICATING THE SAME, AND WEARABLE DEVICE INCLUDING INTEGRATED CIRCUIT...
An integrated circuit package includes at least one first chip mounted in a first region of a mounting surface of a printed circuit board, a molding unit...
2018/0090448 SEMICONDUCTOR PACKAGE AND METHOD FOR PREPARING SAME
A semiconductor package and a method for preparing the semiconductor package. The semiconductor package includes a substrate, a metal terminal which is formed...
2018/0090447 CONTACTS TO SEMICONDUCTOR SUBSTRATE AND METHODS OF FORMING SAME
An aspect of the invention includes a method for forming a contact in a dielectric layer over a semiconductor substrate. The method may comprise: forming a...
2018/0090446 MANUFACTURING METHOD OF NICKEL WIRING
There is provided a method for manufacturing Ni wiring. The method includes forming an Ni film on a surface of a substrate having a recess formed thereon by...
2018/0090445 INTEGRATED FAN-OUT PACKAGE
A method for fabricating an integrated fan-out package is provided. The method includes the following steps. A plurality of conductive posts are placed in...
2018/0090444 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an...
2018/0090442 CHIP-ON-FILM, FLEXIBLE DISPLAY PANEL AND DISPLAY DEVICE
The present disclosure provides a chip-on-film, a flexible display panel and a display device. The COF includes a plurality of output pads independent of each...
2018/0090441 POWER SEMICONDUCTOR MODULE
The present invention relates to a power semiconductor module, comprising at least two power semiconductor devices, wherein the at least two power ...
2018/0090440 POWER GRID LAYOUT DESIGNS FOR INTEGRATED CIRCUITS
Integrated circuit layouts are disclosed that include metal layers with metal tracks having separate metal sections along the metal tracks. The separate metal...
2018/0090439 HYBRID COPPER STRUCTURE FOR ADVANCE INTERCONNECT USAGE
The present disclosure, in some embodiments, relates to an integrated chip having a back-end-of-the-line interconnect stack. The integrated chip has a...
2018/0090438 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
According to some embodiments, a semiconductor device includes a substrate and an insulating film that is provided on the substrate. The device further...
2018/0090437 METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
A semiconductor integrated circuit device capable of stably forming a fuse element that is used to adjust the characteristics of the semiconductor integrated...
2018/0090436 NITRIDIZATION FOR SEMICONDUCTOR STRUCTURES
A method for fabricating a semiconductor structure includes the following steps. A substrate including a dielectric material is formed. A surface of the...
2018/0090435 CONTACT TRENCH BETWEEN STACKED SEMICONDUCTOR SUBSTRATES
A first semiconductor substrate layer supports a first transistor including a first source-drain formed by a doped region of the substrate layer. A second...
2018/0090434 BACKSIDE DEVICE CONTACT
A method for fabricating a backside device contact using a silicon-on-insulator substrate that includes a device layer, a buried insulator layer, and a handle...
2018/0090433 BACKSIDE DEVICE CONTACT
A method for fabricating a backside device contact using a silicon-on-insulator substrate that includes a device layer, a buried insulator layer, and a handle...
2018/0090432 BACKSIDE DEVICE CONTACT
A back-side device structure with a silicon-on-insulator substrate that includes: a first dielectric layer that includes a first via that communicates with a...
2018/0090431 SEMICONDUCTOR STRUCTURE
A semiconductor structure includes a substrate, a dielectric layer, a metal layer, and a tungsten layer. The dielectric layer is on the substrate and has a...
2018/0090430 PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
A semiconductor package includes a package substrate, the package substrate including a conductive plate, an insulating plate on the conductive plate, the...
2018/0090429 SEMICONDUCTOR DEVICE
A BGA 9 includes a wiring substrate 2, a semiconductor chip 1 fixed on the wiring substrate 2, a sealing body 4 that seals the semiconductor chip 1, and a...
2018/0090428 ASSEMBLY INCLUDING PLURAL THROUGH WAFER VIAS, METHOD OF COOLING THE ASSEMBLY AND METHOD OF FABRICATING THE ASSEMBLY
An assembly includes a chip including an integrated circuit, a casing including an integrated circuit and including an upper portion formed on a side of the...
2018/0090427 ASSEMBLY INCLUDING PLURAL THROUGH WAFER VIAS, METHOD OF COOLING THE ASSEMBLY AND METHOD OF FABRICATING THE ASSEMBLY
An assembly includes a chip including an integrated circuit, a casing including an integrated circuit including plural active elements and including an upper...
2018/0090426 CARRIER BASE MATERIAL-ADDED WIRING SUBSTRATE
A carrier base material-added wiring substrate includes a wiring substrate and a carrier base material. The wiring substrate includes an insulation layer, a...
2018/0090425 METHOD FOR FORMING SEMICONDUCTOR PACKAGE USING CARBON NANO MATERIAL IN MOLDING COMPOUND
A method of forming a semiconductor package includes growing a layer of carbon nano material on a chip. The chip has a first surface and a second surface and...
2018/0090424 SEMICONDUCTOR DEVICE, SYSTEM IN PACKAGE, AND SYSTEM IN PACKAGE FOR VEHICLE
The object is to suppress rupture of the soldering balls when an atmosphere varying from a high temperature to a low temperature is repeated. A semiconductor...
2018/0090423 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Reliability of a semiconductor device is improved. A method for manufacturing the semiconductor device includes the steps of: providing a lead frame having a...
2018/0090422 SEMICONDUCTOR DEVICE
A semiconductor device comprises a first metal lead frame portion with a chip mounting surface, a second metal lead frame portion, and a semiconductor chip...
2018/0090421 LONG-LASTING WETTABLE FLANKS
A method for plating package leads, in some embodiments, comprises: providing a package having a lead electrically coupled to a tie bar; singulating said lead;...
2018/0090420 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
An improvement is achieved in the performance of a semiconductor device. A second component mounting portion over which a first electronic component is mounted...
2018/0090419 LEADFRAME
A leadframe has a peripheral frame. A die attach pad (DAP) is positioned inwardly and downwardly of the peripheral frame. Two spaced apart parallel arms engage...
2018/0090418 AIR GAP AND AIR SPACER PINCH OFF
Embodiments are directed to a method of forming a semiconductor device and resulting structures having an air spacer between a gate and a contact by forming a...
2018/0090417 Fluid Routing Devices And Methods For Cooling Integrated Circuit Packages
A fluid routing device includes a fluid inlet, first vertical channels, a horizontal channel, a second vertical channel, and a fluid outlet. The first vertical...
2018/0090416 HEAT DISSIPATION COMPONENT AND TERMINAL DEVICE INCLUDING HEAT DISSIPATION COMPONENT
A heat dissipation component includes a plate that presses a heat receiving portion against a heat generating portion, and a heat pipe installed at a first...
2018/0090415 HEAT DISSIPATING APPARATUSES WITH PHASE CHANGE MATERIALS
Examples described herein include heat dissipating apparatuses with phase change material. In some examples, a heat dissipating apparatus comprises a wick...
2018/0090414 CERAMIC SUBSTRATE MANUFACTURING METHOD AND CERAMIC SUBSTRATE MANUFACTURED THEREBY
A ceramic substrate manufacturing method and a ceramic substrate manufactured thereby, may include a seed layer, a brazing filler layer, and a metal foil that...
2018/0090413 BONDED BODY, SUBSTRATE FOR POWER MODULE WITH HEAT SINK, HEAT SINK, METHOD FOR PRODUCING BONDED BODY, METHOD FOR...
A bonded body is provided in which an aluminum alloy member formed from an aluminum alloy, and a metal member formed from copper, nickel, or silver are bonded...
2018/0090412 SEMICONDUCTOR DEVICE
A power module includes: a ceramic substrate that includes a principal surface and a back surface, and is provided with a plurality of metal wirings on the...
2018/0090411 THERMAL INTERFACES FOR INTEGRATED CIRCUIT PACKAGES
A thermal interface may include a wired network made of a first TIM, and a second TIM surrounding the wired network. A heat spreader lid may include a wired...
2018/0090410 HEAT SINK FOR A SEMICONDUCTOR CHIP DEVICE
A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the...
2018/0090409 PACKAGING FOR FINGERPRINT SENSORS AND METHODS OF MANUFACTURE
A fingerprint sensor package, including a sensing side for sensing fingerprint information and a separate connection side for electrically connecting the...
2018/0090408 SEMICONDUCTOR PACKAGE ASSEMBLY
The invention provides a semiconductor package assembly. The semiconductor package assembly includes a core substrate formed of a first material having a...
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