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Patent # Description
2018/0097112 TRANSISTOR AND METHOD OF FORMING SAME
A first aspect of the invention provides for a transistor. The transistor may comprise: a gate stack on a substrate; a channel under the gate stack within the...
2018/0097111 SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME AND ELECTRONIC DEVICE INCLUDING THE DEVICE
There are provided a semiconductor device, a method of manufacturing the same, and an electronic device including the device. According to an embodiment, the...
2018/0097110 METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE
A method for manufacturing a semiconductor structure comprises the following steps. First, a recess is formed in a substrate. At least one wet cleaning process...
2018/0097109 SEMICONDUCTOR DEVICE
The present invention provides a semiconductor device, including a substrate, two gate structures disposed on a channel region of the substrate, an epitaxial...
2018/0097107 GATE CUT ON A VERTICAL FIELD EFFECT TRANSISTOR WITH A DEFINED-WIDTH INORGANIC MASK
A method of cutting a gate on a VFET includes depositing a memorization layer around a spacer on a sidewall of the field effect transistor. A planarizing layer...
2018/0097106 SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME AND ELECTRONIC DEVICE INCLUDING THE SAME
A semiconductor device, a method of manufacturing the same and an electronic device including the semiconductor device are provided. According to embodiments,...
2018/0097105 TRENCHMOS
A device is disclosed. The device comprises a substrate having an epitaxial layer of a first conductivity type, a deep trench of a first depth, a pillar region...
2018/0097104 HIGH-VOLTAGE METAL-OXIDE-SEMICONDUCTOR TRANSISTOR AND FABRICATION METHOD THEREOF
A high-voltage MOS transistor includes a semiconductor substrate, a gate oxide layer on the semiconductor substrate, a gate on the gate oxide layer, a spacer...
2018/0097103 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
A drift layer is made of a wide bandgap semiconductor. First well regions are formed on the drift layer. A source region is formed on each of the first well...
2018/0097102 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
Provided is a semiconductor device that is good in switching characteristics and high in breakdown voltage in off state. The geometry of a corner of a trench T...
2018/0097101 Power MOSFET Having Improved Manufacturability, Low On-Resistance and High Breakdown Voltage
Stripe-shaped surface transistor structures of a power MOSFET are disposed over an array of parallel-extending P type Buried Stripe-Shaped Charge Compensation...
2018/0097100 MANUFACTURE METHOD OF ARRAY SUBSTRATE
The present invention provides a manufacture method of an array substrate, comprising steps of: depositing an active layer including amorphous silicon on a...
2018/0097099 PIXEL STRUCTURE, ARRAY SUBSTRATE, LIQUID CRYSTAL DISPLAY PANEL AND PIXEL STRUCTURE MANUFACTURE METHOD
The present invention provides a pixel structure, an array substrate, a liquid crystal display panel and a pixel structure manufacture method. The pixel...
2018/0097098 METHOD FOR FABRICATING FINFET
The present invention provides a method of fabricating a FinFET, comprising the following steps: first, a substrate having a plurality of fin structures...
2018/0097097 FinFET Device and Method of Fabricating Same
An integrated circuit structure includes a semiconductor substrate, and isolation regions extending into the semiconductor substrate, wherein the isolation...
2018/0097096 SEMICONDUCTOR DEVICE
A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer provided on the first nitride semiconductor layer and...
2018/0097095 QUANTUM BOX DEVICE COMPRISING DOPANTS LOCATED IN A THIN SEMICONDUCTOR LAYER
Method of making a quantum device with a quantum island structure, comprising the formation of a stack comprising a first semiconducting layer based on an...
2018/0097094 SEMICONDUCTOR DEVICE
At a portion at which a gate trench is branched, the trench is formed at a deeper position than at portions of the gate trench having a linear shape. A...
2018/0097093 POWER SEMICONDUCTOR DEVICE
A power semiconductor device is disclosed. In one example, the device comprises a semiconductor body having a front side, a backside, a first load terminal,...
2018/0097092 HETEROJUNCTION BIPOLAR TRANSISTOR
An HBT includes a semiconductor substrate having first and second principal surfaces opposite each other; and a collector layer, a base layer, and an emitter...
2018/0097091 METHOD AND STRUCTURE FOR FORMING BULK FINFET WITH UNIFORM CHANNEL HEIGHT
A method of a forming semiconductor fin structures that includes forming a plurality of fin structures with a first etch to a first depth in a substrate. The...
2018/0097090 FIN FIELD-EFFCT TRANSISTOR
A method is provided for fabricating fin field-effect transistors. The method includes providing a substrate. The method also includes forming a plurality of...
2018/0097089 DEVICES AND METHODS OF FORMING UNMERGED EPITAXY FOR FINFET DEVICE
Devices and methods of growing unmerged epitaxy for fin field-effect transistor (FinFet) devices are provided. One method includes, for instance: obtaining a...
2018/0097088 NANOWIRE FET INCLUDING NANOWIRE CHANNEL SPACERS
A stacked nanowire field effect transistor (FET) including a plurality of vertically stacked nanowire channels. Each nanowire channel is vertically separated...
2018/0097087 ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY PANEL
The present invention provides an array substrate, a manufacturing method thereof and a display panel. The array substrate includes a substrate and an...
2018/0097086 REDUCED CAPACITANCE IN VERTICAL TRANSISTORS BY PREVENTING EXCESSIVE OVERLAP BETWEEN THE GATE AND THE SOURCE/DRAIN
Embodiments of the invention are directed to a vertical FET device having gate and source or drain features. The device includes a fin formed in a substrate...
2018/0097085 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A field effect transistor includes a channel layer made of a semiconductor and a metal gate structure. The metal gate structure includes a gate dielectric...
2018/0097084 SEMICONDUCTOR DEVICE INCLUDING TUNGSTEN GATE AND MANUFACTURING METHOD THEREOF
In a method of manufacturing a tungsten layer by an atomic layer deposition, a seed layer on an underlying layer is formed on a substrate by supplying a boron...
2018/0097083 SEMICONDUCTOR DEVICE FABRICATION METHOD AND SEMICONDUCTOR DEVICE
A method of fabricating a semiconductor device includes forming a first semiconductor region at a front surface of a substrate, the first semiconductor region...
2018/0097082 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
The present disclosure relates to the technical field of semiconductor processes and discloses a semiconductor device and a manufacturing method therefor. The...
2018/0097081 Doped Gate Dielectric Materials
A field effect transistor having at least a gate, source, and drain electrodes and a semiconductor channel for controlling transport of charge carriers between...
2018/0097080 SEMICONDUCTOR DEVICE
The present disclosure provides a semiconductor device including: a semiconductor substrate; a conductive film covering a front face of the semiconductor...
2018/0097079 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A MOS gate is provided on a front surface side of a silicon carbide substrate. The silicon carbide substrate includes silicon carbide layers sequentially...
2018/0097078 COMPOSITE MASKING SELF-ALIGNED TRENCH MOSFET
Aspects of the present disclosure discloses a method for fabricating a trench MOSFET device comprising simultaneously forming a narrow trench and a wide trench...
2018/0097077 UNIFORM VERTICAL FIELD EFFECT TRANSISTOR SPACERS
Aspects of the disclosure include a semiconductor structure that includes a vertical fin structure having a top portion, a bottom portion, vertical side walls,...
2018/0097076 FULLY DEPLETED SOI DEVICE FOR REDUCING PARASITIC BACK GATE CAPACITANCE
A method is presented for forming a semiconductor structure. The method includes forming a bilayer buried insulator over a substrate, forming an extremely thin...
2018/0097075 MANUFACTURING METHOD OF ARRAY SUBSTRATE AND LCD PANEL
The invention provides a manufacturing method of array substrate, wherein a light-shielding layer is disposed on the semiconductor layer, the light-shielding...
2018/0097074 SEMICONDUCTOR DEVICE COMPRISING A GRADUALLY INCREASING FIELD DIELECTRIC LAYER AND METHOD OF MANUFACTURING A...
A method of manufacturing a semiconductor device is providing, which includes forming a trench in a semiconductor substrate, forming an oxide layer over...
2018/0097073 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM INCLUDING SEMICONDUCTOR DEVICE
In a first aspect of a present inventive subject matter, a semiconductor device includes a semiconductor layer including a crystalline oxide semiconductor that...
2018/0097072 Group III-V Device Structure with Variable Impurity Concentration
A semiconductor structure includes a substrate, a transition body over the substrate, a group III-V intermediate body having a bottom surface over the...
2018/0097071 SEMICONDUCTOR DEVICE
There is provided a semiconductor device comprising a group III nitride semiconductor layer; a gate insulating film formed on the group III nitride...
2018/0097070 SEMICONDUCTOR DEVICE
A semiconductor device includes a channel layer formed over a substrate, a barrier layer formed on the channel layer and a gate electrode. A second gate...
2018/0097069 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A gate trench of a MOS gate formed in the front surface of a silicon carbide substrate includes a first portion that includes the bottom surface of the gate...
2018/0097068 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
The present disclosure relates to the technical field of semiconductor technologies and discloses a semiconductor device and a manufacturing method therefor....
2018/0097067 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
The present disclosure relates to the technical field of semiconductor processes, and discloses a semiconductor device and a manufacturing method therefor. The...
2018/0097066 Semiconductor structure having multiple-porous graphene layers and the fabrication method thereof
The present invention provides a semiconductor structure having a multiple-porous graphene layer, comprising a semiconductor substrate, a multiple-porous...
2018/0097065 SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME AND ELECTRONIC DEVICE INCLUDING THE DEVICE
There are provided a semiconductor device, a method of manufacturing the same, and an electronic device including the device. According to an embodiment, the...
2018/0097064 SEMICONDUCTOR DEVICE, SILICON WAFER AND METHOD OF MANUFACTURING A SILICON WAFER
A method of manufacturing a silicon wafer is provided that includes extracting an n-type silicon ingot over an extraction time period from the a silicon melt...
2018/0097063 VERTICAL SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
In a case where a semiconductor layer is epitaxially grown on a step shape formed due to CBL (current blocking layer) formation, the crystallinity of the...
2018/0097062 Array Substrate for Thin-Film Transistor and Display Device of the Same
A carbon allotrope and a display device including the same are disclosed. The thin-film transistor array substrate, comprising a substrate, a gate electrode on...
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