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Patent # Description
2018/0096959 SEMI-CONDUCTOR PACKAGE STRUCTURE
Disclosed is a semiconductor package structure comprising a body, a plurality of first-layer, second-layer, third-layer and fourth-layer electrical contacts,...
2018/0096958 METHOD FOR IMPROVING WIRE BONDING STRENGTH OF AN IMAGE SENSOR
A method for manufacturing a bond pad structure includes providing a substrate structure including a substrate, a first metal layer on the substrate, and a...
2018/0096957 ESD PROTECTION DEVICE AND METHOD FOR PRODUCING THE SAME
An ESD protection device includes an insulating ceramic body including a cavity, first and second discharge electrodes disposed so as to partially face each...
2018/0096956 ELECTROSTATIC PROTECTION STRUCTURE, ARRAY SUBSTRATE AND DISPLAY DEVICE
Disclosed are an electrostatic protection structure, array substrate and display device. The electrostatic protection structure includes a first electrostatic...
2018/0096955 ELECTRONIC COMPONENT GUARD RING
Guard ring technology is disclosed. In one example, an electronic component guard ring can include a barrier having a first barrier portion and a second...
2018/0096954 FRAGMENTING COMPUTER CHIPS
A method comprising bonding a first substrate to a second substrate. The first substrate includes a layer of one or more pairs of reactive material. The method...
2018/0096953 MOLDED LEAD FRAME DEVICE
A molded lead frame device includes a plurality of lead frame units and a molding layer. Each of the lead frame units includes an array of leads. Each of the...
2018/0096952 METHODS AND STRUCTURES FOR DICING INTEGRATED CIRCUITS FROM A WAFER
Dicing a semiconductor wafer into chips may include (and structures may result from) forming a lateral chip dicing pattern of vertical metal stack kerf (MSK)...
2018/0096951 CIRCUITS AND METHODS RELATED TO RADIO-FREQUENCY DEVICES WITH OVERMOLD STRUCTURE
A method for manufacturing packaged radio-frequency devices is disclosed, including providing a packaging substrate configured to receive a plurality of...
2018/0096950 RADIO-FREQUENCY DEVICE WITH DUAL-SIDED OVERMOLD STRUCTURE
A method for manufacturing packaged radio-frequency devices is disclosed, including providing a packaging substrate configured to receive a plurality of...
2018/0096949 DUAL-SIDED RADIO-FREQUENCY PACKAGE WITH OVERMOLD STRUCTURE
A packaged radio-frequency device is disclosed, including a packaging substrate configured to receive one or more components, the packaging substrate including...
2018/0096948 METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE
A method of manufacturing a semiconductor package includes: bonding a plurality of semiconductor chips to a plurality of mounting regions on a wiring board...
2018/0096947 SEMICONDUCTOR DEVICES WITH ALIGNMENT KEYS
A semiconductor device includes an alignment key on a substrate. The alignment key includes a first sub-alignment key pattern with a first conductive pattern,...
2018/0096946 SEMICONDUCTOR PACKAGES HAVING A FIDUCIAL MARKER AND METHODS FOR ALIGNING TOOLS RELATIVE TO THE FIDUCIAL MARKER
Electronic device package technology is disclosed. In one example, an electronic device includes a plurality of dies stacked on a substrate and a reference die...
2018/0096945 ADVANCED METAL INTERCONNECTS
A method of fabricating a metallization layer of a semiconductor device in which one or more interconnect structures are to be formed includes depositing a...
2018/0096944 SEMICONDUCTOR DEVICE
A semiconductor device includes a first semiconductor chip having a first surface with a semiconductor element and a second surface opposing the first surface....
2018/0096943 INTEGRATED FAN-OUT PACKAGE AND METHOD OF FABRICATING THE SAME
An integrated fan-out package including a die attach film, an integrated circuit component, an insulating encapsulation, and a redistribution circuit structure...
2018/0096942 INTEGRATED FAN-OUT PACKAGE AND METHOD OF FABRICATING THE SAME
An integrated fan-out package including a die attach film, an integrated circuit component, an insulating encapsulation, and a redistribution circuit structure...
2018/0096941 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package is provided. A semiconductor chip is disposed in a through hole of a first connection member. At least a portion of the...
2018/0096940 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package is provided. A semiconductor chip is disposed in a through hole of a first connection member. At least a portion of the...
2018/0096939 PACKAGE STRUCTURE WITH BUMP
A package structure is provided. The package structure includes a molding compound. The package structure also includes an integrated circuit chip having a...
2018/0096938 CIRCUIT BOARD WITH MULTIPLE DENSITY REGIONS
Various circuit boards and methods of fabricating and using the same are disclosed. In one aspect, a system is provided that includes a circuit board that has...
2018/0096937 SEMICONDUCTOR DEVICE
A semiconductor device includes a lead frame. One end portion of the lead frame is disposed outside a case, the other end portion of the lead frame is disposed...
2018/0096936 Dielectric Film For Semiconductor Fabrication
A method for semiconductor manufacturing is disclosed. The method includes receiving a device having a first surface through which a first metal or an oxide of...
2018/0096935 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
A semiconductor device and a method of manufacturing a semiconductor device, the device including gate structures on a substrate; source/drain layers on...
2018/0096934 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
A semiconductor device includes a substrate having an active region, a gate structure disposed on the active region, a source/drain region disposed in the...
2018/0096933 METHOD TO REDUCE RESISTANCE FOR A COPPER (CU) INTERCONNECT LANDING ON MULTILAYERED METAL CONTACTS, AND...
A method of forming a semiconductor structure includes forming a first insulating layer containing a first metal layer embedded therein and on a surface of a...
2018/0096932 METHODS OF FORMING METALLIZATION LINES ON INTEGRATED CIRCUIT PRODUCTS AND THE RESULTING PRODUCTS
One illustrative method disclosed includes, among other things, forming a layer of insulating material comprising a first insulating material above a substrate...
2018/0096931 INTERFACE STRUCTURES AND METHODS FOR FORMING SAME
A stacked and electrically interconnected structure is disclosed. The stacked structure can include a first element comprising a first contact pad and a second...
2018/0096930 MIDDLE-END-OF-LINE STRAP FOR STANDARD CELL
A method is disclosed that includes disposing a first conductive metal segment; disposing a second conductive metal segment over an active area; disposing a...
2018/0096929 SEMICONDUCTOR DEVICE AND DISPLAY DEVICE
Provided is a semiconductor device that includes: an integrated circuit (IC) chip including a terminal array that is a matrix of terminals arranged in at least...
2018/0096928 SEMICONDUCTOR PACKAGE AND FABRICATING METHOD THEREOF
A semiconductor device structure, for example a 3D structure, and a method for fabricating a semiconductor device. As non-limiting examples, various aspects of...
2018/0096927 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first...
2018/0096926 INTERCONNECTION SUBSTRATE AND SEMICONDUCTOR PACKAGE
An interconnection substrate includes a first insulating layer, and an interconnection structure formed on the first insulating layer, wherein the...
2018/0096925 SINGLE OR MULTI CHIP MODULE PACKAGE AND RELATED METHODS
Implementations of a semiconductor device package may include: a plurality of electrical contacts on a first face of a die, at least one clip electrically and...
2018/0096924 CHIP PACKAGES, CHIP ARRANGEMENTS, A CIRCUIT BOARD, AND METHODS FOR MANUFACTURING CHIP PACKAGES
A chip package is provided, the chip package including: a chip carrier; a chip disposed over and electrically connected to a chip carrier top side; an...
2018/0096923 TAPELESS LEADFRAME PACKAGE WITH UNDERSIDE RESIN AND SOLDER CONTACT
The present disclosure is directed to a semiconductor die on a tapeless leadframe and covered in encapsulant. The semiconductor package includes leads formed...
2018/0096922 SEMICONDUCTOR PACKAGE
A semiconductor package includes a die pad, a semiconductor die mounted on the die pad, rows of terminal leads disposed around the die pad; a surface mount...
2018/0096921 PACKAGE STRUCTURES
A package structure is provided. The package structure includes a leadframe including a plurality of connection portions; a device including a substrate, an...
2018/0096920 SEMICONDUCTOR DEVICE PACKAGE HAVING SOLDER-MOUNTED CONDUCTIVE CLIP ON LEADFRAME
A conductive clip for a semiconductor device package. In one example, the conductive clip may include a number of protrusions that extend from a surface of the...
2018/0096919 Chip carrier configured for delamination-free encapsulation and stable sintering
A chip carrier for carrying an electronic chip, wherein the chip carrier comprises a mounting section configured for mounting an electronic chip by sintering,...
2018/0096918 Lead And Lead Frame For Power Package
A power device includes a semiconductor chip provided over a substrate, and a patterned lead. The patterned lead includes a raised portion located between a...
2018/0096917 TEST SOCKET ASSEMBLY AND RELATED METHODS
A socket assembly including a housing that has one or more spring probes therein. The socket assembly further includes a leadframe assembly that has one or...
2018/0096916 REVERSIBLE SEMICONDUCTOR DIE
A semiconductor die has internal circuitry formed on two more internal layers, and die bonding pads arranged on a top surface of the die. The bonding pads are...
2018/0096915 SEMICONDUCTOR DEVICE
A first semiconductor device includes: a first wiring layer including a first interlayer insulating film, a first electrode pad, and a first dummy electrode,...
2018/0096914 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
In a method of manufacturing a semiconductor device, a thermal treatment is performed on a substrate, thereby forming a defect free layer in an upper layer of...
2018/0096913 Semiconductor Packages
A semiconductor package includes a package substrate including a fastening section at one end and a connecting terminal section at an opposite end, at least...
2018/0096912 Component Carrier Comprising at Least One Heat Pipe and Method for Producing Said Component Carrier
The invention refers to a component carrier comprising at least one heat pipe, wherein the at least one heat pipe has at least a largely cylindrical heat pipe...
2018/0096911 CASE AND ELECTRONIC DEVICE HAVING THE SAME
A case and an electronic device having the case are provided according to the present application. A fan is arranged on a case wall of the case, an air inlet...
2018/0096910 MOLDED RESIN-SEALED POWER SEMICONDUCTOR DEVICE
Freedom of layout is increased, and a small, low-priced molded resin-sealed power semiconductor device is obtained. A molded resin-sealed power semiconductor...
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