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Patent # Description
2018/0095948 ONTOLOGY DRIVEN DICTIONARY GENERATION AND AMBIGUITY RESOLUTION FOR NATURAL LANGUAGE PROCESSING
Natural language processing ambiguity resolution includes storing an ontological library specifying a set of grammatical rules associated with ontological...
2018/0095947 AUTOMATIC GENERATION OF CONTEXT AND SUGGESTIONS FOR CONTEXT DEPENDENT QUESTIONS
A method and system are provided for assisting users in a conversation. The method includes identifying concepts in the conversation. The method further...
2018/0095946 INTELLIGENT SYSTEM THAT DYNAMICALLY IMPROVES ITS KNOWLEDGE AND CODE-BASE FOR NATURAL LANGUAGE UNDERSTANDING
Systems, methods, and apparatuses are presented for a novel natural language tokenizer and tagger. In some embodiments, a method for tokenizing text for...
2018/0095945 METHODS AND SYSTEMS FOR CREATING NEW PRESENTATIONS USING EXISTING PRESENTATIONS
A methods and system for creating a presentation is disclosed. The method includes gathering presentation requirements and configuration settings associated...
2018/0095944 Systems and Methods for Creating User-Managed Online Pages (MAPpages) Linked to Locations on an Interactive...
Systems and methods are used to enable creating, searching, and managing user-managed online pages (e.g., MAPpages) linked to locations on an interactive...
2018/0095943 SYSTEMS AND METHODS FOR SHARING USER GENERATED SLIDE OBJECTS OVER A NETWORK
In one embodiment, a method includes, in response to an address match in connection with a request for a target structured document, identifying one or more...
2018/0095942 Object Interaction Preservation from Design to Digital Publication
Object interaction preservation from design to digital publication is described. In example embodiments, a design includes overlapping objects with object...
2018/0095941 TECHNIQUES FOR VIEW CAPTURE AND STORAGE FOR MOBILE APPLICATIONS
Techniques are disclosed for capturing, storing, and regenerating a view of content in applications (e.g., native applications) on devices (e.g., a mobile...
2018/0095940 SYSTEMS AND METHODS FOR CHAT MESSAGE MANAGEMENT AND DOCUMENT GENERATION ON DEVICES
Systems and methods described herein are directed to implementations that facilitate individuals to collect, store, and automatically extract procedural...
2018/0095939 DISTRIBUTED COMPUTING ON DOCUMENT FORMATS
According to one embodiment of the present invention, a system includes at least one processor. The system partitions a document into a plurality of data...
2018/0095938 SYNCHRONIZED CALENDAR AND TIMELINE ADAPTIVE USER INTERFACE
A system, computer-readable medium, and computer-implemented method, including receiving first temporal information relating to one or more calendar events,...
2018/0095937 Automatic Data Processing System, Automatic Data Processing Method, and Automatic Data Analysis System
An automatic data processing system includes a reception section, a data type determination section, a measurement scale determination section, and a data...
2018/0095936 OPTIMIZING A MANUFACTURING OR FABRICATION PROCESS USING AN INTEGRATED BAYESIAN STATISTICS AND CONTINUUM MODEL...
A method, system and computer program product for optimizing a manufacturing or fabrication process. A set of parameters for a selected model is received. A...
2018/0095935 BINARY VECTOR FACTORIZATION
There is disclosed in an example, a processor, having: decode circuitry to decode instructions from an instruction stream; a data cache unit including...
2018/0095934 COMPUTER ARCHITECTURE WITH A HARDWARE ACCUMULATOR RESET
A processor with an accumulator. An event is selected to produce one or more selected events. A reset signal to the accumulator is generated responsive to the...
2018/0095933 METHOD AND APPARATUS FOR TRANSFORMING DATA
A data transformation apparatus selects items one by one and generates a first weight dataset and a second weight dataset on the basis of similarity between...
2018/0095932 MULTI-LEVEL LOOPS FOR COMPUTER PROCESSOR CONTROL
In an embodiment, a processor includes processing cores, and a central control unit to: concurrently execute an outer control loop and an inner control loop,...
2018/0095931 METHOD, APPARATUS, AND COMPUTER-READABLE MEDIUM FOR PARALLELIZATION OF A COMPUTER PROGRAM ON A PLURALITY OF...
An apparatus, computer-readable medium, and computer-implemented method for parallelization of a computer program on a plurality of computing cores includes...
2018/0095930 Field-Programmable Crossbar Array For Reconfigurable Computing
For decades, advances in electronics were directly related to the scaling of CMOS transistors according to Moore's law. However, both the CMOS scaling and the...
2018/0095929 SCRATCHPAD MEMORY WITH BANK TILING FOR LOCALIZED AND RANDOM DATA ACCESS
An apparatus for localized and random data access is described herein. The apparatus includes a multi-bank memory, a queue, and an output buffer. The...
2018/0095928 MOBILE COMPUTING DEVICE AND METHOD OF TRANSMITTING DATA THEREFROM
A mobile computing device is provided. The device includes a first port having a pinout configuration that is configured to support at least one data format, a...
2018/0095927 HIGH PERFORMANCE INTERCONNECT PHYSICAL LAYER
A serial data link is to be adapted during initialization of the link. Adaptation of the link is to include receiving a pseudorandom binary sequence (PRBS)...
2018/0095926 CONTROL PATH TO ENABLE AT LEAST ONE OF TWO DATA PATHS FOR A NETWORK DEVICE
Methods and systems that provide for a control path to enable at least one of the two data paths for a network device (e.g., a modem) are provided. An example...
2018/0095925 VOLTAGE MODULATED CONTROL LANE
A computing component is provided with physical layer logic to receive data on a physical link including a plurality of lanes, where the data is received from...
2018/0095924 CONTROLLING DATA STORAGE DEVICES ACROSS MULTIPLE SERVERS
A system includes multiple servers, each server including a host bus adapter (HBA) and multiple data storage devices. The system further includes a controller...
2018/0095923 LINK-PHYSICAL LAYER INTERFACE ADAPTER
An interface adapter to identify a first ready signal from a first link layer-to-physical layer (LL-PHY) interface of a first communication protocol indicating...
2018/0095922 SYSTEMS AND TECHNIQUES FOR INTELLIGENTLY SWITCHING BETWEEN MULTIPLE SOURCES OF UNIVERSAL SERIAL BUS SIGNALS
Various embodiments concern techniques for intelligently switching between multiple sources of USB signals. More specifically, user devices are described that...
2018/0095921 FRAME FORMAT FOR A SERIAL INTERFACE
An integrated circuit includes a transmitting circuit configured to be coupled to a physical serial interface having a bit width. The transmitting circuit is...
2018/0095919 DATA CHANNEL ALLOCATION
Examples disclosed herein relate to data channel allocation. An example includes an apparatus, including a resource to connect to a controller in a first state...
2018/0095918 UNIVERSAL SERIAL BUS EMULATION LAYER
A universal serial bus stack may use an emulation layer to grant a non-universal serial bus device access to universal serial bus drivers and applications. The...
2018/0095917 INPUT/OUTPUT PORT ROTATION IN A STORAGE AREA NETWORK DEVICE
In one aspect of the present description, in an input/output (I/O) device having multiple CPUs and multiple I/O ports, a cycle of I/O port rotations is...
2018/0095916 FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATION
An integrated circuit device includes a transmitter circuit operable to transmit a timing signal over a first wire to a DRAM. The DRAM receives a first signal...
2018/0095915 ENABLING USE OF NON-VOLATILE MEDIA - EXPRESS (NVME) OVER A NETWORK
Enabling a protocol for efficiently and reliably using the NVME protocol over a network, referred to as NVME over Network, or NVMEoN, may include an NVMEoN...
2018/0095914 APPLICATION DIRECT ACCESS TO SATA DRIVE
A networked database management system (DBMS) and supporting infrastructure is disclosed. At least one application in the disclose DBMS can directly access a...
2018/0095913 GENERATION OF PROCESSOR INTERRUPTS USING AVERAGED DATA
In an embodiment, a processor includes at least one execution unit to execute instructions, and an interrupt generation unit. The interrupt generation unit may...
2018/0095912 DATA POLLING USING A CHAIN SLEEP TECHNIQUE
Examples of data polling using a chain sleep technique are disclosed. In one example, a computer-implemented method includes: computing a least common...
2018/0095911 NON-VOLATILE STORAGE SYSTEM AND DATA STORAGE ACCESS PROTOCOL FOR NON-VOLATILE STORAGE DEVICES
A non-volatile storage system includes: a host and a storage device. The host includes a submission queue memory, a completion queue memory, and a read/write...
2018/0095910 PRESERVING DETERMINISTIC EARLY VALID ACROSS A CLOCK DOMAIN CROSSING
A clock domain crossing can occur earlier in time by detection of when a data signal will coincide with a TSV (time slot valid) signal but the valid signal...
2018/0095909 EXTENDED PLATFORM WITH ADDITIONAL MEMORY MODULE SLOTS PER CPU SOCKET AND CONFIGURED FOR INCREASED PERFORMANCE
Electronic devices and methods including a printed circuit board configured to accept CPUs and memory modules are described. One apparatus includes a printed...
2018/0095908 MEMORY MODULE WITH TIMING-CONTROLLED DATA PATHS IN DISTRIBUTED DATA BUFFERS
A memory module is operable in a memory system with a memory controller. The memory module comprises memory devices, a module control circuit, and a plurality...
2018/0095907 Frame Reception Monitoring Method in Serial Communications
The present disclosure relates to a frame reception monitoring method, including: when a plurality of sub-frames constituting a frame is each entered into a...
2018/0095906 HARDWARE-BASED SHARED DATA COHERENCY
Apparatuses, systems, and methods for coherently sharing data across a multi-node network is described. A coherency protocol for such data sharing can include...
2018/0095905 PRE-TRANSMISSION DATA REORDERING FOR A SERIAL INTERFACE
A serial communication system includes a transmitting circuit for serially transmitting data via a serial communication link including N channels where N is an...
2018/0095904 MASKING STORAGE DEVICE PRESENCE
An example method to hide a presence of a storage device is provided herein. The method masks the presence of the storage device using a microcontroller that...
2018/0095903 KEY-BASED DATA SECURITY MANAGEMENT
Embodiments of the present invention provide an approach for memory protection at a level of granularity above a "page" level (e.g., enhancing the protection...
2018/0095902 ENFORCING MEMORY OPERAND TYPES USING PROTECTION KEYS
Enforcing memory operand types using protection keys is generally described herein. A processor system to provide sandbox execution support for protection key...
2018/0095901 ACCESS OF VIRTUAL MACHINES TO STORAGE AREA NETWORKS
A method for managing access of virtual machines executed by a host computer system to storage area networks, the storage area networks connecting the host...
2018/0095900 MULTI-DEVICE SYSTEM
One embodiment provides an apparatus. The apparatus includes an input output memory management unit (I/O MMU), a non-secure operating system (OS) driver, a...
2018/0095899 MULTI-CRYPTO-COLOR-GROUP VM/ENCLAVE MEMORY INTEGRITY METHOD AND APPARATUS
Embodiments of apparatus, method, and storage medium associated with MCCG memory integrity for securing/protecting memory content/data of VM or enclave are...
2018/0095898 MULTI-TENANT ENCRYPTION FOR STORAGE CLASS MEMORY
Various embodiments are generally directed to the providing for mutual authentication and secure distributed processing of multi-party data. In particular, an...
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