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Patent # Description
2018/0095796 MANAGING A SET OF ASSETS FOR A USER IN A SHARED POOL OF CONFIGURABLE COMPUTING RESOURCES
Disclosed aspects include managing a set of assets for a user in a shared pool of configurable computing resources. The shared pool of configurable computing...
2018/0095795 METHOD AND SYSTEM FOR PREEMPTIBLE COPROCESSING
Methods, computer program products, and systems supporting preemptible coprocessing are disclosed. The method includes executing at least a portion of a first...
2018/0095794 Efficient Load-Balancing Method and System for Tree-Based Applications
In a system having multiple parallel processors, a process to enhance performance of tree based applications by balancing the processing load amongst all...
2018/0095793 METHODS AND APPARATUS TO SCHEDULE OPERATIONS FOR RESOURCE SHARING IN COMPUTING SYSTEMS
Methods and apparatus to schedule operations in computing systems are disclosed. An example method includes determining, by executing an instruction with a...
2018/0095792 MULTI-CORE SYSTEM INCLUDING HETEROGENEOUS PROCESSOR CORES WITH DIFFERENT INSTRUCTION SET ARCHITECTURES
A multi-core system includes a plurality of heterogeneous processor cores with different/distinct instruction set architectures, a task scheduler, and a...
2018/0095791 TIME FRAME BOUNDED EXECUTION OF COMPUTATIONAL ALGORITHMS
A present invention embodiment manages resources of a distributed system to perform computational tasks within a specified time interval. A received object is...
2018/0095790 SCHEDULING JOBS FOR PROCESSING LOG FILES USING A DATABASE SYSTEM
Disclosed are some examples of systems, methods, apparatus and computer program products for scheduling jobs to process log files. In some implementations, a...
2018/0095789 METHOD AND SYSTEM FOR SCHEDULING INPUT/OUTPUT RESOURCES OF A VIRTUAL MACHINE
One embodiment provides a system for scheduling I/O resources of a virtual machine. During operation, in response to receiving a plurality of I/O requests, the...
2018/0095788 SCHEDULING OPERATIONS FOR A STORAGE DEVICE
A request to perform an operation at a storage device of a storage array may be received. Schedulable units of the storage device may be identified. An...
2018/0095787 SEAMLESS SDN-SUPPORTED RAN-APP MIGRATION
A method for performing centralized radio access network (CRAN) process migration, wherein the CRAN comprises a number of remote radio access points and a...
2018/0095786 PARALLEL PROCESSING USING MEMORY MAPPING
Techniques are disclosed for processing records using virtual memory mapping. An input file is virtually divided into a fragments based on memory mapping....
2018/0095785 Thread Priority Mechanism
A processing apparatus is described. The apparatus includes a graphics processing unit (GPU), including a thread dispatcher to assign a priority class to each...
2018/0095784 PROCESSOR COMPRISING A PLURALITY OF COMPUTATION CORES
A processor including computation groups, each computation group including computation cores, the processor being capable of simultaneously implementing a...
2018/0095783 PERSISTENT TICKET OPERATION
In one example in accordance with the present disclosure, a method may include performing a transactional operation such that if one step of the transactional...
2018/0095782 COMPUTING SYSTEM INCLUDING INDEPENDENT COUPLING FACILITIES MAINTAINING EQUIVALENCY BASED ON SEQUENCE VALUES
A computing system is configured to maintain equivalency of independent queues located in different coupling facilities. The computer system includes a first...
2018/0095781 COMPUTING SYSTEM INCLUDING ENHANCED APPLICATION PERFORMANCE BASED ON LAST COMPLETED OPERATION SEQUENCE VALUE
A computing system includes an application configured to request execution of at least one translation including at least one command. A first coupling...
2018/0095780 DYNAMICALLY DEPLOYED VIRTUAL MACHINE
A virtual machine data handling system includes a data handling system, a hypervisor, and a dynamically deployed virtual machine. The data handling system...
2018/0095779 MODEL-BASED VIRTUAL SYSTEM PROVISIONING
Model-based virtual system provisioning includes accessing a model of a workload to be installed on a virtual machine of a system as well as a model of the...
2018/0095778 SYSTEMS AND METHODS FOR METRIC DRIVEN DEPLOYMENTS TO CLOUD SERVICE PROVIDERS
Systems and methods are shown for providing metric driven deployments to cloud server services that are adapted to interface with each provider. In some...
2018/0095777 VIRTUAL MACHINE PROVISIONING ENGINE
Embodiments described herein extend to methods, systems, and computer program products for setting up, configuring, and customizing one or more virtual...
2018/0095776 RESOURCE BASED VIRTUAL COMPUTING INSTANCE SCHEDULING
Examples provide two-tiered scheduling within a cluster. A coarse-grained analysis is performed on a candidate set of hosts to select a host for a virtual...
2018/0095775 ONLINE PROMOTE DISK USING MIRROR DRIVER
One or more embodiments provide techniques for promoting a linked clone virtual machine to a full clone virtual machine. In one embodiment, a method includes...
2018/0095774 VIRTUAL MACHINES CONTROLLING SEPARATE SUBSETS OF PROGRAMMABLE HARDWARE
In a multi-tenant environment, separate virtual machines can be used for configuring and operating different subsets of programmable integrated circuits, such...
2018/0095773 State Extractor For Middlebox Management System
A method of automatically identifying state information in different middlebox programs first identifies relevant program portions by expanding outward from a...
2018/0095772 METHOD AND APPARATUS FOR AUTOMATIC PROCESSING OF SERVICE REQUESTS ON AN ELECTRONIC DEVICE
Embodiments of the present application provides methods and apparatus capable of recording operation/display events on a mobile device used to fulfill a...
2018/0095771 Remote Provisioning of Hosts in Public Clouds
Examples provide for automatically provisioning hosts in a cloud environment. A cloud daemon generates a cloud host-state configuration, for a given cloud...
2018/0095770 SECURE STORAGE DEVICES, WITH PHYSICAL INPUT DEVICE, FOR SECURE CONFIGURATION IN A CONFIGURATION-READY MODE
A secure storage device includes a physical key input device, a secure memory and a controller. The controller arbitrates access by a host to securely...
2018/0095768 CLOCK-GATING FOR MULTICYCLE INSTRUCTIONS
A system and a method of clock-gating for multicycle instructions are provided. For example, the method includes enabling a plurality of logic blocks that...
2018/0095767 CLOCK-GATING FOR MULTICYCLE INSTRUCTIONS
A system and a method of clock-gating for multicycle instructions are provided. For example, the method includes enabling a plurality of logic blocks that...
2018/0095766 FLUSHING IN A PARALLELIZED PROCESSOR
A method includes, in a processor having a pipeline, fetching instructions of program code at run-time, in an order that is different from an...
2018/0095765 SUPPORTING BINARY TRANSLATION ALIAS DETECTION IN AN OUT-OF-ORDER PROCESSOR
In one implementation, a processing device is provided that includes a memory to store instructions and a processor core to execute the instructions. The...
2018/0095764 CONTROL FLOW INTEGRITY
One embodiment provides an apparatus. The apparatus includes collector circuitry to capture processor trace (PT) data from a PT driver. The PT data includes a...
2018/0095763 SELECTIVELY BLOCKING BRANCH INSTRUCTION PREDICTION
Embodiments relate to selectively blocking branch instruction predictions. An aspect includes computer implemented method for performing selective branch...
2018/0095762 SELECTIVELY BLOCKING BRANCH INSTRUCTION PREDICTION
Embodiments relate to selectively blocking branch instruction predictions. An aspect includes a computer system for performing selective branch prediction. The...
2018/0095761 FUSED ADJACENT MEMORY STORES
A processing device includes a store instruction identification unit to identify a pair of store instructions among a plurality of instructions in an...
2018/0095760 INSTRUCTION SET FOR VARIABLE LENGTH INTEGER CODING
Instruction sets for variable length integer (varint) coding and associated methods and apparatus. The instructions sets include instructions for encoding and...
2018/0095759 SUSPENDABLE LOAD ADDRESS TRACKING INSIDE TRANSACTIONS
Suspendable load address tracking inside transactions is disclosed. An example processing device of implementations of the disclosure includes a transactional...
2018/0095758 SYSTEMS AND METHODS FOR EXECUTING A FUSED MULTIPLY-ADD INSTRUCTION FOR COMPLEX NUMBERS
Disclosed embodiments relate to executing a vector-complex fused multiply-add Instruction. In one example, a method includes fetching an instruction, a format...
2018/0095757 DECIMAL LOAD IMMEDIATE INSTRUCTION
An instruction generates a value for use in processing within a computing environment. The instruction obtains a sign control associated with the instruction,...
2018/0095756 PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO LOAD MULTIPLE DATA ELEMENTS TO DESTINATION STORAGE LOCATIONS...
A processor of an aspect includes a plurality of packed data registers, and a decode unit to decode an instruction. The instruction is to indicate a packed...
2018/0095755 DECIMAL LOAD IMMEDIATE INSTRUCTION
An instruction generates a value for use in processing within a computing environment. The instruction obtains a sign control associated with the instruction,...
2018/0095754 GRAPHICS PROCESSING APPARATUS AND METHOD OF EXECUTING INSTRUCTIONS
A graphics processing apparatus and a method of executing instructions are disclosed where the method of executing an instruction includes receiving...
2018/0095753 PIPELINED PROCESSOR WITH MULTI-ISSUE MICROCODE UNIT HAVING LOCAL BRANCH DECODER
A processor has an execution pipeline that executes microinstructions and an instruction translator that translates architectural instructions into the...
2018/0095752 INSTRUCTION PREDECODING
An apparatus comprises processing circuitry, an instruction cache, decoding circuitry to decode program instructions fetched from the cache to generate...
2018/0095751 PLACEMENT OF A CALCULATION TASK ON A FUNCTIONALLY ASYMMETRIC PROCESSOR
A method for managing a calculation task on a functionally asymmetric multicore processor, at least one core of the processor associated with one or more...
2018/0095750 HARDWARE ACCELERATORS AND METHODS FOR OFFLOAD OPERATIONS
Methods and apparatuses relating to offload operations are described. In one embodiment, a hardware processor includes a core to execute a thread and offload...
2018/0095749 PROCESSING DENORMAL NUMBERS IN FMA HARDWARE
A microprocessor includes FMA execution logic that determines whether to accumulate an accumulator operand C to the partial products of multiplier and...
2018/0095748 MULTIPLY-ACCUMULATE WITH VOLTAGE TRACKING MODULATION
An example device may include multiply-accumulate circuitry and voltage-tracking modulator circuitry. The multiply-accumulate circuitry may be to increase and...
2018/0095747 METHOD FOR MANAGING AN UPDATE OF A MICROCODE WITHIN A PROCESSING UNIT
Microcode is stored in a program memory and intended to be executed by a central processing unit of a processing unit. The processing unit may include a memory...
2018/0095746 SCALABLE TRANSITIVE VIOLATION MATCHING
Methods for reducing storage and performing static analysis on violations across code base revisions are disclosed. An example method begins with receiving a...
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