Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
2018/0102304 ELECTRONIC MODULE AND METHOD FOR ENCAPSULATION THEREOF
An electronic module of a control device of a vehicle includes at least one interconnect device, with electronic structural elements as the control unit, and...
2018/0102303 SUBSTRATE FOR POWER MODULE, COLLECTIVE SUBSTRATE FOR POWER MODULES, AND METHOD FOR MANUFACTURING SUBSTRATE FOR...
A power module substrate allows prompt heat dissipation from a semiconductor device and avoids separation of a ceramic plate and a copper plate at their joint...
2018/0102302 Chip carrier with electrically conductive layer extending beyond thermally conductive dielectric sheet
A chip carrier which comprises a thermally conductive and electrically insulating sheet, a first electrically conductive structure on a first main surface of...
2018/0102301 DOUBLE-SIDE COOLING TYPE POWER MODULE AND PRODUCING METHOD THEREOF
Disclosed herein are a double-side cooling type power module and a producing method thereof. The double-side cooling type power module includes a pair of...
2018/0102300 Connectable Package Extender for Semiconductor Device Package
A semiconductor packaging system includes a semiconductor device package having a semiconductor chip with two or more terminals and a protective structure...
2018/0102299 Underfill Control Structures and Method
A semiconductor device and method of reducing the risk of underbump metallization poisoning from the application of underfill material is provided. In an...
2018/0102298 SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate, a body structure and an electronic component. The body structure is disposed above the substrate and includes a...
2018/0102297 FAN-OUT SEMICONDUCTOR PACKAGE AND PHOTOSENSITIVE RESIN COMPOSITION
A fan-out semiconductor package includes: a semiconductor chip having an active surface with connection pads disposed thereon and an inactive surface opposing...
2018/0102296 SUBSTRATE
The present invention relates to a substrate comprising a build-up and a solder resist layer disposed on the build-up. The solder resist layer has an upper...
2018/0102295 Semiconductor Device Structure With 110-PFET and 111-NFET Current Flow Direction
A FinFET comprises a hybrid substrate having a top wafer of (100) silicon, a handle wafer of (110) silicon, and a buried oxide layer between the top wafer and...
2018/0102294 INTEGRATED CIRCUIT WITH REPLACEMENT GATE STACKS AND METHOD OF FORMING SAME
A first aspect of the invention provides for a method including: forming an interfacial layer in a first opening in a pFET region and a second opening in an...
2018/0102293 INTEGRATED CIRCUIT DEVICE AND METHOD OF FABRICATING THE SAME
An integrated circuit device includes: a first fin-type active region in a first area of a substrate, the first fin-type active region having a first recess...
2018/0102292 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes an isolation layer disposed over a substrate, first and second fin structures, a gate structure, a source/drain structure and a...
2018/0102291 METHOD AND SYSTEM FOR CONSTRUCTING FINFET DEVICES HAVING A SUPER STEEP RETROGRADE WELL
Generally, the present disclosure is directed to a method for forming a FinFET device that may be used in designs that include both tight and relaxed fin...
2018/0102290 STRESS MEMORIZATION TECHNIQUE FOR STRAIN COUPLING ENHANCEMENT IN BULK FINFET DEVICE
A method for forming strained fins includes etching trenches in a bulk substrate to form fins, filling the trenches with a dielectric fill and recessing the...
2018/0102289 TUNABLE CURRENT RATIO IN A CURRENT MIRROR
Methods for designing and fabricating a current mirror. A first layout is received for a first back-end-of-line (BEOL) stack that is coupled with an emitter of...
2018/0102287 LEADFRAME-LESS SURFACE MOUNT SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor die having a top surface with bond pads formed thereon, electrical connection elements each having a first end...
2018/0102286 SYSTEMS AND METHODS FOR PRODUCING FLAT SURFACES IN INTERCONNECT STRUCTURES
In interconnect fabrication (e.g. a damascene process), a barrier layer (possibly conductive) is formed over a substrate with holes, a conductor is formed over...
2018/0102285 METHODS OF FABRICATING A SEMICONDUCTOR DEVICE HAVING A VIA STRUCTURE AND AN INTERCONNECTION STRUCTURE
Methods of fabricating a semiconductor device include forming a lower interlayer insulating layer and a conductive base structure, and forming a middle...
2018/0102284 ORGANOMETALLIC PRECURSORS, METHODS OF FORMING A LAYER USING THE SAME AND METHODS OF MANUFACTURING SEMICONDUCTOR...
An organometallic precursor includes tungsten as a central metal and a cyclopentadienyl ligand bonded to the central metal. A first structure including an...
2018/0102283 INTERCONNECTION STRUCTURE AND MANUFACTURING METHOD THEREOF
An interconnection structure includes a first dielectric layer, a bottom conductive feature present in the first dielectric layer, a second dielectric layer...
2018/0102282 MEANS TO DECOUPLE THE DIFFUSION AND SOLUBILITY SWITCH MECHANISMS OF PHOTORESISTS
Embodiments of the invention include photoresist materials and methods of patterning photoresist materials. In an embodiment a photoresist material comprises a...
2018/0102281 INTERLEVEL CONNECTORS IN MULTILEVEL CIRCUITRY, AND METHOD FOR FORMING THE SAME
Multilevel circuitry such as a a 3D memory array, has a set of contact regions arranged around a perimeter of a multilevel region, in which connection is made...
2018/0102280 Methods for Fabricating Semiconductor Devices Including Surface Treatment Processes
Methods for fabricating semiconductor devices may provide enhanced performance and reliability by recovering quality of a low-k insulating film damaged by a...
2018/0102279 METHODS OF FORMING AN INTERCONNECT STRUCTURE
A method of forming an interconnect structure is provided. The method includes forming a first dielectric layer, and forming an opening in the first dielectric...
2018/0102278 MECHANISMS FOR FORMING FINFETS WITH DIFFERENT FIN HEIGHTS
A semiconductor device is provided. The semiconductor device includes a doped isolation structure formed above a substrate, and the doped isolation structure...
2018/0102277 DIFFERENT SHALLOW TRENCH ISOLATION FILL IN FIN AND NON-FIN REGIONS OF FINFET
A fin field effect transistor (finFET) and a method of fabricating the finFET. The method includes forming one or more fins above a substrate in a channel...
2018/0102276 SELECTIVE DEPOSITION TO FORM AIR GAPS
A method for depositing a film to form an air gap within a semiconductor device is disclosed. An exemplary method comprises pulsing a metal halide precursor...
2018/0102275 PROTECTIVE COVER FOR ELECTROSTATIC CHUCK
A protective cover for an electrostatic chuck may include a conductive wafer and a plasma resistant ceramic layer on at least one surface of the conductive...
2018/0102274 SUPPORT RING WITH MASKED EDGE
A support ring for semiconductor processing is provided. The support ring includes a ring shaped body defined by an inner edge and an outer edge. The inner...
2018/0102273 SEMICONDUCTOR DEVICE RELEASE DURING PICK AND PLACE OPERATIONS, AND ASSOCIATED SYSTEMS AND METHODS
Systems and methods for releasing semiconductor devices during pick and place operations are disclosed. A representative system for handling semiconductor dies...
2018/0102272 METHOD OF PROVIDING AN ELECTRONIC DEVICE AND ELECTRONIC DEVICE THEREOF
Some embodiments include a method. The method can include: providing a carrier substrate; providing a bond promoting layer over the carrier substrate; and...
2018/0102271 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
The present invention provides a manufacturing technique of a semiconductor device and a display device using a peeling process, in which a transfer process...
2018/0102270 Apparatus and Method for Semiconductor Wafer Leveling, Force Balancing and Contact Sensing
A wafer bonder apparatus, includes a lower chuck, an upper chuck, a process chamber and three adjustment mechanisms. The three adjustment mechanisms are...
2018/0102269 VERTICAL FIXING TRANSMISSION BOX AND TRANSMISSION METHOD USING THE SAME
A vertical fixing transmission box used for transmitting a container is disclosed. The transmission box includes a carrier substrate and an elastic component,...
2018/0102268 PROCESSING APPARATUS
Disclosed herein is a processing apparatus including a wafer testing unit for testing whether or not a wafer carried from a cassette mount unit is a wafer...
2018/0102267 TEMPERATURE CONTROLLING APPARATUS, TEMPERATURE CONTROLLING METHOD, AND PLACING TABLE
Provided is a temperature controlling apparatus in which the accuracy of the temperature control of a processing target substrate is maintained high even when...
2018/0102266 SEAL FOR WAFER PROCESSING ASSEMBLY
A seal having a cross-sectional profile that includes a first lobe, a second lobe, and a corner having an angle between 45 and 90 degrees, inclusive, a first...
2018/0102265 Hot plate with programmable array of lift devices for multi-bake process optimization
Embodiments of systems and methods for substrate thermal processing using a hot plate with a programmable array of lift devices for multi-bake process...
2018/0102264 THERMAL TREATMENT SYSTEM WITH COLLECTOR DEVICE
A thermal treatment system includes a chamber capable of receiving a plurality of substrates, a gas intake path in a distal portion of the chamber located...
2018/0102263 APPARATUS AND METHOD FOR TREATING SUBSTRATE
Provided are an apparatus and method for treating a substrate. Specifically, provided are an apparatus and method for treating a substrate through a...
2018/0102262 Method of Manufacturing a Semiconductor Power Package
A method of manufacturing a semiconductor power package includes: providing a pre-molded chip housing and an electrically conducting chip carrier cast-in-place...
2018/0102261 CHIP PACKAGING STRUCTURE AND CHIP PACKAGING METHOD
A chip packaging structure includes: at least one package, each of the at least one package comprising at least one chip; and an expansion body wrapping the...
2018/0102260 METHODS OF FORMING A SILICON LAYER, METHODS OF FORMING PATTERNS, AND METHODS OF MANUFACTURING SEMICONDUCTOR...
A method of forming a pattern includes forming an etch target layer on a substrate, forming sacrificial patterns on the etch target layer, the sacrificial...
2018/0102259 COBALT-CONTAINING MATERIAL REMOVAL
Methods are described herein for etching cobalt films which are difficult to volatize. The methods include exposing a cobalt film to a bromine or ...
2018/0102258 SEMICONDUCTOR DEVICE AND FORMATION THEREOF
A semiconductor device and method of formation are provided. The semiconductor device includes a first active region adjacent a channel, the channel, and a...
2018/0102257 METHOD FOR SELECTIVELY ETCHING SILICON OXIDE WITH RESPECT TO AN ORGANIC MASK
A method for selectively etching trenches in a silicon oxide containing layer with an organic planarization layer is provided. Processing the silicon oxide...
2018/0102256 SELECTIVE SiN LATERAL RECESS
Exemplary methods for laterally etching silicon nitride may include flowing a fluorine-containing precursor and an oxygen-containing precursor into a remote...
2018/0102255 SELECTIVE SiN LATERAL RECESS
Exemplary methods for laterally etching silicon nitride may include flowing a fluorine-containing precursor and an oxygen-containing precursor into a remote...
2018/0102254 Method of Wet Etching and Method of Fabricating Semiconductor Device Using the Same
Disclosed are a method of wet etching and a method of fabricating a semiconductor device. The wet etching method includes providing a wafer in a process bath...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.