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Patent # Description
2018/0130790 Electrostatic Discharge (ESD) Protection for the Metal Oxide Medical Device Products
An ESD circuit includes a first metal oxide channel device having a drain coupled to a first node, a source coupled to a second node, and a gate coupled to the...
2018/0130789 INTEGRATED TRANSISTOR AND PROTECTION DIODE AND FABRICATION METHOD
Disclosed examples provide integrated circuits including a source down transistor with a gate, a body region, an n-type source region, an n-type drain region,...
2018/0130788 ELECTRONIC DEVICE, IN PARTICULAR FOR PROTECTION AGAINST OVERVOLTAGES
An electronic device is formed by a sequence of at least two thyristors coupled in series in a same conduction direction. Each thyristor has a gate of a first...
2018/0130787 MEMORY CIRCUIT LAYOUT
A memory circuit layout design includes first, second, third, and fourth memory cell regions abutting one another and corresponding to respective first,...
2018/0130786 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes a first active pattern extending in a first direction on a first region and a second region of a substrate, a first dummy gate...
2018/0130785 SEMICONDUCTOR DEVICE INCLUDING A REPEATER/BUFFER AT UPPER METAL ROUTING LAYERS AND METHODS OF MANUFACTURING THE...
A semiconductor device includes a series of metal routing layers and a complementary pair of planar field-effect transistors (FETs) on an upper metal routing...
2018/0130784 ELECTRONIC SYSTEM HAVING INCREASED COUPLING BY USING HORIZONTAL AND VERTICAL COMMUNICATION CHANNELS
An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on...
2018/0130783 ELECTRONICS PACKAGE HAVING A MULTI-THICKNESS CONDUCTOR LAYER AND METHOD OF MANUFACTURING THEREOF
An electronics package includes an insulating substrate, a first electrical component coupled to a first surface of the insulating substrate, and a first...
2018/0130782 STACKED SEMICONDUCTOR PACKAGE
Provided is a stacked semiconductor package, which has various kinds of semiconductor chips with various sizes and is capable of miniaturization. The stacked...
2018/0130781 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
A semiconductor package includes a package substrate having an upper surface and a lower surface and including a plurality of substrate pads formed on the...
2018/0130780 INTERPOSER TRANSMISSION LINE USING MULTIPLE METAL LAYERS
An interposer includes transmission lines formed of multiple metal layers disposed in a stack orthogonal to a plane formed by a primary surface of a substrate...
2018/0130779 METHOD OF FORMING AN ARRAY OF A MULTI-DEVICE UNIT CELL
Backplane-side bonding structures including a common metal are formed on a backplane. Multiple source coupons are provided such that each source coupon...
2018/0130778 HIGH-FREQUENCY MODULE
A high-frequency module includes a wiring substrate, a high-frequency circuit including circuit components disposed on the upper surface of the wiring...
2018/0130777 SEMICONDUCTOR LIGHT-EMITTING DEVICE
A semiconductor light emitting device (A) includes an elongated substrate (1) formed with a through-hole (11), a first, a second and a third semiconductor...
2018/0130776 LIGHT EMITTING DEVICE
A light emitting device includes: a first light emitting element configured to emit light of a first peak wavelength; a second light emitting element...
2018/0130775 LED-BASED LIGHT SOURCES FOR LIGHT EMITTING DEVICES AND LIGHTING ARRANGEMENTS WITH PHOTOLUMINESCENCE WAVELENGTH...
An LED-based light source for generating light having a selected dominant wavelength .lamda..sub.ds comprises a package housing a plurality of LEDs consisting...
2018/0130774 PACKAGE STACK STRUCTURE
A package stack structure is provided, including a first substrate, a second substrate stacked on the first substrate, and an encapsulant formed between the...
2018/0130773 SEMICONDUCTOR DIE ASSEMBLIES HAVING MOLDED UNDERFILL STRUCTURES AND RELATED TECHNOLOGY
A semiconductor die assembly in accordance with an embodiment of the present technology includes first and second semiconductor dies and a package substrate...
2018/0130772 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A method of manufacturing a semiconductor structure includes providing a substrate including a redistribution layer (RDL) disposed over the substrate,...
2018/0130771 PACKAGE SUBSTRATE AND ITS FABRICATION METHOD
This disclosure provides a package substrate and its fabrication method. The package substrate includes: a dielectric body; a first circuit device disposed in...
2018/0130770 ELECTRONICS PACKAGE HAVING A MULTI-THICKNESS CONDUCTOR LAYER AND METHOD OF MANUFACTURING THEREOF
An electronics package includes an insulating substrate and electrical components coupled to a first surface of the insulating substrate. A multi-thickness...
2018/0130769 Substrate Based Fan-Out Wafer Level Packaging
A method and apparatus for manufacturing substrate based fan-out wafer level packaging is provided. The method includes providing a substrate, applying a first...
2018/0130768 Substrate Based Fan-Out Wafer Level Packaging
A method and apparatus for manufacturing substrate based fan-out wafer level packaging is provided. The method includes providing a substrate, applying a first...
2018/0130767 METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH SIDEWALL RECESS AND RELATED DEVICES
A method is for making a semiconductor device. The method may include providing a lead frame having a recess, forming a sacrificial material in the recess of...
2018/0130766 Adhesive with Self-Connecting Interconnects
An adhesive with self-connecting interconnects is provided. The adhesive layer provides automatic 3D joining of microelectronic components with a conductively...
2018/0130765 METHOD FOR BONDING SEMICONDUCTOR CHIPS TO A LANDING WAFER
A method for bonding chips to a landing wafer is disclosed. In one aspect, a volume of alignment liquid is dispensed on a wettable surface of the chip so as to...
2018/0130764 HIGH-FREQUENCY CIRCUIT
A high-frequency circuit includes: a first substrate; a transmission line formed on the first substrate and having first and second output portions branched...
2018/0130763 BONDING WIRE FOR SEMICONDUCTOR DEVICE
A bonding wire for a semiconductor device, characterized in that the bonding wire includes a Cu alloy core material and a Pd coating layer formed on a surface...
2018/0130762 STACKED ELECTRONICS PACKAGE AND METHOD OF MANUFACTURING THEREOF
An electronics package includes an insulating substrate, a first electrical component coupled to a bottom surface of the insulating substrate, and a first...
2018/0130760 CHIP PACKAGE AND CHIP PACKAGING METHOD
According to an embodiment of the present disclosure, a chip package including at least one chip, a first encapsulation layer, a redistribution layer, and a...
2018/0130759 SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR MANUFACTURING PROCESS
A semiconductor package includes a semiconductor substrate structure, a semiconductor die and an encapsulant. The semiconductor substrate structure includes a...
2018/0130758 SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
The present disclosure provides a semiconductor package device comprising: (1) a substrate comprising a first area and a second area; (2) a semiconductor...
2018/0130757 FOLDING THIN SYSTEMS
A foldable microelectronic assembly and a method for forming the same are provided. One or more packages comprising encapsulated microelectronic elements are...
2018/0130756 SEMICONDUCTOR DEVICE STRUCTURE
A semiconductor device structure is provided. The semiconductor device structure includes a first device. The semiconductor device structure includes a...
2018/0130755 SYSTEMS AND METHODS FOR PROVIDING ELECTROMAGNETIC INTERFERENCE (EMI) COMPARTMENT SHIELDING FOR COMPONENTS...
A compartment EMI shield is provided that is suitable for use in system module packages having thin form factors and/or smaller widths and/or lengths. The...
2018/0130754 VISUAL IDENTIFICATION OF SEMICONDUCTOR DIES
Systems and methods for visual identification of semiconductor dies are described. In some embodiments, a method may include: receiving a semiconductor wafer...
2018/0130753 SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate including a plurality of chip areas and a scribe line defined thereon, and a mark pattern disposed in the scribe...
2018/0130752 Schemes for Forming Barrier Layers for Copper in Interconnect Structures
A method of forming a semiconductor structure includes providing a substrate; forming a low-k dielectric layer over the substrate; embedding a conductive...
2018/0130751 INTERCONNECTION STRUCTURES AND METHODS FOR TRANSFER-PRINTED INTEGRATED CIRCUIT ELEMENTS WITH IMPROVED...
An electronic component array includes a backplane substrate, and a plurality of integrated circuit elements on the backplane substrate. Each of the integrated...
2018/0130750 IMAGE SENSOR DEVICE AND IMAGE SENSOR MODULE COMPRISING THE SAME
The present disclosure relates to an image sensor device including: a fan-out semiconductor package including a first semiconductor chip having an active...
2018/0130749 PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
Package structures and methods for forming the same are provided. A method for forming a package structure includes providing a carrier substrate. The method...
2018/0130748 SEMICONDUCTOR DEVICE
A semiconductor device includes an assembly configured such that a plurality of semiconductor modules is connected by a component. Each of the plurality of...
2018/0130747 STACKED ELECTRONICS PACKAGE AND METHOD OF MANUFACTURING THEREOF
An electronics package includes an insulating substrate, a first electrical component coupled to a top surface of the insulating substrate, and a second...
2018/0130746 ACTIVE CHIP ON CARRIER OR LAMINATED CHIP HAVING MICROELECTRONIC ELEMENT EMBEDDED THEREIN
A structure including a first semiconductor chip with front and rear surfaces and a cavity in the rear surface. A second semiconductor chip is mounted within...
2018/0130745 PACKAGE SUBSTRATE AND ITS FABRICATION METHOD
This disclosure provides a package substrate and its fabrication method. The package substrate includes: a molding compound body; a first circuit device...
2018/0130744 SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME
The present disclosure provides a semiconductor structure, including a first silicon layer having a through silicon via (TSV), a III-V structure over the first...
2018/0130743 SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC APPARATUS
A semiconductor device includes a wiring layer that includes at least one low-dielectric rate interlayer insulating film layer; a guard ring that is formed by...
2018/0130742 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE HAVING A PATTERNED METAL LAYER EMBEDDED IN AN INTERLAYER DIELECTRIC...
A method for fabricating semiconductor device first includes providing a substrate and a shallow trench isolation (STI) in the substrate, in which the...
2018/0130741 Electrical Fuse Structure and Method of Formation
An exemplary method includes forming a fuse structure and forming a first cathode connector and a second cathode connector over the fuse structure. The fuse...
2018/0130740 INTEGRATED CIRCUIT COMPRISING AN ANTIFUSE STRUCTURE AND METHOD OF REALIZING
An integrated circuit includes a substrate; an interconnect portion disposed over the substrate, the interconnect portion comprising multiple metallization...
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