Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
2018/0130739 WIRING WITH EXTERNAL TERMINAL
Apparatuses for providing external terminals of a semiconductor device are described. An example apparatus includes: a pad formation area including a plurality...
2018/0130738 APPARATUSES INCLUDING STAIR-STEP STRUCTURES AND METHODS OF FORMING THE SAME
Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material,...
2018/0130737 SEMICONDUCTOR MEMORY DEVICE
Provided herein is a semiconductor memory device. The semiconductor memory device may include channel layers protruding away from a substrate. The...
2018/0130736 TRACE/VIA HYBRID STRUCTURE AND METHOD OF MANUFACTURE
A method of forming an interconnect that includes providing a sacrificial trace structure using an additive forming method. The sacrificial trace structure...
2018/0130735 TRACE/VIA HYBRID STRUCTURE AND METHOD OF MANUFACTURE
A method of forming an interconnect that includes providing a sacrificial trace structure using an additive forming method. The sacrificial trace structure...
2018/0130734 TRACE/VIA HYBRID STRUCTURE WITH THERMALLY AND ELECTRICALLY CONDUCTIVE SUPPORT MATERIAL FOR INCREASED THERMAL...
A method of forming an interconnect that includes providing a sacrificial trace structure using an additive forming method and forming a continuous seed metal...
2018/0130733 SEPARATION OF INTEGRATED CIRCUIT STRUCTURE FROM ADJACENT CHIP
Embodiments of the present disclosure relate to separating an integrated circuit (IC) structure from an adjacent chip. An IC structure according to embodiments...
2018/0130732 ELECTRONICS PACKAGE HAVING A MULTI-THICKNESS CONDUCTOR LAYER AND METHOD OF MANUFACTURING THEREOF
An electronics package includes an insulating substrate and an electrical component coupled to a first surface of the insulating substrate. A first conductor...
2018/0130731 ELECTRONICS PACKAGE HAVING A MULTI-THICKNESS CONDUCTOR LAYER AND METHOD OF MANUFACTURING THEREOF
An electronics package includes an insulating substrate, an electrical component coupled to a first surface of the insulating substrate, and a stepped...
2018/0130730 METHOD FOR FORMING SEMICONDUCTOR PACKAGE
A method of fabricating semiconductor packages includes providing an interposer layer having a first surface and a second surface opposite to the first...
2018/0130729 IC PACKAGE
An IC package having a semiconductor body that includes a monolithically integrated circuit and at least two metallic contact surfaces. The integrated circuit...
2018/0130728 SILICON SUBSTRATE PROCESSING METHOD, ELEMENT EMBEDDED SUBSTRATE, AND CHANNEL FORMING SUBSTRATE
A silicon substrate processing method includes forming an etching mask which has an opening portion, on a surface of a silicon substrate, forming an etching...
2018/0130727 FABRICATION METHOD OF ELECTRONIC PACKAGE
A method for fabricating an electronic package is provided, which includes the steps of: providing an insulating layer having at least an electronic element...
2018/0130726 CASCODE SEMICONDUCTOR PACKAGE AND RELATED METHODS
A semiconductor package includes an electrically conductive base (base) having a source connector. A drain connector and a gate connector are electrically...
2018/0130725 SEMICONDUCTOR DEVICE
[Object] A semiconductor device is configured to release heat from semiconductor chips more efficiently. [Means for Solution] A semiconductor device includes:...
2018/0130724 SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MOUNTING STRUCTURE
A semiconductor device includes a plurality of die pad sections, a plurality of semiconductor chips, each of which is arranged in each of the die pad sections,...
2018/0130723 LEADFRAME SUBSTRATE WITH ELECTRONIC COMPONENT INCORPORATED THEREIN AND SEMICONDUCTOR ASSEMBLY USING THE SAME
The leadframe substrate includes a routing circuitry disposed on a compound layer and electrically connects an electronic component encapsulated in the...
2018/0130722 SEMICONDUCTOR PACKAGE WITH GROUNDED FENCE TO INHIBIT DENDRITES OF DIE-ATTACH MATERIALS
The present disclosure relates to a semiconductor package with at least one grounded fence to inhibit dendrites of die-attach materials. The semiconductor...
2018/0130721 STACKED COOLER
A stacked cooler includes flow pipes that are stacked, each of the flow pipes having a flat shape and including a medium passage in which a heat medium flows,...
2018/0130720 Substrate Based Fan-Out Wafer Level Packaging
A method and apparatus for manufacturing substrate based fan-out wafer level packaging is provided. The method includes providing a substrate, applying a first...
2018/0130719 SEMICONDUCTOR DEVICE PACKAGES AND METHOD OF MANUFACTURING THE SAME
A semiconductor device package includes a carrier, a lid, an electronic component and a sealant. The carrier has a first surface and a second surface opposite...
2018/0130718 SEMICONDUCTOR ELEMENT PACKAGE, SEMICONDUCTOR DEVICE, AND MOUNTING STRUCTURE
A semiconductor element package includes a base body, a frame member, and a terminal member. The frame member is provided on a main surface of the base body. A...
2018/0130717 INTEGRATED CIRCUITS PROTECTED BY SUBSTRATES WITH CAVITIES, AND METHODS OF MANUFACTURE
Dies (110) with integrated circuits are attached to a wiring substrate (120), possibly an interposer, and are protected by a protective substrate (410)...
2018/0130716 ELECTRONIC ELEMENT MOUNTING SUBSTRATE, AND ELECTRONIC DEVICE
An electronic element mounting substrate includes a base body, an electrode, and a pad. The base body has a frame shape, and includes a first frame section and...
2018/0130715 ION IMPLANTATION METHODS AND STRUCTURES THEREOF
A method for fabricating a semiconductor device using a high-temperature ion implantation process includes providing a substrate including a plurality of fins....
2018/0130714 PATTERN INSPECTION METHODS AND METHODS OF FABRICATING RETICLES USING THE SAME
A reticle may be fabricated and inspected. The reticle, which may include thin patterns, may be selectively incorporated into a fabricated semiconductor device...
2018/0130713 SEMICONDUCTOR DEVICES
A semiconductor device includes a first semiconductor pattern doped with first impurities on a substrate, a first channel pattern on the first semiconductor...
2018/0130712 SPACER DEFINED FIN GROWTH AND DIFFERENTIAL FIN WIDTH
Methods for forming fins with a straight profile by preventing fin bending during STI fill and annealing are disclosed. Embodiments include providing STI...
2018/0130711 SEMICONDUCTOR FIN LOOP FOR USE WITH DIFFUSION BREAK
A finFET includes a source or a drain including: a first semiconductor fin extending parallel to a second semiconductor fin, and a semiconductor connector fin...
2018/0130710 FIN FIELD-EFFECT TRANSISTOR AND FABRICATION METHOD THEREOF
Fin field-effect transistors (FinFETs) and fabrication methods thereof are provided. An exemplary fabrication method includes providing a base substrate having...
2018/0130709 METHOD OF PROCESSING WAFER
A wafer processing method includes a protective member laying step of placing a protective member on a face side of a wafer, a reverse side grinding step of...
2018/0130708 METHOD FOR FULLY SELF-ALIGNED VIA FORMATION USING A DIRECTED SELF ASSEMBLY (DSA) PROCESS
A formed back-end-of-line (BEOL) metal line layer may include a plurality of metal lines with dielectric oxide caps that are disposed in between each metal...
2018/0130707 BOTTOM-UP FILL (BUF) OF METAL FEATURES FOR SEMICONDUCTOR STRUCTURES
Bottom-up fill approaches for forming metal features of semiconductor structures, and the resulting structures, are described. In an example, a semiconductor...
2018/0130706 COBALT DEPOSITION SELECTIVITY ON COPPER AND DIELECTRICS
A process for forming cobalt on a substrate, comprising: volatilizing a cobalt precursor of the disclosure, to form, a precursor vapor: and contacting the...
2018/0130705 Delayed Via Formation in Electronic Devices
Embodiments are related to systems and methods for forming vias in a substrate, and more particularly to systems and methods for forming vias in a substrate...
2018/0130704 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
Semiconductor devices and fabrication methods thereof are provided. An exemplary fabrication method includes providing a base substrate; forming gate...
2018/0130703 STRUCTURE AND METHOD FOR CAPPING COBALT CONTACTS
A process for forming a conductive structure includes the formation of a self-aligned silicide cap over a cobalt-based contact. The silicide cap is formed in...
2018/0130702 ENCAPSULATION OF COBALT METALLIZATION
Structures that include cobalt metallization and methods of forming such structures. A feature is located inside an opening in a dielectric layer and a cap...
2018/0130701 METHOD OF PROCESSING A SUBSTRATE AND A DEVICE MANUFACTURED BY USING THE METHOD
A method of processing a substrate by omitting a photolithographic process is disclosed. The method includes forming at least one layer on a stepped structure...
2018/0130700 STAIR STEP FORMATION USING AT LEAST TWO MASKS
Apparatuses and methods for stair step formation using at least two masks, such as in a memory device, are provided. One example method can include forming a...
2018/0130699 SKIP VIA STRUCTURES
The present disclosure relates to semiconductor structures and, more particularly, to skip via structures and methods of manufacture. The structure includes: a...
2018/0130698 METHOD OF FABRICATION OF A SEMICONDUCTOR ELEMENT COMPRISING A HIGHLY RESISTIVE SUBSTRATE
A method of fabrication of a semiconductor element includes a step of rapid heat treatment in which a substrate comprising a base having a resistivity greater...
2018/0130697 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
A semiconductor device includes a first insulating interlayer on a first region of a substrate and a second insulating interlayer on a second region of the...
2018/0130696 WAFER POSITIONING PEDESTAL FOR SEMICONDUCTOR PROCESSING
An assembly used in a process chamber for depositing a film on a wafer and including a pedestal extending from a central axis. An actuator is configured for...
2018/0130695 SUBSTRATE PROCESSING APPARATUS
In a substrate processing apparatus, a shield plate includes a first chucking magnetic material (441). The shield plate is moved up and down by a chamber...
2018/0130694 MAGNETICALLY LEVITATED AND ROTATED CHUCK FOR PROCESSING MICROELECTRONIC SUBSTRATES IN A PROCESS CHAMBER
Cleaning systems and methods for semiconductor fabrication use rotatable and optionally translatable chuck assemblies that incorporate magnetic levitation and...
2018/0130693 SUBSTRATE CONVEYANCE ROBOT AND SUBSTRATE DETECTION METHOD
A substrate conveyance robot is provided with a robot arm capable of elevating; a substrate holding device mounted to the robot arm; and a substrate detection...
2018/0130692 SUBSTRATE HOLDING MEMBER
Provided is a substrate holding member that includes a base body and a plurality of protrusions formed on a surface of the base body and that is capable of...
2018/0130691 Method and Apparatus for Stacking Devices in an Integrated Circuit Assembly
Methods and apparatuses for stacking devices in an integrated circuit assembly are provided. A tray for supporting multiple dies of a semiconductor material...
2018/0130690 Ceramic Electrostatic Chuck Including Embedded Faraday Cage for RF Delivery and Associated Methods for...
A ceramic assembly is attached to a lower support structure having a bowl shape. The ceramic assembly has a top surface configured to support a substrate. At...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.