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Patent # Description
2018/0138108 SEMICONDUCTOR DEVICE
A semiconductor part includes a resin package and an exposed portion exposed from a bottom surface of the resin package. The exposed portion has a first...
2018/0138107 LEAD FRAME AND ELECTRONIC COMPONENT DEVICE
A lead frame includes a terminal portion. The terminal portion includes: a columnar electrode; a first metal plating layer formed on an upper surface of the...
2018/0138106 Superlattice Structures for Thermoelectric Devices
Example superlattice structures and methods for thermoelectric devices are provided. An example structure may include a plurality of superlattice periods. Each...
2018/0138105 THERMAL DISSIPATION DEVICE AND SEMICONDUCTOR PACKAGE DEVICE INCLUDING THE SAME
A thermal dissipation device includes a main body and a support member. The main body has an upper surface, a lower surface opposite to the upper surface, and...
2018/0138104 THERMAL VIA ARRANGEMENT FOR MULTI-CHANNEL SEMICONDUCTOR DEVICE
The invention provides a semiconductor device. The semiconductor device includes a gate structure over fin structures arranged in parallel. Each of the fin...
2018/0138103 FINGERPRINT RECOGNITION MODULE AND MANUFACTURING METHOD THEREFOR
This application provides a fingerprint recognition module and a manufacturing method therefor. The fingerprint recognition module includes a flexible printed...
2018/0138102 INTEGRATED PACKAGING DEVICES AND METHODS WITH BACKSIDE INTERCONNECTIONS
This disclosure provides devices and methods for 3-D device packaging with backside interconnections. One or more device elements can be hermetically sealed...
2018/0138101 PACKAGE STRUCTURES AND METHODS OF FORMING THE SAME
An embodiment is a method including: attaching a first die to a first side of a first component using first electrical connectors, attaching a first side of a...
2018/0138100 POWER MODULE AND INVERTER EQUIPMENT
The power module includes: a first metallic pattern; a plurality of power devices bonded on the first metallic pattern, each of the plurality of the power...
2018/0138099 SEMICONDUCTOR DEVICE PACKAGE STRUCTURE
A semiconductor device package comprises a carrier having a through hole. A lid is over the carrier and comprises a first side wall, a second side wall, and a...
2018/0138098 CONTACT-VIA CHAIN AS CORROSION DETECTOR
A detector for determining a faulty semiconductor component including a semiconductor component, a contact-via chain, which is situated laterally at a distance...
2018/0138097 SIZING DEVICE, POLISHING APPARATUS, AND POLISHING METHOD
A sizing device in a polishing apparatus for measuring a thickness of a wafer in course of polishing by laser beam interference, includes: a light-source for...
2018/0138096 ABNORMALITY DETECTION APPARATUS
Disclosed is an abnormality detection apparatus including: a collection unit that collects state information indicating a state of each part of a semiconductor...
2018/0138095 POROUS SILICON RELAXATION MEDIUM FOR DISLOCATION FREE CMOS DEVICES
A method for forming CMOS devices includes masking a first portion of a tensile-strained silicon layer of a SOI substrate, doping a second portion of the layer...
2018/0138094 STABLE MIXED OXIDE CATALYSTS FOR DIRECT CONVERSION OF ETHANOL TO ISOBUTENE AND PROCESS FOR MAKING
Zn.sub.xZr.sub.yO.sub.z mixed oxide catalysts having improved stability for the conversion of ethanol to isobutene are described, together with methods for...
2018/0138093 LOW RESISTANCE SOURCE-DRAIN CONTACTS USING HIGH TEMPERATURE SILICIDES
A semiconductor structure and a method for fabricating the same. The semiconductor structure includes at least one semiconductor fin disposed on a substrate. A...
2018/0138092 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are...
2018/0138091 VERTICAL FETS WITH VARIABLE BOTTOM SPACER RECESS
A method of forming a variable spacer in a vertical transistor device includes forming a first source/drain of a first transistor on a substrate; forming a...
2018/0138090 STORAGE DEVICE FOR GENERATING TRACE DATA AND METHOD OF OPERATING THE SAME
A storage device and a method of operating the storage device are provided. The storage device includes a non-volatile memory including a plurality of...
2018/0138089 Wafer Level Package Structure and Method of Forming Same
An embodiment is a package including a first package component. The first package component including a first die attached to a first side of a first...
2018/0138088 METHOD OF FORMING SEMICONDUCTOR DEVICE
A semiconductor device and method of forming the same, the semiconductor device includes a first and second fin shaped structures, a first and second gate...
2018/0138087 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
Various embodiments provide semiconductor structures and methods for forming the same. In an exemplary structure, a substrate has a device region, a seal ring...
2018/0138086 Substrate and Method
In an embodiment, a substrate includes semiconductor material and a conductive via. The conductive via includes a via in the substrate, a conductive plug...
2018/0138085 SELECTIVE COBALT REMOVAL FOR BOTTOM UP GAPFILL
Exemplary methods for removing cobalt material may include flowing a chlorine-containing precursor into a processing region of a semiconductor processing...
2018/0138084 ENHANCED VIA FILL MATERIAL AND PROCESSING FOR DUAL DAMASCENE INTEGRATION
A process comprises insulating a porous low k substrate with an organic polymer coating where the polymer does not penetrate or substantially penetrate the...
2018/0138083 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package includes a first connection member having a through-hole, first and second semiconductor chips disposed in the through-hole, an...
2018/0138082 AIR-CAVITY MODULE WITH ENHANCED DEVICE ISOLATION
The present disclosure relates to an air-cavity module having a thinned semiconductor die and a mold compound. The thinned semiconductor die includes a...
2018/0138081 SEMICONDUCTOR STRUCTURES AND METHOD FOR FABRICATING THE SAME
A semiconductor structure is provided. The semiconductor structure includes a first substrate, an oxide layer formed on the first substrate, a second substrate...
2018/0138080 HANDLE SUBSTRATE FOR USE IN MANUFACTURE OF SEMICONDUCTOR-ON-INSULATOR STRUCTURE AND METHOD OF MANUFACTURING THEREOF
A method is provided for preparing a high resistivity silicon handle substrate for use in semiconductor-on-insulator structure. The handle substrate is...
2018/0138079 ELECTRICALLY INSULATED FIN STRUCTURE(S) WITH ALTERNATIVE CHANNEL MATERIALS AND FABRICATION METHODS
Semiconductor structures and fabrication methods are provided which includes, for instance, fabricating a semiconductor fin structure by: providing a fin...
2018/0138078 Method for Regulating Hardmask Over-Etch for Multi-Patterning Processes
Techniques herein include patterning processes to prevent over-etching for various multi-patterning processes. Multi-patterning processes typically involve...
2018/0138077 METHOD OF FORMING INTERCONNECTION STRUCTURE
A method includes depositing a first dielectric structure over a non-insulator structure, removing a portion of the first dielectric structure to form a via...
2018/0138076 INTERCONNECT STRUCTURE INCLUDING AIR GAP
A method of forming a semiconductor structure is provided. A conductive layer is formed over a substrate. The conductive layer is selectively etched to form a...
2018/0138075 AIRGAP FORMATION WITH DAMAGE-FREE COPPER
Processing methods may be performed to remove unwanted materials from a substrate, such as an oxide footing. The methods may include forming an inert plasma...
2018/0138074 CARRIER RING AND CHEMICAL VAPOR DEPOSITION APPARATUS INCLUDING THE SAME
A pedestal of a CVD apparatus includes a raised central portion, a peripheral portion extending around the central portion, and a carrier ring support disposed...
2018/0138073 HANDLER BONDING AND DEBONDING FOR SEMICONDUCTOR DIES
Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The release layer comprises at least one...
2018/0138072 HANDLER BONDING AND DEBONDING FOR SEMICONDUCTOR DIES
Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The at least one singulated semiconductor device...
2018/0138071 MICRO-TRANSFER-PRINTABLE FLIP-CHIP STRUCTURES AND METHODS
In certain embodiments, a method of making a semiconductor structure suitable for transfer printing (e.g., micro-transfer printing) includes providing a...
2018/0138070 POSITIONING DEVICE
The invention relates to a positioning device for positioning a substrate, in particular a wafer, comprising: a process chamber; a base body; a carrier element...
2018/0138069 EDGE RING CENTERING METHOD USING RING DYNAMIC ALIGNMENT DATA
A system for determining an alignment of an edge ring on a substrate support includes a robot control module configured to control a robot to place the edge...
2018/0138068 SEALED SUBSTRATE CARRIERS AND SYSTEMS AND METHODS FOR TRANSPORTING SUBSTRATES
An electronic device manufacturing system is disclosed. The system includes a processing tool having one or more processing chambers each adapted to perform an...
2018/0138067 SUBSTRATE LIFT BAR AND METHOD FOR SMEARING ANTI-STATIC LIQUID
Provided is a substrate lift bar, including: an outer lift bar which is in shape of a box structure and includes one surface having an opening; an inner lift...
2018/0138066 SUBSTRATE PROCESSING APPARATUS
A substrate processing apparatus including a frame, a first SCARA arm connected to the frame, including an end effector, configured to extend and retract along...
2018/0138065 WAFER CONTAINER WITH EXTERNAL PASSIVE GETTER MODULE
A semiconductor wafer container assembly includes a container defining an exterior and defining an interior having a wafer storage area adapted to support one...
2018/0138064 WAFER CARRIER PURGE APPARATUSES, AUTOMATED MECHANICAL HANDLING SYSTEMS INCLUDING THE SAME, AND METHODS OF...
A wafer carrier purge apparatus, an automated mechanical handling system, and a method of handling a wafer carrier during integrated circuit fabrication are...
2018/0138063 QUARTZ BOAT TRANSMISSION MECHANISM USED IN DIFFUSION FURNACE
A quartz boat transmission mechanism used in a diffusion furnace includes a vertically-upward stand column and a boat pushing mechanism fixed on opposite sides...
2018/0138062 INTEGRATED CIRCUIT PACKAGE SINGULATION ASSEMBLY
A singulation assembly for molded leadframe sheets includes a saw chuck table having a flat upper surface with a plurality of holes therein. A vacuum source is...
2018/0138061 SELECTIVE ETCH RATE MONITOR
Embodiments include a real time etch rate sensor and methods of for using a real time etch rate sensor. In an embodiment, the real time etch rate sensor...
2018/0138060 SUBSTRATE PROCESSING APPARATUS
Disclosed is a substrate processing apparatus including: a container body configured to accommodate a substrate and perform a processing on the substrate using...
2018/0138059 SUBSTRATE LIQUID PROCESSING APPARATUS AND METHOD
The present invention relates to a substrate liquid processing apparatus which etches and cleans a substrate for a semiconductor. The substrate liquid...
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