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Patent # Description
2018/0144989 Guard Rings Including Semiconductor Fins and Regrown Regions
A method includes forming a gate stack over a semiconductor fin, wherein the semiconductor fin forms a ring, and etching a portion of the semiconductor fin not...
2018/0144988 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a semiconductor substrate, a shallow trench isolation structure, gate electrodes, and a gate isolation structure. The...
2018/0144987 FIN FIELD-EFFECT TRANSISTOR AND FABRICATION METHOD THEREOF
FinFET structures and fabrication methods thereof are provided. An exemplary fabrication method includes forming a semiconductor substrate and a plurality of...
2018/0144986 FIN CUT PROCESS AND FIN STRUCTURE
A method for manufacturing a semiconductor device includes providing a substrate structure including a substrate, semiconductor fins extending in a first...
2018/0144985 CMOS PROCESS-DEPENDENT NEAR-THRESHOLD VOLTAGE REGULATION
Disclosed is a voltage regulator for an integrated circuit. The voltage regulator can be configured to regulate a supply voltage provided to the integrated...
2018/0144984 SEMICONDUCTOR CHIP HAVING ON-CHIP NOISE PROTECTION CIRCUIT
A semiconductor chip having a pad, a protective element, and an internal circuit for providing a semiconductor chip having a protective circuit with high noise...
2018/0144983 DEVICE WAFER PROCESSING METHOD
Disclosed herein is a device wafer processing method including a protective film forming step of applying a water-soluble protective film material to the front...
2018/0144982 SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING SEMICONDUCTOR DEVICES
A method is disclosed for use in manufacturing semiconductor dice. The method comprises providing a wafer substrate that comprises dicing areas, providing a...
2018/0144981 DEVICE CHIP PACKAGE MANUFACTURING METHOD
Disclosed herein is a device chip package manufacturing method including a cutting step of forming cut grooves having a depth reaching a finished thickness of...
2018/0144980 Deposition And Treatment Of Films For Patterning
Methods comprising depositing a film material to form an initial film in a trench in a substrate surface are described. The film is treated to expand the film...
2018/0144979 SELF-ALIGNED LITHOGRAPHIC PATTERNING
Methods of lithographic patterning. A metal hardmask layer is formed on a dielectric layer and a patterned layer is formed on the metal hardmask layer. A metal...
2018/0144978 COMPOSITE CONTACT PLUG STRUCTURE AND METHOD OF MAKING SAME
An embodiment contact plug includes a bilayer structure and a diffusion barrier layer on a sidewall and a bottom surface of the bilayer structure. The bilayer...
2018/0144977 STAIRCASE ENCAPSULATION IN 3D NAND FABRICATION
Methods and apparatuses for depositing an encapsulation layer over a staircase structure during fabrication of a 3D NAND structure to prevent degradation of an...
2018/0144976 POST SPACER SELF-ALIGNED CUTS
The present disclosure relates to semiconductor structures and, more particularly, to post spacer self-aligned cut structures and methods of manufacture. The...
2018/0144975 METHOD FOR PRODUCING SOI WAFER
A method for producing a SOI wafer that includes implanting at least one type of gas ion selected from a hydrogen ion and a rare gas ion from a surface of a...
2018/0144974 Method of Wafer Thinning and Realizing Backside Metal Structures
In accordance with an embodiment of the present invention, a method of fabricating a semiconductor device includes forming openings partially filled with a...
2018/0144972 LTPS ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE
An LTPS array substrate, a method for manufacturing the same, and a display device are disclosed. According to the method, a flat layer is formed on an...
2018/0144971 PATTERN ARRAY DIRECT TRANSFER APPARATUS AND METHOD THEREFOR
An apparatus includes a first frame that holds a wafer tape and a second frame that clamps a product substrate. A transfer element is disposed adjacent the...
2018/0144970 Semiconductor Device, Method, and Tool of Manufacture
A semiconductor device, method, and tool of manufacture includes a semiconductor manufacturing tool. The semiconductor manufacturing tool includes push pins in...
2018/0144969 HYBRID SUBSTRATE CARRIER
Embodiments of a hybrid substrate carrier are provided herein. In some embodiments, a substrate carrier includes: a carrier ring having an inner ledge adjacent...
2018/0144968 SUBSTRATE PROCESSING APPARATUS ARRANGED IN PROCESS CHAMBER AND OPERATING METHOD THEREOF
Disclosed is a substrate processing apparatus including a disc provided so as to be rotatable on its axis, at least one susceptor disposed on the disc such...
2018/0144967 METHOD FOR ALIGNING SUBSTRATES BEFORE BONDING
A method and corresponding device for the alignment of a first substrate comprising at least two first alignment marks with a second substrate comprising at...
2018/0144966 EXCHANGE AND FLIP CHAMBER DESIGN FOR HETEROJUNCTION SOLAR CELL FORMATION
In one embodiment, a chamber is provided that includes a chamber body and a lid defining an interior volume, a frame within the interior volume, the frame...
2018/0144965 BUFFER STATION WITH SINGLE EXIT-FLOW DIRECTION
A buffer for use in semiconductor processing tools is disclosed. The buffer may be used to temporarily store wafers after processing operations are performed...
2018/0144964 Overhead Manufacturing, Processing and Storage System
This disclosure relates generally to substrate and manufacturing system, processes and methods. In one example embodiment, to methods, apparatus, and systems...
2018/0144963 METHOD AND APPARATUS FOR ASSEMBLING AND TESTING A MULTI-INTEGRATED CIRCUIT PACKAGE
An example clamping assembly tray for packaging a semiconductor device includes a frame having a bottom surface and side walls extending from the bottom...
2018/0144962 WAFER SUSCEPTOR
A wafer susceptor includes a main plate, a plurality of minor plates, and a plurality of plugs. The main plate has a plurality of first notches. The minor...
2018/0144961 INSPECTION DEVICE AND SUBSTRATE PROCESSING APPARATUS
Surface image data of a non-defective sample substrate is acquired, and surface image data of a substrate to be inspected is acquired. Differences between...
2018/0144960 NEXT GENERATION WARPAGE MEASUREMENT SYSTEM
Systems, apparatuses and methods for determining a surface profile of a substrate are provided. In one embodiment, a method includes projecting a signal having...
2018/0144959 ELECTROSTATIC CHUCKING FORCE MEASUREMENT TOOL FOR PROCESS CHAMBER CARRIERS
An electrostatic chucking force tool is described that may be used on workpiece carriers for micromechanical and semiconductor processing. One example includes...
2018/0144958 METHOD AND APPARATUS FOR EMBEDDING SEMICONDUCTOR DEVICES
An apparatus includes a product substrate having a transfer surface, and a semiconductor die defined, at least in part, by a first surface adjoined to a second...
2018/0144957 Diodes Offering Asymmetric Stability During Fluidic Assembly
Embodiments are related to systems and methods for fluidic assembly, and more particularly to systems and methods for assuring deposition of elements in...
2018/0144956 METHOD FOR COOLING SEMICONDUCTOR MANUFACTURING APPARATUS AND SUBSTRATE SUPPORT APPARATUS
A semiconductor manufacturing apparatus, which is provided with a first storage chamber that stores a substrate to be processed, a second storage chamber that...
2018/0144955 RAPID HEAT TREATMENT APPARATUS
A rapid heat treatment apparatus comprises: a chamber for rapid heat treatment; a support stage radiating light to rapidly heat a substrate for rapid heat...
2018/0144954 DRYING HIGH ASPECT RATIO FEATURES
Methods of drying a semiconductor substrate may include applying a drying agent to a semiconductor substrate, where the drying agent wets the semiconductor...
2018/0144953 SUBSTRATE PROCESSING APPARATUS, EXHAUST SYSTEM AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A configuration capable of increasing an exhaust capability of an apparatus without degrading an operation of the apparatus includes: a processing furnace; an...
2018/0144952 SEMICONDUCTOR PACKAGE WITH CANTILEVER PADS
One or more embodiments are directed to semiconductor packages with one or more cantilever pads and methods of making same. In one embodiment a recess is...
2018/0144951 METHOD FOR CREATING THROUGH-CONNECTED VIAS AND CONDUCTORS ON A SUBSTRATE
A method to reduce the number and type of processing steps to achieve conductive lines in the planes of a substrate concurrently interconnecting conductor...
2018/0144950 BACKPLANE FOR DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing a backplane for a display device includes forming an insulation layer on a substrate, forming a pad electrode layer on the insulation...
2018/0144949 System and Method For Selective Nitride Etch
A representative method for selective radical-component etching of exposed nitride-containing material comprises the steps of: disposing a substrate in an etch...
2018/0144948 METHOD FOR ETCHING LAYER TO BE ETCHED
In a method of an embodiment, radicals, which are generated from a processing gas, is adsorbed to a layer to be etched without applying a high-frequency bias...
2018/0144947 PHOTOMASK MANUFACTURING METHOD
A photomask manufacturing method relating to semiconductor technology is presented. The manufacturing method involves providing a substrate structure...
2018/0144946 METHOD OF PLASMA DISCHARGE IGNITION TO REDUCE SURFACE PARTICLES
Systems and methods are disclosed for plasma discharge ignition to reduce surface particles and thereby decrease defects introduced during plasma processing. A...
2018/0144945 PLACING UNIT AND PLASMA PROCESSING APPARATUS
The present disclosure relates to a placing unit including: a base to which a high-frequency power is applied; an electrostatic chuck provided on the base and...
2018/0144944 METHODS OF FORMING PATTERNS USING IMPRINT PROCESS
A method for forming patterns is provided. The method includes forming a resist layer on a substrate, imprinting a convex pattern and a concave pattern on the...
2018/0144943 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor structure includes a first layer having a recessed surface, a metal layer disposed above the first layer, and a second layer disposed above the...
2018/0144942 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING FORMING PROTECTIVE FILM WITHIN RECESS IN SUBSTRATE
An n-type layer (3) is formed by implanting an n-type impurity in a back surface of a Si substrate (1). A recess (4) is formed in the back surface of the Si...
2018/0144941 Methods and Apparatus for Fabricating IC Chips with Tilted Patterning
The present disclosure describes methods and apparatuses for fabricating integrated-circuit (IC) die with tilted patterning. In some aspects, mandrels are...
2018/0144940 PHOSPHINE CO-GAS FOR CARBON IMPLANTS
Processes and systems for carbon ion implantation include utilizing phosphine as a co-gas with a carbon oxide gas in an ion source chamber. In one or more...
2018/0144939 DOPANT INTRODUCTION METHOD AND THERMAL TREATMENT METHOD
A PSG film, which is a silicon dioxide thin film containing phosphorus as a dopant, is formed on the surface of a semiconductor wafer. The semiconductor wafer...
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