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Patent # Description
2018/0151612 DISPLAY PANEL AND DISPLAY APPARATUS
A display panel and a display apparatus are provided. The display panel comprises a display region including an irregular-shaped display area, and a...
2018/0151611 METHOD FOR FABRICATING AN IMAGE SENSOR
A method for fabricating an image sensor is provided. In the method, at first, a semiconductor substrate having a top portion and a bottom portion is provided....
2018/0151610 Storage Gate Protection
A method of backside illuminated image sensor fabrication includes forming a plurality of photodiodes in a semiconductor material, where the plurality of...
2018/0151609 THROUGH-SEMICONDUCTOR AND THROUGH-DIELECTRIC ISOLATION STRUCTURE
An image sensor includes a semiconductor material including a photodiode disposed in the semiconductor material and an insulating material. A surface of the...
2018/0151608 PHOTOELECTRIC CONVERSION DEVICE AND IMAGING SYSTEM
A photoelectric conversion device includes a blocking unit located between a photoelectric conversion layer and a second electrode unit and configured to cause...
2018/0151607 PHOTOSENSITIVE PIXEL STRUCTURE WITH WRAPPED RESISTOR
The present invention relates to a photosensitive pixel structure (10). The pixel structure (10) comprises a substrate (15) and at least one photosensitive...
2018/0151606 TRANSISTOR SUBSTRATE, ORGANIC LIGHT EMITTING DISPLAY PANEL INCLUDING THE SAME, METHOD OF MANUFACTURING THE...
Disclosed are a transistor substrate, an organic light emitting display panel including the same, a method of manufacturing the transistor substrate, and an...
2018/0151605 ARRAY SUBSTRATES AND THE MANUFACTURING METHOD THEREOF
The present disclosure relates to an array substrate and the manufacturing method thereof. The manufacturing method includes depositing a conductive layer on a...
2018/0151604 SEMICONDUCTOR DEVICE
An oxide semiconductor film with a low density of defect states is formed. In addition, an oxide semiconductor film with a low impurity concentration is...
2018/0151603 SEMICONDUCTOR DEVICE
A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor...
2018/0151602 DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME
A display device including a substrate including a display area and a non-display area, a common electrode line in the non-display area, and a protective layer...
2018/0151601 PIXEL STRUCTURE AND DISPLAY DEVICE HAVING THE SAME
A pixel structure is disposed on a substrate and includes a bump, a first insulating layer, a semiconductive layer, a second insulating layer, a metal layer,...
2018/0151600 DISPLAY APPARATUS
A display device includes a substrate including a display region, and a peripheral region that is outside of the display region, a plurality of dummy pads at...
2018/0151599 ORGANIC LIGHT EMITTING DISPLAY DEVICE
An organic light emitting display device is disclosed. The organic light emitting display device includes a light emitting element disposed in each sub-pixel...
2018/0151598 DISPLAY DEVICE
According to one embodiment, a display device includes first semiconductor layers crossing a first scanning line in a non-display area, the first semiconductor...
2018/0151597 DISPLAY DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE
A display device includes a liquid crystal element, a transistor, a scan line, and a signal line. The liquid crystal element includes a pixel electrode, a...
2018/0151596 METAL OXIDE FILM AND METHOD FOR FORMING METAL OXIDE FILM
A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10...
2018/0151595 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
A semiconductor device (1001) includes a thin-film transistor (101) including a gate electrode (3), an oxide semiconductor layer (7), a gate insulating layer...
2018/0151594 DISPLAY DEVICE
A display device includes a plurality of gate lines extending in a first direction on the display area, a plurality of source lines extending in a second...
2018/0151593 SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND ELECTRONIC DEVICE
A level shifter including a transistor that can be formed through the same process as a display portion is provided. A semiconductor device serves as a level...
2018/0151592 ARRAY SUBSTRATE, METHOD FOR FORMING ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE
An array substrate, a method for forming an array substrate, a display panel and a display device are provided, which relate to the field of display...
2018/0151591 ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, DISPLAY PANEL AND DISPLAY DEVICE
An array substrate includes a substrate base, a gate layer, and a gate insulating layer, an active layer, a source-drain electrode layer, an etching barrier...
2018/0151590 THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES
Three-dimensional (3D) nonvolatile memory devices include a substrate having a well region of second conductivity type (e.g., P-type) therein and a common...
2018/0151589 THREE-DIMENSIONAL MEMORY DEVICE HAVING PASSIVE DEVICES AT A BURIED SOURCE LINE LEVEL AND METHOD OF MAKING THEREOF
A layer stack including a lower semiconductor layer, a lower dielectric layer, and a spacer material layer is formed over a semiconductor substrate, and the...
2018/0151588 THREE-DIMENSIONAL MEMORY DEVICE WITH DISCRETE SELF-ALIGNED CHARGE STORAGE ELEMENTS AND METHOD OF MAKING THEREOF
A memory opening can be formed through an alternating stack of insulating layers and sacrificial material layers over a substrate. A material layer stack...
2018/0151587 THREE DIMENSIONAL SEMICONDUCTOR DEVICES
A three-dimensional semiconductor device includes a semiconductor substrate including a cell array region and a peripheral circuit region, an electrode...
2018/0151586 EMBEDDED NON-VOLATILE MEMORY WITH SIDE WORD LINE
A storage device includes a semiconductor substrate, a control gate, a word line, a dielectric layer, a charge storage nitride layer, and a blocking layer. The...
2018/0151585 METHOD FOR MANUFACTURING EMBEDDED NON-VOLATILE MEMORY
In a method for manufacturing a semiconductor device, a logic well and a high voltage well are respectively formed in second and third regions of a substrate....
2018/0151584 COMPACT NON-VOLATILE MEMORY DEVICE OF THE TYPE WITH CHARGE TRAPPING IN A DIELECTRIC INTERFACE
Each memory cell is of the type with charge trapping in a dielectric interface and includes a state transistor selectable by a vertical selection transistor...
2018/0151583 THREE DIMENSIONAL INTEGRATED CIRCUITS EMPLOYING THIN FILM TRANSISTORS
An integrated circuit which enables lower cost and improved features compared to standard crystalline silicon integrated circuits by utilizing thin film...
2018/0151582 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a non-volatile memory. The non-volatile memory includes a first dielectric layer disposed on a substrate, a floating gate...
2018/0151581 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a non-volatile memory. The non-volatile memory includes a first dielectric layer disposed on a substrate, a floating gate...
2018/0151580 SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOF
A semiconductor device includes a semiconductor substrate, a gate dielectric layer, a gate electrode and source and drain regions. The gate dielectric layer...
2018/0151578 SEMI-VOLATILE EMBEDDED MEMORY WITH BETWEEN-FIN FLOATING-GATE DEVICE AND METHOD
Embodiments of the present disclosure provide techniques and configurations for semi-volatile embedded memory with between-fin floating gates. In one...
2018/0151577 DEVICE INCLUDING A FLOATING GATE ELECTRODE AND A LAYER OFFERROELECTRIC MATERIAL AND METHOD FOR THE FORMATION...
An illustrative device disclosed herein includes a semiconductor substrate. The substrate includes a source region, a drain region and a channel region. The...
2018/0151576 SEMICONDUCTOR DEVICES
A semiconductor device includes a substrate having a first active region; first and second gate electrodes disposed on the first active region; first, second...
2018/0151575 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF
Semiconductor structures and fabrication methods thereof are provided. An exemplary fabrication method includes providing a base substrate having an N-type...
2018/0151574 SEMICONDUCTOR STRUCTURE, STATIC RANDOM ACCESS MEMORY, AND FABRICATION METHOD THEREOF
A semiconductor structure, a method for fabricating the semiconductor structure and a static random access memory are provided. The method includes providing a...
2018/0151573 SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS THEREOF
A method for fabricating a semiconductor device includes forming a gate dielectric layer on a base substrate including an N-type logic region, a P-type logic...
2018/0151572 SEMICONDUCTOR STRUCTURE, STATIC RANDOM ACCESS MEMORY AND FABRICATION METHOD THEREOF
A semiconductor structure, a method for fabricating the semiconductor structure, and a static random access memory are provided. The method includes providing...
2018/0151571 LAYOUT of SEMICONDUCTOR TRANSISTOR DEVICE
The present invention provides a layout of a semiconductor transistor device including a first and a second active area, a first and a second gate, and a metal...
2018/0151570 SEMICONDUCTOR DEVICE INCLUDING INSULATING ELEMENT
A semiconductor device includes a substrate. The semiconductor device further includes a first transistor on the substrate, wherein the first transistor...
2018/0151569 Integrated Circuit Having a Vertical Power MOS Transistor
A device includes a vertical transistor and a lateral transistor on a substrate, wherein the vertical transistor comprises a first gate in a first trench, a...
2018/0151568 SEMICONDUCTOR DEVICE
According to the present invention, a semiconductor device includes a semiconductor layer, a source electrode provided in the semiconductor layer, a drain...
2018/0151567 INTERCONNECT METAL LAYOUT FOR INTEGRATED CIRCUIT
A semiconductor device includes an active region comprising a source/drain region and a plurality of poly strips spaced apart and arranged along a first...
2018/0151566 Multi-Fin Device and Method of Making Same
A multiple-fin device includes a substrate and a plurality of fins formed on the substrate. Source and drain regions are formed in the respective fins. A...
2018/0151565 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE
In a method of forming a FinFET, a first sacrificial layer is formed over a source/drain structure of a FinFET structure and an isolation insulating layer. The...
2018/0151564 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH SEPARATED MERGED SOURCE/DRAIN STRUCTURE
In a method of forming a semiconductor device including a fin field effect transistor (FinFET), a sacrificial layer is formed over a source/drain structure of...
2018/0151563 Semiconductor Device and Method
A process for manufacturing a semiconductor device and the resulting structure are presented. In an embodiment a source/drain region is grown. Once grown, the...
2018/0151562 TEMPERATURE COMPENSATION CIRCUITS
The present disclosure relates generally to integrated circuits, and more particularly to low-bias voltage reference circuits. The voltage reference circuits...
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