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Patent # Description
2018/0158838 PIXEL ARRAY SUBSTRATE
A pixel array substrate includes a substrate, first signal lines, second signal lines, active elements, pixel electrodes, selection lines, a driving unit, and...
2018/0158837 DISPLAY DEVICE
A display device includes a substrate that includes a display area and a pad area, and a plurality of data pads that are provided on the pad area of the...
2018/0158836 SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF
There is provided a semiconductor device capable of enhancing device performance by variably adjusting threshold voltage of a transistor having gate-all-around...
2018/0158835 LOGIC AND FLASH FIELD-EFFECT TRANSISTORS
Methods of forming a device structure for a field-effect transistor and device structures for a field-effect transistor. A first gate dielectric layer is...
2018/0158834 3D NAND DEVICE WITH FIVE-FOLDED MEMORY STACK STRUCTURE CONFIGURATION
A three-dimensional semiconductor device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory...
2018/0158833 SEMICONDUCTOR STRUCTURE INCLUDING A PLURALITY OF PAIRS OF NONVOLATILE MEMORY CELLS AND AN EDGE CELL
A semiconductor structure includes a plurality of pairs of nonvolatile memory cells arranged in a row, an edge cell positioned adjacent to the pairs of...
2018/0158832 SEMICONDUCTOR MEMORY DEVICE
A method is provided for fabricating a semiconductor memory device. The method includes providing a substrate and forming a stacked layer on the substrate,...
2018/0158831 MASK READ-ONLY MEMORY DEVICE
A mask read-only memory (M-ROM) device is provided. In an M-ROM device, a first layer having a first type doping is formed in a substrate. A plurality of...
2018/0158830 SEMICONDUCTOR DEVICE
A semiconductor' device may include: a substrate; a first well region formed on the substrate; a second well region formed on the substrate, the first well...
2018/0158829 SEMICONDUCTOR DEVICES INCLUDING SUPPORT PATTERNS
A semiconductor device includes a plurality of pillar structures on a semiconductor substrate, and a support pattern in contact with at least a part of each of...
2018/0158828 SEMICONDUCTOR DEVICE INCLUDING MULTI-LINER LAYER IN TRENCH
A semiconductor device may include a semiconductor substrate, a trench isolation layer on the semiconductor substrate and configured to define an active...
2018/0158827 SEMICONDUCTOR DEVICE
The invention provides a semiconductor device including a capacitor capable of securing capacity and exhibiting improved reliability and a semiconductor...
2018/0158825 Memory Device Having Electrically Floating Body Transistor
A semiconductor memory cell includes a floating body region configured to be charged to a level indicative of a state of the memory cell selected from at least...
2018/0158824 INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME
An integrated circuit device includes a double-humped protrusion protruding from a surface of an inter-device isolation region. To manufacture the integrated...
2018/0158823 Multi-Voltage Complementary Metal Oxide Semiconductor Integrated Circuits Based On Always-On N-Well Architecture
Examples of multi-voltage (MV) complementary metal oxide semiconductor (CMOS) integrated circuits (ICs) based on always-on N-well architecture are described....
2018/0158822 S-Contact for SOI
Systems, methods, and apparatus for an improved protection from charge injection into layers of a device using resistive structures are described. Such...
2018/0158821 GATE STRUCTURES WITH LOW RESISTANCE
The present disclosure relates to semiconductor structures and, more particularly, to gate structures with low resistance and methods of manufacture. The...
2018/0158820 SEMICONDUCTOR DEVICE AND A METHOD FOR FABRICATING THE SAME
A semiconductor device includes a fin field effect transistor. The semiconductor device includes a first gate electrode, a first source/drain (S/D) region...
2018/0158819 SEMICONDUCTOR DEVICE HAVING FIN-TYPE FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a first fin structure disposed on a substrate. The first fin structure extends in a first direction. A first sacrificial layer...
2018/0158818 AIR GAP SPACER FOR METAL GATES
A method of forming a semiconductor device that includes forming a trench adjacent to a gate structure to expose a contact surface of one of a source region...
2018/0158817 TUNNELING FIELD EFFECT TRANSISTOR
Devices and methods for forming a device are disclosed. A substrate is provided. A plurality of fin structures are formed in the substrate. The fin structures...
2018/0158816 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A first transistor required for decreasing leak current and a second transistor required for compatibility of high speed operation and low power consumption...
2018/0158815 SEMICONDUCTOR DEVICE
A semiconductor device is provided that has a semiconductor substrate, a drift layer of a first conductivity type formed in the semiconductor substrate, a base...
2018/0158814 ACTIVE INTERFACE RESISTANCE MODULATION SWITCH
In certain configurations, an input/output (IO) interface of a semiconductor chip includes a pin, an interface switch connected to the pin, and an overstress...
2018/0158813 ELECTROSTATIC DISCHARGE PROTECTION STRUCTURE AND FABRICATING METHOD THEREOF
In accordance with some embodiments of the disclosed subject matter, an electrostatic discharge protection structure and a fabricating method thereof are...
2018/0158812 Strapping Structure of Memory Circuit
A memory circuit includes a first memory cell and a second memory adjacent to the first memory cell. The first memory cell includes a first word line strapping...
2018/0158811 INTEGRATED CIRCUIT DEVICES
An integrated circuit (IC) device includes at least one standard cell. The at least one standard cell includes: first and second active regions respectively...
2018/0158810 SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING SAME
A method of fabricating a semiconductor package includes mounting a plurality of semiconductor chips on a substrate in a stripped state, forming a mold layer...
2018/0158809 SEMICONDUCTOR MEMORY DEVICE INCLUDING STACKED CHIPS AND MEMORY MODULE HAVING THE SAME
A semiconductor memory device includes a memory structure including a first integrated circuit chip and a plurality of second integrated circuit chips stacked...
2018/0158808 LED DISPLAY MODULE, DISPLAY DEVICE AND METHOD OF MANUFACTURING LED DISPLAY MODULE
Elements of the present disclosure provide a LED display module, a display device and a method of manufacturing a display module, and belongs to the field of...
2018/0158807 LED MODULE AND METHOD FOR FABRICATING THE SAME
Disclosed is a method for fabricating an LED module. The method includes: constructing a chip-on-carrier including a chip retainer having a horizontal bonding...
2018/0158806 MANUFACTURING METHOD OF DISPLAY
A manufacturing method of a display including the following steps is provided. Firstly, a back plate, a first transfer platform and a second transfer platform...
2018/0158805 METHOD FOR MAKING AN LED MODULE AND MODULE MADE THEREOF
An LED module includes a substrate, a first conductive element formed on a top face of the substrate, wherein the first conductive element has a feature to...
2018/0158804 Integrated Circuit Package For Assembling Various Dice In A Single IC Package
An integrated circuit IC package with one or more pins protruding from the IC package for electrically connecting the IC package with a printed circuit board...
2018/0158803 SEMICONDUCTOR DEVICE, MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE
There is provided a semiconductor device and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a...
2018/0158802 Semiconductor Device and Method
A link device with a large density routing is attached to a package in order to provide a high-density interconnect pathway to interconnect semiconductor...
2018/0158801 METHODS OF MANUFACTURING ELECTRONIC DEVICES FORMED IN A CAVITY AND INCLUDING A VIA
A method of manufacturing an electronic device formed in a cavity may include, on a first substrate having a bottom surface and a top surface, forming a first...
2018/0158800 APPARATUS AND METHOD OF POWER TRANSMISSION SENSING FOR STACKED DEVICES
Apparatuses for supplying power supply voltage in a plurality of dies are described. An example apparatus includes: a circuit board; a regulator on the circuit...
2018/0158799 MULTI-CHIP PACKAGE CAPABLE OF TESTING INTERNAL SIGNAL LINES
A multi-chip package capable of testing internal signal lines including a printed circuit board, a first semiconductor chip mounted on the printed circuit...
2018/0158798 Fan-Out Package Structure, And Manufacturing Method Thereof
The method of fabricating a fan-out package structure comprises: S1, providing a substrate (1), forming an adhesive layer (2) on the substrate's upper surface;...
2018/0158797 STRUCTURES AND METHODS TO ENABLE A FULL INTERMETALLIC INTERCONNECT
A method forming an interconnect structure includes depositing a first solder bump on a chip; depositing a second solder bump on a laminate, the second solder...
2018/0158796 BONDING APPARATUS, BONDING SYSTEM, BONDING METHOD AND STORAGE MEDIUM
There is provided a bonding apparatus for bonding substrates together, which includes: a first holding part configured to adsorptively hold a first substrate...
2018/0158795 SEMICONDUCTOR DEVICE
In order to inhibit defective connection between a bump of a semiconductor chip and an electrode pad of a substrate, a semiconductor device includes a...
2018/0158794 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a substrate, a semiconductor element, a ground pad, an insulating coating member, a conductive bonding member, and a conductive...
2018/0158793 Method and Apparatus for forming Contacts on an Integrated Circuit Die using a Catalytic Adhesive
A catalytic laminate is formed from a resin, a fiber reinforced layer, and catalytic particles such that the catalytic particles are disposed throughout the...
2018/0158792 SEMICONDUCTOR DEVICE HAVING SEMICONDUCTOR CHIP WITH LARGE AND SMALL IRREGULARITIES ON UPPER AND LOWER SIDE...
A semiconductor device has a semiconductor chip adhesively bonded to a die pad. An area having large irregularities is formed on an upper side surface of the...
2018/0158791 FAN-OUT SEMICONDUCTOR PACKAGE MODULE
A fan-out semiconductor package module includes: a fan-out semiconductor package including a first interconnection member having a through-hole, a ...
2018/0158790 SOLDER PARTICLE
Disclosed is a solder particle including a plastic core; a copper-free metal layer which is formed on an external surface of the plastic core; and a solder...
2018/0158789 Semiconductor Device and Method
A semiconductor device and method of manufacturing is provided, whereby a support structure is utilized to provide additional support for a conductive element...
2018/0158788 MIXED STRUCTURE METHOD OF LAYOUT OF DIFFERENT SIZE ELEMENTS TO OPTIMIZE THE AREA USAGE ON A WAFER
A semiconductor wafer device that comprises a round wafer with a large surface area and a low cost per unit area is disclosed. The semiconductor wafer device...
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