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Patent # Description
2018/0158736 METHOD FOR FABRICATING AUTO-ALIGNED INTERCONNECTION ELEMENTS FOR A 3D INTEGRATED CIRCUIT
Method for fabricating transistors for an integrated 3D circuit, comprising: a) forming, on a given level of transistors made in a first semiconductor layer:...
2018/0158735 PARTITIONED WAFER AND SEMICONDUCTOR DIE
A wafer includes a first set of dies and a second set of dies. The wafer further includes a scribe line separating the first set of dies from the second set of...
2018/0158734 METHOD OF SEPARATING ELECTRONIC DEVICES HAVING A BACK LAYER AND APPARATUS
A method of singulating a wafer includes providing a wafer having a plurality of die formed as part of the wafer and separated from each other by spaces,...
2018/0158733 INTEGRATED CIURCUIT PRODUCT HAVING A THROUGH-SUBSTRATE-VIA (TSV) AND A METALLIZATION LAYER THAT ARE FORMED...
An integrated circuit product includes a substrate, an interlayer dielectric (ILD) material positioned above the substrate and a through-substrate-via (TSV)...
2018/0158732 SEMICONDUCTOR STRUCTURE AND FABRICATING METHOD THEREOF
A semiconductor structure includes a substrate, a hole which includes a top hole and a bottom hole in communication with each other in the substrate, and a...
2018/0158731 METHOD OF OPTIMIZING WIRE RC FOR DEVICE PERFORMANCE AND RELIABILITY
A method of tailoring BEOL RC parametrics to improve chip performance. According to the method, an integrated circuit design on an integrated circuit chip is...
2018/0158730 SEMICONDUCTOR DEVICES
A semiconductor device includes an insulating interlayer disposed on a substrate, a first protection pattern, a first barrier pattern, a first adhesion...
2018/0158729 FINFET DEVICE AND METHOD OF FORMING THE SAME
Provided is a FinFET device including a substrate having at least one fin of the FinFET device, a gate stack, a spacer, a strained layer, a composite etching...
2018/0158728 MEMORY DEVICE AND METHOD OF FORMING THEREOF
A memory device includes a dielectric structure, a tungsten plug, a bottom electrode, a resistance switching element and a top electrode. The dielectric...
2018/0158727 SEMICONDUCTOR DEVICE WITH CONTACT PLUG
The semiconductor device includes a substrate, an epi-layer, a first etch stop layer, an interlayer dielectric (ILD) layer, a second etch stop layer, a...
2018/0158726 Method and Structure for Interconnection
A semiconductor structure includes a first dielectric layer disposed over a substrate; a first metal feature and a second metal feature embedded in the first...
2018/0158725 METHOD AND SYSTEM FOR FABRICATION SEMICONDUCTOR DEVICE
A method for fabrication a semiconductor device and a system utilizing the same are provided. In the method for fabrication the semiconductor device, at first,...
2018/0158724 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
A semiconductor device and a method for fabricating the semiconductor device are provided. The method includes forming a first composite structure, including a...
2018/0158723 DUAL PHOTORESIST APPROACH TO LITHOGRAPHIC PATTERNING FOR PITCH REDUCTION
Methods of lithographic patterning a dielectric layer. A first resist layer is formed on a hardmask layer, and a second resist layer is formed on the first...
2018/0158722 STRUCTURE OF DUAL DAMASCENE STRUCTURES HAVING VIA HOLE AND TRENCH
A structure and a formation method of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and...
2018/0158721 HIGH RESISTIVITY SILICON-ON-INSULATOR STRUCTURE AND METHOD OF MANUFACTURE THEREOF
A multilayer structure is provided, the multilayer structure comprising a semiconductor on insulator structure comprises an insulating layer that enhances the...
2018/0158720 METHOD OF SEPARATING THE MAIN PART OF A SEMICONDUCTOR SUBSTRATE FROM THE FUNCTIONAL LAYER BUILT ON IT
A process separates a main body of a semiconductor substrate from a functional layer. The method includes the steps of implanting ions into a semiconductor...
2018/0158719 METHOD FOR DIRECT BONDING OF SUBSTRATES INCLUDING THINNING OF THE EDGES OF AT LEAST ONE OF THE TWO SUBSTRATES
A method for direct bonding between at least a first and a second substrate, each of the first and second substrates containing a first and a second main...
2018/0158718 SEMICONDUCTOR DEVICE HAVING AIR GAP SPACERS AND METHOD FOR FABRICATING THE SAME
A method for fabricating a semiconductor device includes providing a substrate including a cell region including a bit line structure, a bit line spacer and a...
2018/0158717 WAFER EDGE LIFT PIN DESIGN FOR MANUFACTURING A SEMICONDUCTOR DEVICE
A wafer edge lift pin of an apparatus for manufacturing a semiconductor device is described. The wafer edge lift pin includes a top section containing a notch...
2018/0158716 PAD RAISING MECHANISM IN WAFER POSITIONING PEDESTAL FOR SEMICONDUCTOR PROCESSING
An assembly used in a process chamber for depositing a film on a wafer. A pedestal assembly includes a pedestal movably mounted to a main frame. A lift pad...
2018/0158715 SUBSTRATE SUPPORTING PIN, SUBSTRATE SUPPORTING DEVICE AND SUBSTRATE ACCESS SYSTEM
The disclosure provides a substrate supporting pin, a substrate supporting device and a substrate access system. The substrate supporting pin is used to...
2018/0158714 SUBSTRATE PROCESSING APPARATUS
A substrate processing apparatus and technique, capable of processing substrates regardless of the types of substrates, include a loadlock chamber...
2018/0158713 ELEMENT CHIP MANUFACTURING METHOD
Provided is a method of manufacturing a semiconductor chip, the method comprising: preparing a plurality of semiconductor chips, each of which has a surface to...
2018/0158712 Method for Bonding Thin Semiconductor Chips to a Substrate
A method for bonding thin chips to a target substrate is described herein. According to an example method, an adhesive tape is provided with thinned chips...
2018/0158711 PLASMA PROCESSING APPARATUS
A plasma processing apparatus includes an electrostatic chuck and a lifter pin. The electrostatic chuck has a mounting surface on which a target object is...
2018/0158710 HIGH-TECH TEMPERATURE CONTROL DEVICE FOR SEMICONDUCTOR MANUFACTURING FACILITY
The present invention relates to a high-tech temperature control device for a semiconductor manufacturing facility and, more specifically, to a high-tech...
2018/0158709 SUBSTRATE TREATMENT APPARATUS
A substrate treatment apparatus includes a lower electrode, an upper electrode, a first AC power supply that is connected to the upper electrode and supplies...
2018/0158708 METHOD FOR AUTOMATIC SENDING CASSETTE POD
A system for sending a cassette pod is provided. The system includes a processing machine having a load port for receiving the cassette pod. The system further...
2018/0158707 RFID PART AUTHENTICATION AND TRACKING OF PROCESSING COMPONENTS
Embodiments provided herein provide for methods and apparatus for detecting, authenticating, and tracking processing components including consumable components...
2018/0158706 Micro Elements Transfer Device and Method
A transfer device for micro element with a test circuit can test the micro element during transfer. The transfer device for micro elements includes: a base...
2018/0158705 OBJECT DETECTION SYSTEM
An object detection system utilizes a teach cycle performed with a low-pressure blow-off (i.e. positive pressure) instead of vacuum (negative pressure). During...
2018/0158704 PICKING UP AND PLACING OF MICRO LIGHT EMITTING DIODES USING POLYGON TOOL
Embodiments relate to placing of semiconductor devices on a target substrate using a pick and place head (PPH) having a cross-section of a polygon shape and...
2018/0158703 LASER PROCESSING APPARATUS AND METHOD FOR MANUFACTURING THE SAME
A laser processing apparatus includes a laser beam generating unit which emits a laser beam, a lens unit which divides the laser beam into a plurality of laser...
2018/0158702 RAPID THERMAL PROCESSING METHOD AND APPARATUS FOR PROGRAMMING THE PINNED LAYER OF SPINTRONIC DEVICES
A rapid thermal processing method and apparatus used for programming the pinned layer of spintronic devices, the apparatus comprising a rapid thermal annealing...
2018/0158701 SUBSTRATE LIQUID PROCESSING APPARATUS AND SUBSTRATE LIQUID PROCESSING METHOD
A substrate liquid processing apparatus includes a placing unit which places thereon a substrate; a liquid processing unit which processes the substrate by...
2018/0158700 SUBSTRATE PROCESSING SYSTEM AND SUBSTRATE PROCESSING METHOD
Provided are a substrate processing system and a substrate processing method that can obtain expected etching rate and selection ratio, and perform stable...
2018/0158699 METHOD OF CLEANING SUBSTRATE PROCESSING APPARATUS AND SYSTEM OF CLEANING SUBSTRATE PROCESSING APPARATUS
Disclosed is a method of cleaning a substrate processing apparatus in which a substrate having a surface wet by a liquid is brought into contact with a...
2018/0158698 SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS
A substrate processing method is a substrate processing method which applies sequentially common etching processing which is common to each of a plurality of...
2018/0158697 ELECTRONIC-DEVICE-PROTECTING FILM, ELECTRONIC-DEVICE-PROTECTING MEMBER, METHOD FOR MANUFACTURING ELECTRONIC...
Provided are an electronic-device-protecting film used when semiconductor parts obtained by segmentation are to be sealed in the form of an array using a...
2018/0158696 SEMICONDUCTOR DEVICE WITH RECESS AND METHOD OF MAKING
A semiconductor device is provided with a substrate made of a semiconductor material, an interconnect layer, at least one electronic element, and a sealing...
2018/0158695 MANUFACTURING METHOD AND WIRING SUBSTRATE WITH THROUGH ELECTRODE
There is provided a method for manufacturing a wiring substrate with a through electrode, the method including providing a device substrate having a through...
2018/0158694 TEXTILE PATTERNING FOR SUBTRACTIVELY-PATTERNED SELF-ALIGNED INTERCONNECTS, PLUGS, AND VIAS
Embodiments of the invention include methods of forming a textile patterned hardmask. In an embodiment, a first hardmask and a second hardmask are formed over...
2018/0158693 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
There is provided a method of manufacturing a semiconductor device, which includes: supplying a raw material for polymerization to a porous low dielectric...
2018/0158692 APPARATUS FOR ACHIEVING ULTRA-HIGH SELECTIVITY WHILE ETCHING SILICON NITRIDE
Apparatuses for processing substrates are provided herein. Apparatuses include a plasma etch chamber having a showerhead and pedestal for holding a substrate...
2018/0158691 MASK-INTEGRATED SURFACE PROTECTIVE FILM
A mask-integrated surface protective film, containing: a substrate film, and a mask material layer provided on the substrate film; wherein the mask material...
2018/0158690 PHOTOLITHOGRAPHY MASK PLATE
A photolithography mask plate, the photolithography mask plate including: a substrate; a carbon nanotube composite structure on a surface of the substrate,...
2018/0158689 METHOD OF SMOOTHING A SURFACE
According to the invention there is provided a method of smoothing a surface of a silicon substrate comprising the steps of: providing a silicon substrate...
2018/0158688 METHODS FOR FORMING A TRANSITION METAL NIOBIUM NITRIDE FILM ON A SUBSTRATE BY ATOMIC LAYER DEPOSITION AND...
Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures are provided....
2018/0158687 HALOALKYNYL DICOBALT HEXACARBONYL PRECURSORS FOR CHEMICAL VAPOR DEPOSITION OF COBALT
The present disclosure relates to a bridging asymmetric haloalkynyl dicobalt hexacarbonyl precursors, and ultra high purity versions thereof, methods of...
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