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Patent # Description
2018/0174899 BARRIER LAYERS IN TRENCHES AND VIAS
A semiconductor structure includes a dielectric layer having a trench formed therein and a barrier layer formed on a bottom and sidewalls of the trench, and on...
2018/0174898 Device and Method for Reducing Contact Resistance of a Metal
A device comprises a semiconductor substrate; a dielectric layer deposited over the semiconductor substrate, the dielectric layer including a trench; and a...
2018/0174897 METHOD OF SELECTIVE DEPOSITION FOR BEOL DIELECTRIC ETCH
Embodiments of the invention address several issues and problems associated with etching of dielectric materials for BEOL applications. According to one...
2018/0174896 INTERCONNECTION LINES HAVING VARIABLE WIDTHS AND PARTIALLY SELF-ALIGNED CONTINUITY CUTS
A semiconductor cell includes a dielectric layer. An array of parallel metal lines is disposed in a longitudinal direction within the dielectric layer. The...
2018/0174895 INTERCONNECTION CELLS HAVING VARIABLE WIDTH METAL LINES AND FULLY-SELF ALIGNED VARIABLE LENGTH CONTINUITY CUTS
A method includes providing a semiconductor structure having a mandrel layer and a hardmask layer disposed above a dielectric layer. A mandrel cell is...
2018/0174894 APPARATUS AND METHOD FOR FORMING INTERCONNECTION LINES HAVING VARIABLE PITCH AND VARIABLE WIDTHS
A semiconductor cell includes a dielectric layer. An array of at least four parallel metal lines is disposed within the dielectric layer, the metal lines...
2018/0174893 VIA BLOCKING LAYER
Techniques are disclosed for insulating or electrically isolating select vias within a given interconnect layer, so a conductive routing can skip over those...
2018/0174892 HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING AN ISOLATION REGION
A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a...
2018/0174891 SEMICONDUCTOR DEVICE
An object is to provide a semiconductor device with reduced standby power. A transistor including an oxide semiconductor as an active layer is used as a...
2018/0174890 SLIT STRESS MODULATION IN SEMICONDUCTOR SUBSTRATES
A disclosed example to modulate slit stress in a semiconductor substrate includes a first controller to, after obtaining a wafer stress measurement of the...
2018/0174889 METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING FIN-SHAPED ACTIVE REGIONS
A method of manufacturing a semiconductor device includes forming a plurality of fins by forming a plurality of first device isolating trenches repeated at a...
2018/0174888 METHOD FOR FORMING TRENCH LINER PASSIVATION
In a method for fabricating a semiconductor device, a trench is etched in a semiconductor substrate having a top surface, and a lining oxide layer is formed...
2018/0174887 TRENCH ISOLATED IC WITH TRANSISTORS HAVING LOCOS GATE DIELECTRIC
An integrated circuit (IC) including at least one transistor having a metal-oxide-semiconductor (MOS) gate includes a substrate having a semiconductor surface....
2018/0174886 Interconnect Structure and Method of Forming the Same
An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a lower etch stop layer (ESL);...
2018/0174885 Semiconductor Device, Method, and Tool of Manufacture
An embodiment is an apparatus. The apparatus includes: a collective wafer platter including a plurality of individual wafer pockets, the individual wafer...
2018/0174884 SUBSTRATE HOLDING METHOD, SUBSTRATE HOLDING APPARATUS, EXPOSURE APPARATUS AND EXPOSURE METHOD
A wafer holding apparatus for holding a wafer including a wafer holder on which the wafer is placed; and a lift pin that is configured to be lifted up and down...
2018/0174883 PLASMA DISTRIBUTION CONTROL
A system is configured to perform plasma related fabrication processes. The system includes a process chamber and a wafer stage positioned within the process...
2018/0174882 THERMOPLASTIC TEMPORARY ADHESIVE FOR SILICON HANDLER WITH INFRA-RED LASER WAFER DE-BONDING
A bonding material including a phenoxy resin thermoplastic component, and a carbon black filler component. The carbon black filler component is present in an...
2018/0174881 WAFER LEVEL FLAT NO-LEAD SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURE
Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming...
2018/0174880 ROTATABLE ELECTROSTATIC CHUCK HAVING BACKSIDE GAS SUPPLY
Embodiments of a substrate support pedestal and an electrostatic chuck incorporating same are disclosed herein. In some embodiments, a substrate support...
2018/0174879 REDUCING TEMPERATURE TRANSITION IN A SUBSTRATE SUPPORT
A temperature controller for a substrate processing system includes an interface configured to receive a processing temperature corresponding to a desired...
2018/0174878 WAFER HOLDING UNIT
A wafer holding unit includes a disk-shaped ceramic substrate having a wafer mounting surface on an upper surface of the substrate, an RF electrode, for...
2018/0174877 SUBSTRATE PROCESSING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A substrate processing apparatus includes an accommodating chamber including a loading shelf configured to load a storage vessel that accommodates a substrate;...
2018/0174876 MAGNETIC WAFER GRIPPER
Systems and methods are described for transferring wafers between processing steps in the fabrication of solar cells. The wafers may be processed using a...
2018/0174874 WAFER CARRIER HAVING A DOOR WITH A UNITARY BODY
A front opening wafer carrier includes: a container portion. The container portion includes a top wall, a bottom wall, a pair of side walls, a back wall, and a...
2018/0174873 Apparatus And Method For Processing Thin Substrates
Processing methods and apparatus for thin substrates are disclosed. The methods and apparatus rotate a thin substrate without exposing the thin substrate to...
2018/0174872 CHAMBER FOR DEGASSING SUBSTRATES
A heater or cooler chamber for a batch of more than one workpiece includes a heat storage block. In the block a multitude of pockets are provided, whereby each...
2018/0174871 BONDING APPARATUS
A bonding apparatus includes a stage supporting a substrate, a first bonding head at a first side of the stage, the first bonding head to pick up a first chip...
2018/0174870 SYSTEMS AND METHODS FOR METASTABLE ACTIVATED RADICAL SELECTIVE STRIP AND ETCH USING DUAL PLENUM SHOWERHEAD
A substrate processing system for selectively etching a substrate includes a first chamber and a second chamber. A first gas delivery system supplies an inert...
2018/0174869 TEMPERATURE CONTROLLER AND A PLASMA-PROCESSING APPARATUS INCLUDING THE SAME
A temperature controller of a plasma-processing apparatus including a heating unit and a cooling unit. The heating unit is configured to heat a liner on an...
2018/0174868 SUBSTRATE TREATMENT DEVICE AND SUBSTRATE TREATMENT METHOD
A substrate treatment device includes: a substrate holding unit including a plate-shaped holding table that rotatably holds a substrate so that a surface of...
2018/0174867 RESIST REMOVING APPARATUS AND METHOD FOR REMOVING RESIST
A nozzle as a whole is formed into a cylindrical structure having a supply surface with a supply opening as a bottom surface, and the supply surface is...
2018/0174866 SEMICONDUCTOR PROCESSING APPARATUS WITH A CERAMIC-COMPRISING SURFACE WHICH EXHIBITS FRACTURE TOUGHNESS AND...
A solid solution-comprising ceramic article useful in semiconductor processing, which article may be in the form of a solid, bulk ceramic, or may be in the...
2018/0174865 FAN-OUT STRUCTURE AND METHOD OF FABRICATING THE SAME
A semiconductor structure and a method of forming include a first semiconductor die and a first dummy die over a carrier, wherein a thickness of the first...
2018/0174864 MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
An object is to provide a technology that reduces the number of components and that is capable of suppressing the cost. A structure including semiconductor...
2018/0174863 ELECTRONIC DEVICE, THIN FILM TRANSISTOR, ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
Disclosed are an electronic device and the manufacturing method thereof, a manufacturing method of a thin film transistor, and an array substrate and...
2018/0174862 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
In a semiconductor device including an oxide semiconductor, a change in electrical characteristics is inhibited and reliability is improved. The semiconductor...
2018/0174861 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device may include forming first trenches that define active patterns extending in a first direction on a substrate,...
2018/0174860 DESIGNER ATOMIC LAYER ETCHING
Methods for evaluating synergy of modification and removal operations for a wide variety of materials to determine process conditions for self-limiting etching...
2018/0174859 ETCHING METHOD
It is disclosed an etching method, comprising: applying a photoresist layer on a layer to be patterned; forming a photoresist removing region and a photoresist...
2018/0174858 TECHNIQUE TO DEPOSIT SIDEWALL PASSIVATION FOR HIGH ASPECT RATIO CYLINDER ETCH
Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a semiconductor substrate....
2018/0174857 IMPRINT APPARATUS, IMPRINT METHOD, AND ARTICLE MANUFACTURING METHOD
An imprint apparatus cures an imprint material supplied onto a substrate held by a substrate holder by bringing a mold held by a mold holder into contact with...
2018/0174856 SUBSTRATE PROCESSING DEVICE
Provided is a substrate processing device including a processing bath (12) configured to store processing liquid, and to process a plurality of substrates (24)...
2018/0174855 METHOD FOR FIN FORMATION WITH A SELF-ALIGNED DIRECTED SELF-ASSEMBLY PROCESS AND CUT-LAST SCHEME
A method of making a semiconductor device includes disposing a first hard mask (HM), amorphous silicon, and second HM on a substrate; disposing oxide and...
2018/0174854 Fin-Like Field Effect Transistor Patterning Methods for Increasing Process Margins
Methods are disclosed herein for patterning integrated circuit devices, such as fin-like field effect transistor devices. An exemplary method includes forming...
2018/0174853 Pattern Fidelity Enhancement with Directional Patterning Technology
A method for semiconductor manufacturing includes providing a substrate and a patterning layer over the substrate; forming a hole in the patterning layer;...
2018/0174852 SACRIFICIAL SHORTING STRAPS FOR SUPERCONDUCTING QUBITS
A technique relates to protecting a tunnel junction. A first electrode paddle and a second electrode paddle are on a substrate. The first and second electrode...
2018/0174851 THIN FILM METAL SILICIDES AND METHODS FOR FORMATION
The disclosed subject matter provides thin films including a metal silicide and methods for forming such films. The disclosed subject matter can provide...
2018/0174850 PRODUCTION METHOD FOR SEMICONDUCTOR DEVICE ELECTRODE
The present invention provides a method for producing a semiconductor device electrode, the method including the steps of: forming a first thin-film including...
2018/0174849 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
According to one embodiment, a semiconductor device includes first, second, and third electrodes, and first, second, third, fourth, and fifth semiconductor...
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