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Patent # Description
2018/0182900 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a semiconductor substrate having a tunneling well, a...
2018/0182899 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an...
2018/0182898 Substrates and Transistors with 2D Material Channels on 3D Geometries
Roughly described, a transistor is formed with a semiconductor 2D material layer wrapped conformally on at least part of a 3D structure. The 3D structure can...
2018/0182897 THIN FILM TRANSISTOR, METHOD FOR FABRICATING THE SAME, DISPLAY SUBSTRATE AND DISPLAY DEVICE
A thin film transistor, a method for fabricating the same, a display substrate, and a display device are disclosed. The method comprises: forming in sequence a...
2018/0182896 Thin Film Transistor And Method For Manufacturing The Same
A TFT is disclosed. An anti-damage layer is arranged between an active layer and a source of the TFT, and the anti-damage layer is arranged between the active...
2018/0182895 THIN FILM TRANSISTOR, ARRAY SUBSTRATE AND THEIR MANUFACTURING METHODS, AND DISPLAY APPARATUS
The present disclosure discloses a thin film transistor, an array substrate and their manufacturing methods, and a display apparatus. The method for...
2018/0182894 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
To provide a highly reliable semiconductor device manufactured by giving stable electric characteristics to a semiconductor device including an oxide...
2018/0182893 PROCESS FOR FABRICATING A FIELD EFFECT TRANSISTOR HAVING A COATING GATE
A process for fabricating a gate-wrap-around field-effect transistor is provided, including: providing a superposition of first to third nanowires, each made...
2018/0182892 PRECISE JUNCTION PLACEMENT IN VERTICAL SEMICONDUCTOR DEVICES USING ETCH STOP LAYERS
A semiconductor device is provided that includes a first of a source region and a drain region comprised of a first semiconductor material, wherein an etch...
2018/0182891 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
An interlayer insulating film is formed on a gate insulating film and a gate electrode, and the interlayer insulating film is opened forming contact holes....
2018/0182890 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device according to one embodiment includes a semiconductor substrate having a first surface, an insulating isolation film disposed at the...
2018/0182889 SiC-MOSFET AND METHOD OF MANUFACTURING THE SAME
An n-type drift region, a p-type first body region and a p-type contact region are formed on an SiC substrate by epitaxial growth. An opening is formed within...
2018/0182888 SEMICONDUCTOR DEVICE
Each first p.sup.+-type region is provided between adjacent trenches embedded with a MOS gate and is in contact with a p-type base region. Second p.sup.+-type...
2018/0182887 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
A silicon carbide semiconductor device, including a silicon carbide substrate, a drift layer provided on a front surface of the silicon carbide substrate, an...
2018/0182886 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A p-type base region is constituted by first to fifth p-type base regions. The first p-type base region is provided deeper than gate trenches. The second...
2018/0182885 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF
A semiconductor device includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a first...
2018/0182884 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
On a front surface of a semiconductor base, a first n.sup.--type drift region, a second n-type drift region, and a third n.sup.+-type drift region are...
2018/0182883 SWITCHING ELEMENT AND METHOD OF MANUFACTURING SWITCHING ELEMENT
A switching element includes a semiconductor substrate that includes a first n-type semiconductor layer, a p-type body layer constituted by an epitaxial layer,...
2018/0182882 ELECTRONIC DEVICE USING GROUP III NITRIDE SEMICONDUCTOR AND ITS FABRICATION METHOD
The present invention discloses an electronic device formed of a group III nitride. In one embodiment, a substrate is fabricated by the ammonothermal method...
2018/0182881 ELECTRONIC DEVICE USING GROUP III NITRIDE SEMICONDUCTOR AND ITS FABRICATION METHOD
The present invention discloses an electronic device formed of a group III nitride. In one embodiment, a substrate is fabricated by the ammonothermal method...
2018/0182880 TRANSISTOR HAVING HIGH ELECTRON MOBILITY
A method for manufacturing a transistor having high electron mobility, encompassing a substrate having a heterostructure, in particular an AlGaN/GaN...
2018/0182879 ALUMINUM-GALLIUM-NITRIDE COMPOUND/GALLIUM-NITRIDE HIGH-ELECTRON-MOBILITY TRANSISTOR
A nitride high electron mobility transistor having a strain balance of an aluminum gallium nitride insertion layer is described. The transistor sequentially...
2018/0182878 ENHANCEMENT-MODE TRANSISTOR COMPRISING AN AlGaN/GaN HETEROJUNCTION AND A P-DOPED DIAMOND GATE
An enhancement-mode field-effect transistor comprising at least: a heterojunction formed by at least one first layer comprising GaN and at least one second...
2018/0182877 SEMICONDUCTOR STRUCTURES AND METHOD FOR FABRICATING THE SAME
A semiconductor structure is provided. The semiconductor structure includes a silicon substrate having a groove, an epitaxial layer disposed on the sidewalls...
2018/0182876 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor substrate having a first surface and a second surface, first to eighth regions, a first thyristor, and a second...
2018/0182875 TRENCH GATE IGBT
A high-performance trench gate IGBT is provided. A trench gate IGBT according to one embodiment includes: a semiconductor substrate (11); a channel layer (15)...
2018/0182874 IGBT SEMICONDUCTOR STRUCTURE
IGBT semiconductor structure having a p.sup.+ substrate, an n.sup.- layer, at least one p region adjacent to the n.sup.- layer, and at least one n.sup.+ region...
2018/0182873 ELECTRONIC DEVICE USING GROUP III NITRIDE SEMICONDUCTOR AND ITS FABRICATION METHOD
The present invention discloses an electronic device formed of a group III nitride. In one embodiment, a substrate is fabricated by the ammonothermal method...
2018/0182872 ELECTRONIC DEVICE USING GROUP III NITRIDE SEMICONDUCTOR AND ITS FABRICATION METHOD
The present invention discloses an electronic device formed of a group III nitride. In one embodiment, a substrate is fabricated by the ammonothermal method...
2018/0182871 HEMT HAVING HEAVILY DOPED N-TYPE REGIONS AND PROCESS OF FORMING THE SAME
A HEMT made of nitride semiconductor materials and a process of forming the same are disclosed, where the HEMT has n-type regions beneath the source and drain...
2018/0182870 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
To provide a semiconductor device with favorable electrical characteristics. To provide a method for manufacturing a semiconductor device with high...
2018/0182869 THIN FILM TRANSISTOR AND METHOD OF FABRICATING THE SAME
The present application provides a method of fabricating a thin film transistor, including forming an active layer on the substrate; simultaneously forming a...
2018/0182868 Method for Forming Horizontal Nanowires and Devices Manufactured Thereof
A method for forming horizontal nanowires, the method comprising providing a substrate comprising a dielectric layer and a fin structure comprising a portion...
2018/0182867 FIN FIELD EFFECT TRANSISTOR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR WITH DUAL STRAINED CHANNELS WITH SOLID...
A method of forming semiconductor devices that includes forming an oxide that is doped with a punch through dopant on a surface of a first semiconductor...
2018/0182866 FINFET ISOLATION STRUCTURE AND METHOD FOR FABRICATING THE SAME
A semiconductor device includes a semiconductor substrate and a semiconductor fin on the semiconductor substrate and a fin isolation structure on the...
2018/0182865 METHOD OF MANUFACTURING LOW TEMPERATURE POLY-SILICON ARRAY SUBSTRATE, ARRAY SUBSTRATE, AND DISPLAY PANEL
The present disclosure proposes a method of manufacturing a low temperature poly-silicon array substrate, an array substrate and a display panel. The method...
2018/0182864 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INTEGRATING A VERTICAL CONDUCTION TRANSISTOR, AND SEMICONDUCTOR...
A method of manufacturing a vertical conduction semiconductor device comprising the steps of: forming a recess in a monocrystalline silicon substrate; forming...
2018/0182863 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
A semiconductor device includes a substrate having a first conductive type. An epitaxial layer having a second conductive type is disposed on the substrate. A...
2018/0182862 METHOD FOR FORMING A SEMICONDUCTOR STRUCTURE
A method for forming a semiconductor structure includes the following steps. First, a preliminary structure is provided. The preliminary structure includes a...
2018/0182861 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating a semiconductor device includes: forming a semiconductor structure including a pattern; forming an epitaxial layer having a first...
2018/0182860 MULTI-THRESHOLD VOLTAGE SEMICONDUCTOR DEVICE
A semiconductor device preferably includes: a first metal-oxide semiconductor (MOS) transistor on a substrate; a first ferroelectric (FE) layer connected to...
2018/0182859 METAL GATE STRUCTURE AND METHODS THEREOF
Provided is a metal gate structure and related methods that include forming a first fin and a second fin on a substrate. In various embodiments, the first fin...
2018/0182858 CIRCUITS USING GATE-ALL-AROUND TECHNOLOGY
A semiconductor structure includes a first GAA transistor and a second GAA transistor. The first GAA transistor includes: a first diffusion region, a second...
2018/0182857 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A Fin FET semiconductor device includes a fin structure extending in a first direction and extending from an isolation insulating layer. The Fin FET device...
2018/0182856 SEMICONDUCTOR DEVICES AND CONTACT PLUGS
A semiconductor device has a high electric connection reliability and includes a base substrate having a connection target layer, a lower contact plug formed...
2018/0182855 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
Characteristics of a semiconductor device are improved. An active region including a MOS transistor is structured such that the active region includes, in a...
2018/0182854 SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTCOR DEVICE, AND ELECTRONIC DEVICE
A semiconductor device includes a compound semiconductor layer, a gate electrode, and first and second insulating layers. The first insulating layer covers the...
2018/0182853 GALLIUM NITRIDE SEMICONDUCTOR DEVICE WITH IMPROVED TERMINATION SCHEME
This invention discloses a gallium nitride based semiconductor power device disposed in a semiconductor substrate. The power device comprises a termination...
2018/0182852 HOMOEPITAXIAL TUNNEL BARRIERS WITH HYDROGENATED GRAPHENE-ON-GRAPHENE FOR ROOM TEMPERATURE ELECTRONIC DEVICE...
A homoepitaxial, ultrathin tunnel barrier-based electronic device in which the tunnel barrier and transport channel are made of the same material--graphene.
2018/0182851 V-GROOVED VERTICAL CHANNEL-TYPE 3D SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
A method of fabricating a vertical channel 3D semiconductor memory device is disclosed. In one aspect, the method comprises providing a stack of alternating...
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