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Patent # Description
2018/0182749 DYNAMICALLY TRIGGERED ELECTROSTATIC DISCHARGE CELL
An electrostatic discharge (ESD) protection circuit includes an active shunt transistor, a first pull-down transistor, and a second pull-down transistor. The...
2018/0182748 SCAN DRIVER AND DISPLAY DEVICE HAVING THE SAME
A scan driver has a plurality of stages configured to supply a scan signal to scan lines. The plurality of stages include a stage coupled to a scan line of the...
2018/0182747 INTEGRATED SEMICONDUCTOR DEVICE HAVING ISOLATION STRUCTURE FOR REDUCING NOISE
An integrated semiconductor device includes a first transistor and a second transistor formed on a semiconductor substrate, and an isolation structure located...
2018/0182746 METHOD FOR INTEGRATING A LIGHT EMITTING DEVICE
Light emitting devices and methods of integrating micro LED devices into light emitting device are described. In an embodiment a light emitting device includes...
2018/0182745 SEMICONDUCTOR MODULE
A semiconductor module includes: a first substrate having a first insulating substrate and a first conductor layer; a power device part having a first...
2018/0182744 High Bandwidth, Low Profile Multi-Die Package
An embodiment includes an apparatus comprising: a substrate; a first die including a processor core; a second die not including a processor core; and a third...
2018/0182743 LED MODULE AND METHOD FOR FABRICATING THE SAME
Disclosed is a method for fabricating an LED module. The method includes: constructing a chip-on-carrier including a chip retainer having a horizontal bonding...
2018/0182742 MANUFACTURING METHOD FOR HIGH-VOLTAGE LIGHT-EMITTING DIODE
The disclosure relates to a high-voltage light-emitting diode (HV LED) and a manufacturing method thereof. A plurality of LED dies connected in series, in...
2018/0182741 NANOSCALE LED ELECTRODE ASSEMBLY HAVING IMPROVED ELECTRICAL CONTACT AND MANUFACTURING METHOD THEREOF
Provided are a method of manufacturing a nanoscale light-emitting diode (LED) electrode assembly having improved electrical contacts, and more particularly, a...
2018/0182740 MICRO-LED MODULE AND METHOD FOR FABRICATING THE SAME
A micro-LED module is disclosed. The micro-LED module includes: a micro-LED including a plurality of LED cells, each of which includes a first conductive...
2018/0182739 LIGHT-EMITTING DIODE ARRANGEMENT AND METHOD FOR THE PRODUCTION THEREOF
According to the present disclosure, a light-emitting diode arrangement provides a substrate, first LEDs, which are arranged on the substrate, second LEDs,...
2018/0182738 STACKED SEMICONDUCTOR DIES WITH SELECTIVE CAPILLARY UNDER FILL
Stacked semiconductor dies are provided with selective capillary under fill to avoid wafer warpage during curing. In one embodiment, a method of manufacturing...
2018/0182737 SEMICONDUCTOR DEVICE
A semiconductor device comprising a plurality of semiconductor chips and a plurality of electric wirings. The plurality of semiconductor chips are stacked in a...
2018/0182736 Thermal Management of Molded Packages
An embodiment includes an apparatus comprising: a semiconductor die; package molding that is molded onto and conformal with a first die surface of the...
2018/0182735 LAND GRID ARRAY PACKAGE EXTENSION
BGA packages with a LGA package extension. First lands on a substrate are populated with solder balls, while only solder paste is dispensed on second lands...
2018/0182734 METHODS OF FORMING PACKAGE STRUCTURES FOR ENHANCED MEMORY CAPACITY AND STRUCTURES FORMED THEREBY
Methods of forming microelectronic package structures, and structures formed thereby, are described. Those methods/structures may include attaching a die on a...
2018/0182733 SYSTEMS AND METHODS FOR BONDING SEMICONDUCTOR ELEMENTS
A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first...
2018/0182732 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Provided is a semiconductor device comprising; a semiconductor chip, a first electrode pair, a first wire group that has a plurality of bonding wires...
2018/0182731 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
As one embodiment, a method of manufacturing a semiconductor device includes the following steps. That is, the method of manufacturing a semiconductor device...
2018/0182730 COMMON CONTACT SEMICONDUCTOR DEVICE PACKAGE
A semiconductor device package includes a conductive clip that has a recess and that is configured to mount to a substrate along a first surface and a second...
2018/0182729 ELECTRONIC DEVICE AND MOUNTING STRUCTURE OF THE SAME
An electronic device includes an electronic element, a plurality of first sub-electrodes arrayed in a first direction, a plurality of second sub-electrodes...
2018/0182728 SEMICONDUCTOR DEVICE AND METHOD OF MAKING SEMICONDUCTOR DEVICE
Inexpensive production is achieved while avoiding the degradation of electrical performance caused by the lowering of heat dissipation. The base plate 11 used...
2018/0182727 EMBEDDED SILICON SUBSTRATE FAN-OUT TYPE PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREFOR
An embedded silicon substrate fan-out type packaging structure comprises: a silicon substrate having a first surface and a second surface opposite thereto, at...
2018/0182726 MULTI-LAYER REDISTRIBUTION LAYER FOR WAFER-LEVEL PACKAGING
Aspects of the embodiments include a semiconductor package that includes a printed circuit board (PCB) and a semiconductor die. The semiconductor die including...
2018/0182725 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor substrate, a conductor provided on a main surface of the semiconductor substrate, an insulating layer disposed...
2018/0182724 PACKAGING ASSEMBLY AND METHOD OF MAKING THE SAME
A packaging assembly includes a semiconductor device. The semiconductor device includes a conductive pad having a first width, and an under-bump metallization...
2018/0182723 SIGNAL ISOLATION STRUCTURES FOR EM COMMUNICATION
Methods, systems, and apparatus for EM isolation structures. One of the apparatus includes a communication module, the communication module including: a...
2018/0182722 SEMICONDUCTOR MEMORY DEVICE INCLUDING A DUMMY WORD LINE
A semiconductor memory device having dummy word lines is disclosed. In the semiconductor memory device, a number of dummy word lines are arranged at both ends...
2018/0182721 WAFER STRUCTURE AND SPRAY APPARATUS
A wafer structure and a spray apparatus are provided. An exemplary wafer structure includes a wafer having a central region and a peripheral region surrounding...
2018/0182720 THIN LOW DEFECT RELAXED SILICON GERMANIUM LAYERS ON BULK SILICON SUBSTRATES
A strain relaxed silicon germanium layer that has a low defect density is formed on a surface of a silicon substrate without causing wafer bowing. The strain...
2018/0182719 SEMICONDUCTOR DEVICE
A semiconductor device includes a first and second semiconductor chips, a resistive component, and a semiconductor chip including a first circuit coupled to...
2018/0182718 COMPONENT STIFFENER ARCHITECTURES FOR MICROELECTRONIC PACKAGE STRUCTURES
Methods of forming microelectronic package structures, and structures formed thereby, are described. Those methods/structures may include attaching a stiffener...
2018/0182717 INTEGRATED CIRCUIT DEVICES WITH SELECTIVELY ARRANGED THROUGH SUBSTRATE VIAS AND METHOD OF MANUFACTURE THEREOF
An integrated circuit device includes a device substrate having first and second opposing surfaces, a first component electrode coupled to the first surface,...
2018/0182716 SEMICONDUCTOR DEVICE AND POWER ELECTRONICS APPARATUS
A semiconductor device is provided, the semiconductor device having: a semiconductor chip; a wiring substrate which supports the semiconductor chip and is...
2018/0182715 SEMICONDUCTOR PACKAGE MANUFACTURING METHOD
A plurality of semiconductor packages are manufactured by a method that includes the steps of bonding a plurality of semiconductor chips on the front side of a...
2018/0182714 METHODS FOR FABRICATING SEMICONDUCTOR SHIELDING STRUCTURES
The present disclosure is drawn to, among other things, a method of forming a semiconductor shield from a stock material having a thickness. In some aspects...
2018/0182713 MARK FORMING METHOD, MARK DETECTING METHOD, AND DEVICE MANUFACTURING METHOD
A mark forming method includes: exposing a wafer with a mask image to form first and second resist marks that have different shapes than one another based on a...
2018/0182712 ENHANCED FIDUCIAL VISIBILITY AND RECOGNITION
Particular embodiments described herein provide for a base, a plurality of fiducials on the base, and a fluid in one or more of each of the plurality of...
2018/0182711 CONTACT USING MULTILAYER LINER
An opening is formed within a substrate made of a silicon material, and a cleaning process is performed; after which, the bottom and walls of the opening are...
2018/0182710 Semiconductor Arrangement with a Sealing Structure
A semiconductor arrangement includes a semiconductor body with a first surface, an inner region and an edge region, the edge region surrounding the inner...
2018/0182709 INTEGRATED CIRCUIT INTERCONNECT STRUCTURE HAVING METAL OXIDE ADHESIVE LAYER
Integrated circuit interconnect structures having a metal oxide adhesive layer between conductive interconnects and dielectric material, as well as related...
2018/0182708 CORROSION AND/OR ETCH PROTECTION LAYER FOR CONTACTS AND INTERCONNECT METALLIZATION INTEGRATION
The present disclosure relates to semiconductor structures and, more particularly, to a corrosion and/or etch protection layer for contacts and interconnect...
2018/0182707 SCALABLE EMBEDDED SILICON BRIDGE VIA PILLARS IN LITHOGRAPHICALLY DEFINED VIAS, AND METHODS OF MAKING SAME
An embedded silicon bridge system including tall interconnect via pillars is part of a system in package device. The tall via pillars may span a Z-height...
2018/0182706 SEMICONDUCTOR DEVICE
A semiconductor device includes an insulating film formed to cover an electric fuse (EF1), an insulating film (IL1), an insulating film (IL2), an electric fuse...
2018/0182705 METHOD OF TUNING COMPONENTS WITHIN AN INTEGRACTED CIRCUIT DEVICE
A method of tuning inductive and/or capacitive components within an integrated circuit device. The method comprises measuring bare-die mounted performance of...
2018/0182704 SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
The disclosure relates to an electronic module and a manufacturing method of the same. The electronic module includes a substrate, an electronic component, a...
2018/0182703 Interconnect Structure and Method of Forming the Same
An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a low-k (LK) dielectric layer...
2018/0182702 METHOD OF FORMING HIGH DENSITY, HIGH SHORTING MARGIN, AND LOW CAPACITANCE INTERCONNECTS BY ALTERNATING RECESSED...
Embodiments of the invention describe low capacitance interconnect structures for semiconductor devices and methods for manufacturing such devices. According...
2018/0182701 WIRING BOARD AND SEMICONDUCTOR DEVICE
A wiring board includes an insulator layer having a top surface, and a plurality of pads arranged in a pad arrangement region on the top surface of the...
2018/0182700 SEMICONDUCTOR DEVICE
A semiconductor device which provides improved reliability. The semiconductor device includes: a wiring substrate having a first surface and a second surface...
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