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Patent # Description
2018/0269332 TFT, METHOD FOR DRIVING THE SAME, ARRAY SUBSTRATE AND DISPLAY DEVICE
A TFT, a method for driving TFT, an array substrate, and a display device are disclosed. The TFT comprises a first gate on a base plate, an active layer...
2018/0269331 THIN-FILM TRANSISTOR, MANUFACTURING METHOD FOR THE SAME, DISPLAY PANEL
A thin-film transistor, a manufacturing for the same, and a display panel are provided. In the annealing process, the aluminum layer combines with oxygen ions...
2018/0269330 Semiconductor Device And Manufacturing Method Thereof
A semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer,...
2018/0269329 TIGHT PITCH VERTICAL TRANSISTOR EEPROM
A memory device including a first conductivity type vertically orientated semiconductor device in a first region of a substrate and a second conductivity type...
2018/0269328 DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
A display apparatus includes a substrate, an emission layer on the substrate; a planarization layer between the substrate and the emission layer; and a...
2018/0269327 SEMICONDUCTOR DEVICE
A high-performance semiconductor device with high reliability is provided. The semiconductor device includes a first transistor, a second transistor, a first...
2018/0269326 REPLACEMENT METAL GATE STRUCTURES
Replacement metal gate structures with improved chamfered workfunction metal and self-aligned contact and methods of manufacture are provided. The method...
2018/0269325 WRAPPED SOURCE/DRAIN CONTACTS WITH ENHANCED AREA
Methods of forming semiconductor devices include forming a first dielectric layer over a semiconductor fin. A second dielectric layer is formed around the...
2018/0269324 WRAPPED SOURCE/DRAIN CONTACTS WITH ENHANCED AREA
Semiconductor device and methods of forming the same, include forming a first dielectric layer over a semiconductor fin. A second dielectric layer is formed...
2018/0269323 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME
A semiconductor device includes an n channel conductivity type FET having a channel formation region formed in a first region on a main surface of a...
2018/0269322 Power MOSFETs with Superior High Frequency Figure-of-Merit and Methods of Forming Same
An insulated-gate field effect transistor includes a substrate having a drift region and a source region of first conductivity type, and a base region and...
2018/0269321 SEMICONDUCTOR ARRANGEMENT WITH ONE OR MORE SEMICONDUCTOR COLUMNS
A semiconductor arrangement comprises a substrate region and a first semiconductor column projecting from the substrate region. The semiconductor arrangement...
2018/0269320 FORMING A COMBINATION OF LONG CHANNEL DEVICES AND VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTORS ON THE SAME...
A method of forming a vertical transport fin field effect transistor and a long-channel field effect transistor on the same substrate, including, forming a...
2018/0269319 HIGH VOLTAGE DEVICE AND MANUFACTURING METHOD THEREOF
The invention provides a high voltage device, including: an operation layer, formed on a substrate; a body region and a well, formed in the operation layer to...
2018/0269318 POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING POWER SEMICONDUCTOR DEVICE
A power semiconductor device of the present invention includes: a semiconductor base body which has a super junction structure formed of a plurality of first...
2018/0269317 SEMICONDUCTOR DEVICE WITH EXTENDED ELECTRICALLY-SAFE OPERATING AREA
In at least some embodiments, a semiconductor device comprises a source region is formed within a well. The source region comprises a first dopant type, and...
2018/0269316 SEMICONDUCTOR BASE SUBSTANCE, SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR BASE SUBSTANCE, AND...
A semiconductor base substance includes: a substrate; a buffer layer which is made of a nitride semiconductor and provided on the substrate; and a channel...
2018/0269315 SEMICONDUCTOR DEVICE
A semiconductor device is provided, wherein a semiconductor substrate includes: a first trench portion provided from a front surface of the semiconductor...
2018/0269314 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device is provided, the semiconductor device including a base layer of a first conductivity type having a MOS gate structure formed on a front...
2018/0269313 POWER SEMICONDUCTOR DEVICE
A power semiconductor device includes: a semiconductor body coupled to a first load terminal and a second load terminal, and includes: a first doped region of...
2018/0269312 VERTICAL FIELD-EFFECT TRANSISTORS WITH CONTROLLED DIMENSIONS
Device structures and fabrication methods for a vertical field-effect transistor. A semiconductor fin is formed that projects from a first source/drain region....
2018/0269311 SEMICONDUCTOR SUPER-JUNCTION POWER DEVICE AND MANUFACTURING METHOD THEREFOR
The present disclosure relates to the technical field of semiconductor power devices, and in particular relates to a semiconductor super-junction power device...
2018/0269310 REDUCING RESISTANCE OF BOTTOM SOURCE/DRAIN IN VERTICAL CHANNEL DEVICES
During a fabrication of a semiconductor device, a recess is created in a substrate material disposed along a direction of a plane of fabrication. A layer of a...
2018/0269309 REPLACEMENT METAL GATE STRUCTURES
Replacement metal gate structures with improved chamfered workfunction metal and self-aligned contact and methods of manufacture are provided. The method...
2018/0269308 SEMICONDUCTOR DEVICE WITH METAL GATE
A semiconductor device includes a substrate and a gate structure on the substrate, in which the gate structure includes a high-k dielectric layer on the...
2018/0269307 Semiconductor Device, Method, and Tool of Manufacture
In an embodiment, a method includes: performing a self-limiting process to modify a top surface of a wafer; after the self-limiting process completes, removing...
2018/0269306 ADDITIVE CORE SUBTRACTIVE LINER FOR METAL CUT ETCH PROCESSES
An additive core subtractive liner method is described for forming electrically conductive contacts. The method can include forming a first trench in an first...
2018/0269305 ADDITIVE CORE SUBTRACTIVE LINER FOR METAL CUT ETCH PROCESSES
An additive core subtractive liner method is described for forming electrically conductive contacts. The method can include forming a first trench in an first...
2018/0269304 N-CHANNEL BIPOLAR POWER SEMICONDUCTOR DEVICE WITH P-LAYER IN THE DRIFT VOLUME
A power semiconductor device having a semiconductor body configured to conduct a load current is disclosed. In one example, the device includes a source region...
2018/0269303 SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS THEREOF
A method for fabricating a semiconductor structure. The method includes providing a substrate and forming a plurality of fin structures on the substrate. Each...
2018/0269302 HYBRID GATE DIELECTRICS FOR SEMICONDUCTOR POWER DEVICES
In a general aspect, a power semiconductor device can include a silicon carbide (SiC) substrate and a SiC epitaxial layer disposed on the SiC substrate. The...
2018/0269301 FIELD EFFECT TRANSISTOR AIR-GAP SPACERS WITH AN ETCH-STOP LAYER
Provided herewith are embodiments related to a semiconductor structure and a method for forming the semiconductor structure. A first spacer layer and a second...
2018/0269300 METHOD FOR MANUFACTURING INSULATED GATE FIELD EFFECT TRANSISTOR
An insulated gate field effect transistor with (a) a base having source/drain regions, a channel forming region, a gate insulating film formed on the channel...
2018/0269299 SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing a semiconductor structure is provided. An interlayer dielectric layer is formed conformally over protruding structures formed over a...
2018/0269298 METHOD FOR DEPINNING THE FERMI LEVEL OF A SEMICONDUCTOR AT AN ELECTRICAL JUNCTION AND DEVICES INCORPORATING...
An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.
2018/0269297 LOW RESISTANCE RUTHENIUM-CONTAINING CONTACTS
A conductive source/drain contact is formed within a trench overlying a raised epitaxial source/drain junction. The conductive contact includes a conductive...
2018/0269296 Semiconductor Device Including a Gate Contact Structure
A semiconductor device includes a semiconductor body. The semiconductor body has a first surface and a second surface opposite to the first surface. A...
2018/0269295 FIELD-EFFECT TRANSISTORS WITH A T-SHAPED GATE ELECTRODE
Device structures for a field-effect transistor and methods for forming a device structure for a field-effect transistor. A first dielectric layer is formed,...
2018/0269294 SEMICONDUCTOR DEVICE
Machining accuracy of an IGBT region is worsened due to a height difference caused by polysilicon. Therefore, there is a problem that characteristic variation...
2018/0269293 SEMICONDUCTOR POWER DEVICES MANUFACTURED WITH SELF-ALIGNED PROCESSES AND MORE RELIABLE ELECTRICAL CONTACTS
This invention discloses semiconductor power device that includes a plurality of top electrical terminals disposed near a top surface of a semiconductor...
2018/0269292 TUNABLE BREAKDOWN VOLTAGE RF FET DEVICES
A tunable breakdown voltage RF MESFET and/or MOSFET and methods of manufacture are disclosed. The method includes forming a first line and a second line on an...
2018/0269291 2D CRYSTAL HETERO-STRUCTURES AND MANUFACTURING METHODS THEREOF
A method of fabricating a semiconductor device having two dimensional (2D) lateral hetero-structures includes forming alternating regions of a first metal...
2018/0269290 NITRIDE SEMICONDUCTOR DEVICE
A nitride semiconductor device includes a first semiconductor layer including a nitride semiconductor, a second semiconductor layer contacting the first...
2018/0269289 THIN-BASE HIGH FREQUENCY LATERAL BIPOLAR JUNCTION TRANSISTOR
A semiconductor device including a base region present within a fin semiconductor structure that is present atop a dielectric substrate. An epitaxial emitter...
2018/0269288 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
A method for fabricating semiconductor device includes the steps of: providing a substrate; forming a gate structure on the substrate; forming a spacer...
2018/0269286 SEMICONDUCTOR DEVICE AND FULL-WAVE RECTIFIER CIRCUIT
One aspect of a semiconductor device includes a plurality of first structures, in which each of the first structures includes: a first N-type region; a P-type...
2018/0269285 Insulated Gate Bipolar Transistor Device Having a Fin Structure
A transistor device includes a first silicon nanowire array-MOSFET and a second silicon nanowire array-MOSFET integrated with a bulk drift region. The first...
2018/0269284 Semi-Metal Tunnel Field Effect Transistor
A tunnel field effect transistor (100) comprises a source region (102), a drain region (104), and a channel region (106) formed of a single material, in...
2018/0269283 Integrated Memory, Integrated Assemblies, and Methods of Forming Memory Arrays
Some embodiments include an integrated memory having an array of capacitors. The array has edges. The capacitors along the edges are edge capacitors, and the...
2018/0269282 High Voltage Blocking III-V Semiconductor Device
A semiconductor device includes a type IV semiconductor base substrate, a first type III-V semiconductor layer formed on a first surface of the base substrate,...
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